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Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Keith Packard <keithp@keithp.com>
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Vblank in the kernel is far simpler if it deals with pipes instead of
planes, so we're changing both user and kernel side. This is the user mode
side. This fixes both i830_crtc_dpms and i830PipeSetBase, the two functions
which copy geometry from the crtc to the sarea.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This tracks whether the last command in each batch is an MI_FLUSH command
and avoids appending another MI_FLUSH in the non-GEM cases.
Signed-off-by: Keith Packard <keithp@keithp.com>
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My checks for DRM enabled were a bit too extensive; drmCommandWriteRead is
part of libdrm which the driver is always linked against. Only the symbols
in the DRI module need to be checked here.
Signed-off-by: Keith Packard <keithp@keithp.com>
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I was testing the behaviour of the XAA-based DRI buffer drawing code for
tiled buffers and accidentally left I830DRIInitBuffers disabled.
Signed-off-by: Keith Packard <keithp@keithp.com>
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GEM requires the DRI extension module currently, so make sure that is loaded
(by checking for the DRIQueryVersion symbol) before trying to call it. This
allows the server to start with the DRI extension disabled.
Signed-off-by: Keith Packard <keithp@keithp.com>
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When moving or clearing the extra buffer contents associated with DRI
windows, the XAA code needs to see which buffer is being manipulated in the
Setup functions to program the tiling values correctly. Calling
I830SelectBuffer and not then calling I830Setup... would result in mis-tiled
rendering.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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This may well explain why XAA never worked well on tiled front buffers;
tiled buffers require a different pitch programming on 965 than non-tiled
buffers, in dwords rather than bytes.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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SDVO on Mac mini trys to get EDID from CRT port, which
failed with recent DVI-I change.
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This snuck in with the UXA rename commit.
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On the GM45 we were assuming too little stolen memory (mostly harmless,
except when it wasn't, until the AGP fix), and on the G45 we were assuming too
much stolen memory, which was quite harmful when we touched the page that
didn't get mapped.
Future stolen memory accounting should use src/reg_dumper/intel_gtt before and
after enabling AGP on the chipset to confirm that only the GTT entries not
mapped to stolen are replaced, and that all of the unmapped GTT entries are
replaced with the constant scratch page.
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Reported by Tomas Carnecky on IRC
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Introduced in patch for DVI-I CRT probe, if no EDID
CRT monitor is connected, origin code destroys default
DDC bus which causes crash in later get_modes call.
Change it to setup and destroy DDC bus as needed in
get_modes, so we always reprobe and get current state.
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In non-DRM mode, the driver waits for the hardware by checking the ring
pointers; when the ring is empty, it assumes the hardware is idle. However,
the hardware updates the ring pointers before executing a command, so if the
MI_BATCH_BUFFER_START is the last command in the ring, the driver will think
the hardware is idle while it may still be processing the contents of the
batch buffer. Placing NOOPs after the BATCH_BUFFER_START allows the driver
to know that the hardware has completed the batch buffer.
Signed-off-by: Keith Packard <keithp@keithp.com>
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The ring commands to insert a batch buffer to the ring in i830 form were not
terminated by a call to ADVANCE_LP_RING(). This surely would have caused
chaos.
Signed-off-by: Keith Packard <keithp@keithp.com>
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We haven't found a way to make FBC work reliably with GM965 yet,
(it often fails to notice CPU writes). This appears to be a
specific problem with this device, (as we haven't gotten similar
bug reports for subsequent devices such as GM45). So FBC is
now disabled by default for GM965 but can still be enabled with
the FrameBufferCompression option for experimenting/debugging.
This resolves bug #16257:
[GM965 EXA] Frame-buffer compression broken for CPU writes (XPutImage)
https://bugs.freedesktop.org/show_bug.cgi?id=16257
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BIOS already says no integrated TV, and this quirk blocks TV
on R61i which has the same subdevice id as T61.
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i830_bios_init() is called too late after output init, which
makes bios data mostly useless, and caused all TV init fail as
tv_present flag is not set.
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Broken by 3a4151b69daa478ac6edf042d604ee41e8429c0d
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This disables UXA and DRM modesetting pre-1.5, due to privates handling
issues.
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The server's pci_device structure ends up conflicting with libpciaccess's.
Just don't include the server structure for this non-server tool.
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ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel
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Document a few more VBT structures and comment on VBIOS communication a
bit. There should be enough there now for a sufficiently motivated
developer to start implementing support for hotkeys and other features
on pre-IGD OpRegion machines.
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It's very convenient that the hardware supports this non-default
mode since it's exactly what is specified by the Render extension.
This provides a more efficient means of fixing bug #16820:
[EXA] Composition result in black for areas outside of source-surface bo
https://bugs.freedesktop.org/show_bug.cgi?id=16820
without the software fallback we had in the earlier fix,
(commit 76c9ece36e6400fd10f364ee330faea470e2da64 ).
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This is consistent with the documentation, (and just plain makes
more sense).
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This reverts commit 76c9ece36e6400fd10f364ee330faea470e2da64.
We've learned a new technique that should let us avoid this fallback
to software. See following commit.
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We wish it wouldn't, but the hardware ignores the alpha in the
BorderColor we set when the source picture format has no alpha
in it, (and it uses alpha of 1.0 where we want 0.0). For now,
fallback for these cases. This gives a correct result, but
obviously is not as fast as we would like.
This fixes bug #16820:
[EXA] Composition result in black for areas outside of source-surface bounds
https://bugs.freedesktop.org/show_bug.cgi?id=16820
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I required the following patch on top of this to work around libpciaccess
brokenness. libpciaccess reports 0 rom size if there's no rom resource,
even if the rom file exists in sysfs.
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libpciaccess (and the old X server PCI code as well) provides a function to
get the ROM contents. Code to use that was already present in the driver and
used if the INT10 function failed. Skip the INT10 and just use libpciaccess
as that eliminates several module loads and scary use of vm86.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Eric informed me that the repeat field exists only for backwards
compatibility with old drivers that weren't prepared for values
other than 0 or 1 here. Since we are, we can just ignore that
field and examine only repeatType. So the code's a (tiny) bit
simpler this way.
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It's quite simple to support these modes---we simply need to
turn on the support for them in the hardware.
These changes have been verified with the extend-pad and
extend-reflect tests in cairo's test suite. However, this
currently required using a custom-modified version of cairo.
The issue is that released versions of cairo, (and even
cairo master so far), don't pass RepeatPad and RepeatReflect
to Render, (due to various bugs and workarounds in cairo
and pixman). I do plan to fix those issues in cairo, so that
in a future release of cairo, (1.8.2 perhaps?), the cairo
test suite will usefully test these new repeat modes in our
driver.
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The existing switch statement was switching on the Boolean
repeat field rather than the correct repeatType field. This
had not caused any problem before as only two possible repeat
values were supported (RepeatNone = 0 and RepeatNormal = 1)
so they were always the same as the repeat field.
Soon, however, we'll be supporting more repeat types, so we'll
need to switch on the correct value.
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This reverts commit f315e9d1ad92562195ce42b956d4be6b31e8a13e. The world
isn't ready for a warning free build.
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From the Intel 965 Programmer’s Reference Manual, volume 3,
chapter 2.2.2 "Mode Switch Programming Sequence".
The disable sequence should be:
- Disable planes (VGA or hires)
- Disable pipe
- Disable VGA display in 0x71400 bit 31
This patch implements that order plus waits for a vblank at the end.
Fixes bug #17756.
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Dump more panel data, including number of expected entries. Had to
refactor things a bit, but now each function should get size information
so further checking can be added more easily.
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On some machines it appears that the LFP info pointers give us more
accurate panel info than if we index into the LFP data table using the
panel type index. Early reports indicate that using the pointers
doesn't cause regressions, so switch to them by default to help 8xx
machines.
Fixes bug 17310 (and hopefully 17658 too).
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GCC isn't smart enough to analyze the control flow and figure out that
these are false positives, but initializing them shouldn't hurt, so work
around it.
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Some ADD2 card doesn't get SDVO detect status setup right,
which disabled outputs on those cards. This adds a new
option "ForceSDVODetect" to probe all SDVO ports anyway.
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On DVI, centered VGA mode is used instead of native mode VGA, and
PLL on pipe is used instead of VGA PLL setting. So make sure PLL
settled down in restore time.
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