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2013-02-22sna: Avoid migrating and making the GPU bo busy prior to mmapping itChris Wilson
References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1131134 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-22sna/gen7: Skip CLEAR_PARAMS for the null depthbufferChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-22sna/gen7: Only a pipeline stall is required for the CA passChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-21sna/dri: Eradicate the DRI2 name exchange mechanismChris Wilson
Thinking about the compositor <-> server <-> client inter-exchange demonstrates that we cannot prevent the client rendering into the source texture being show by the compositor. That is a subject for DRI3. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-21sna: Always enable the solid-cache and gradient-cacheChris Wilson
Figuring out when it might not be used is simply too error prone. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-20sna: Honour LinearFramebufferChris Wilson
The Option was untested, and unsurprisingly was broken. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-202.21.3 release2.22.32.21.3Chris Wilson
2013-02-20sna/trapezoids: Clamp cells to valid rangeChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-20sna/trapezoids: Embed a few cells into the stackChris Wilson
Avoid an allocation in the common case where the set of trapezoids is fairly narrow. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-20sna/trapezoids: Perform the cell allocation upfrontChris Wilson
As we know the maximum extents of the trapezoids, we know the maximum number of cells we will need and so can preallocate them. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-19sna/video: Only setup XvMC if we first setup XvChris Wilson
Under certain circumstances, XvScreenInit can indeed fail, so do not bother with creatin XvMC (as it triggers internal assertions if it cannot find our adaptor amongst Xv's). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-19test: Add generated vsync.avi to gitignoreChris Wilson
2013-02-19sna: Assert that the GPU damage is NULL before destroy a proxyChris Wilson
If the GPU bo is a proxy, then it really is a pointer into a upload buffer for CPU data. In these cases, there should never be any GPU damage lying around. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-18sna: Assert that the gpu_bo exists if it is entirely damagedChris Wilson
This should help catch the error slightly earlier. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-18sna: A couple more assertions that we forcibly attach pixmaps correctlyChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-18sna/dri: Prevent swapping a decoupled DRI2BufferChris Wilson
If the DRI2Buffer is no longer valid for the Drawable, for example the window had just been reparent, just complete the swap without triggering any assertions. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-18uxa/gen7: Don't use a message register to store vlDamien Lespiau
Turns out the "new" assembler that uses mesa's opcode emission hits the path that automatically transforms MRF registers into GRF ones in the exa_wm_src_projective shader. The diff with the new assembler is: $ intel-gen4disasm -g7 - - { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x2e8077bd, 0x008d03c0, 0x008d0180 }, mul(8) m4<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; mul(8) g116<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; Of course, message registers are no more in gen7, so the shader is trying to do something shaddy (ahem!). Instead of using m4, let's make exa_wm_src_projective use g68 for v (aka vl) which makes sense since: 1/ vh is g69 2/ exa_wm_src_affine uses g68 for vl already This commit changes the generated assembly, here's the decoded diff: $ intel-gen4disasm -g7 - - { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x288077bd, 0x008d03c0, 0x008d0180 }, mul(8) m4<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; mul(8) g68<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; Cc: Kenneth Graunke <kenneth@whitecape.org> Reported-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-02-17Confirm that i915.ko has KMS enabled before binding to the deviceChris Wilson
If the kernel has the module, but the KMS module option is not enabled, we cannot function. So after checking to see if the i915.ko is bound, then querying whether it provides any KMS resources. If it has no CRTCs attached, then we need to failover to the VESA/fbdev drivers. Note that this should have been detected by drmCheckModesettingSupported() References: https://bugs.freedesktop.org/show_bug.cgi?id=60987 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-15NEWS: Xserver 1.6 was not packaged in Xorg 7.7Chris Wilson
I misinterpreted Sedat Dilek's advice on how to fix my confusing changelog, so drop the Xorg 7.7 confusion and just refer to the version of Xserver the driver is first compatible with.
2013-02-14NEWS: Fix a couple of typos and factual errorsChris Wilson
Sedat Dilek corrected my spelling and pointed out that what is known as Xorg 1.6 in the log file is actually better known as releases of Xserver 1.6 and Xorg 7.7.
2013-02-13sna/gen4: Restore nonrectiinear spans workaroundChris Wilson
Instead of relying on the macro, the intention was simply to use the prefer_gpu hint. However, I dropped it whilst refactoring ideas from later generations. So restore both the debug control to force spans as well as the intended workaround. Reported-by: Edward Sheldrake <ejsheldrake@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-13sna: Avoid stalling on a SHM upload when otherwise idleChris Wilson
Fixes regresion from commit 09ea1f4402b3bd0e411b90eb5575b3ff066d7356 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jan 10 16:26:24 2013 +0000 sna: Prefer to use the GPU for copies from SHM onto tiled destinations As the stalls on IVB 64-bit machines at least greatly offset the benefits. As those earlier measurements were made on the same IVB machine but running in 32-bit mode, I need to double-check whether or not this is another 32-bit peculiarity. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-13Revert "sna: Avoid promoting SHM CPU bo to GPU to maintain coherence with ↵Chris Wilson
SHM clients" This reverts commit f743cd5734ca502aa8bdb0e1327fe84d6ce82755.
2013-02-13sna/dri: Fix typo limiting gen4 to TILING_X depth buffersChris Wilson
Fixes regression from commit 98b312e579385e6e4adf6bf0abe20f8ca84592af Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Jan 23 20:51:35 2013 +0000 sna/dri: Stop feeding I915_TILING_Y to mesa i915c Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60178 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-13sna: Handle scanouts still active at the time of destructionChris Wilson
Basically remove the bogus assert, and reorder the list to preferentially reuse the still active scanouts. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-12sna/dri: Validate that the scanout flag is setChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-12sna: Prefer inplace readback if the GPU doesn't support cacheable BLTsChris Wilson
As we must perform the GTT reads anyway, first see if we can copy directly to the destination. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-12sna: Only use the inplace read fallback if we have no CPU bo supportChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-12sna/dri: Assert that we are not passed deceased DRI2BuffersChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna/dri: Assert that the old scanout is clear before overwritingChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna/dri: Update flush status for tear-free exported GPU boChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna/dri: Harden the replacement of the back buffer against alloc failureChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11NEWS: Fix marketing name for 945gmChris Wilson
The GMA3100 was the desktop G31/G33 which whilst almost identical to the GMA950, notably does not require the extra unfenced alignment. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna: Fix inaccurate use of __attribute__((const))Chris Wilson
'const' is only allowed to use the function parameters and not allowed to access global memory - that includes not allowed to deference its arguments... Thanks to Jiri Slaby for spotting my mistake. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna/dri: Ignore a compiler barf breaking an assertionChris Wilson
Manual confirmation with gdb says all is fine and things work again after printing the variables responsible. The curious reader is welcome to read the disassembly to find where the compiler goofed. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna/dri: Couple up the flush pixmap after checking for allocation failuresChris Wilson
Tidy up the error path not to leave the GPU bo pinned and marked for flushing. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna/dri: Tighten the assertions that we have one DRI2Buffer per PixmapChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna: Assert that we do not destroy a GPU bo for an active DRI pixmapChris Wilson
This is an extra paranoid check that the bo is still pinned. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna: Avoid stalling for changing cache levels on an active scanoutChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-11sna/dri: Only clear the GPU bo flush flag when the last export is destroyedChris Wilson
Add various assertions around DRI to be sure that we don't change the GPU bo for a pixmap that does not match our flush bookkeeping. Then be more careful during the DRI2Buffer destroy that we don't accidentally remove the flush flag from a shared bo. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-10configure: Add -lX11 required to link the legacy libI810XvMC.soChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-102.21.2 release2.21.2Chris Wilson
2013-02-10sna: Restore glyphs with xorg-1.12Chris Wilson
That simple and innocuous build fix for xorg-1.13 bizarrely causes missing glyphs with earlier Xorgs. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-10NEWS: fix bug urlChris Wilson
The dangers of cutting and pasting from git log. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-102.21.1 releaseChris Wilson
2013-02-10sna: Reorder some includes so that compat-api.h comes after the headers it wraps2.21.1Chris Wilson
Fixes the build in cases where the compat-api.h was defining macros to subvert the real functions found in the xorg includes Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-10configure: Fix typo in checking for libdrm_intelChris Wilson
The package name is libdrm_intel not libdrm_intel-1, an obvious cut'n'paste error from testing for pixman-1. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-10sna: Backport to squeeze - Xorg-1.6, pixman-0.16, libdrm-2.4.21Chris Wilson
The principle change is to switch to the old Privates API and undo the Region renames. The downside is that this ignores the critical bugfixes made to the xserver since xorg-1.6 - but I assume that whoever wants to run the latest hardware on the old xservers is also backporting those stability fixes... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-09sna: Fix alignment of the base of partial buffers for pre-G33 chipsetsChris Wilson
The older chipsets have much more restrictive alignment rules for the base address of tiled but unfenced objects. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1120108 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-09sna: Promote to GPU is only partially damaged on the CPU but busy on the GPUChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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