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2007-07-13Remove hard-coded CRT blanking frobbing for load detection.fbcKeith Packard
CRT blanking needn't be adjusted to perform load detection on 9xx chips, and the 8xx load detection path now adjusts blanking just during load detection. Adjusting the blanking interval turned out to cause many monitors to fail to sync.
2007-07-13Ensure pipe/output active before doing load detection.Keith Packard
If the pipe or output have been set to DPMSOff, then load detection will not work correctly. Also, share the load detection configuration code between crt and tv outputs.
2007-07-13Eliminate bogus (and harmful) blanking adjustment for load detect.Keith Packard
Instead of always adding blanking to mode lines, use the FORCE_BORDER option on i9xx hardware where it works, and dynamically add a bit of border if necessary on i8xx hardware to make load detection work. This may cause flashing when a usable crtc is not otherwise idle when load detection is requested.
2007-07-11Fix i915 rendering for tiled bufferWang Zhenyu
Make it to check fence register for dest buffer.
2007-07-09Fix some physical address handling for >4GB addresses.Eric Anholt
The upper bits would have been inappropriately dropped on G33-class hardware, and on G965-class hardware in a 32-bit environment. The only use of physical addresses on these should be for FBC, though, and FBC requires addresses below 4GB. This is unresolved.
2007-07-07FBC fixes:Jesse Barnes
- allow FBC and Tiling to be forced off if configured to do so - only touch FBC registers if pI830->fb_compression is true
2007-07-06Fix manpage to reflect default behavior.Jesse Barnes
2007-07-06Fix naming of FBC plane enable bits (mistakenly called them pipes earlier).Jesse Barnes
2007-07-06Update man page with current behavior.Jesse Barnes
2007-07-06Fix debug output in fbc enable/disable routines. Add logic to make sure fbcJesse Barnes
isn't enabled twice on two different pipes.
2007-07-06Fix tiling and fb compression defaults for 965 (not yet fully supported).Jesse Barnes
2007-07-06FBC and tiling changesJesse Barnes
- change framebuffer option name to "FramebufferCompression" - add new "Tiling" option (controls all tiling, not just front buffer) - add debug message to fb compression enable/disable routines - update man page with new options
2007-07-05Merge branch 'master' into fbcJesse Barnes
2007-07-05Re-add tiling kludge, but only for 965.Jesse Barnes
2007-07-05Remove tiling kludge. May need more fixes for 965.Jesse Barnes
2007-07-05Revert discard alpha change, requires other fixes to work.Jesse Barnes
2007-07-05FBC fixes:Jesse Barnes
- properly check several FBC enablement constraints - don't use alpha discard if FBC is in use
2007-07-03Fixup line length buffer padding, add kludge for front buffer tileJesse Barnes
pitch.
2007-07-02Update documentation and bump driver version to 2.1.0.xf86-video-intel-2.1.0Eric Anholt
2007-07-02Framebuffer compression changes:Jesse Barnes
- move FBC register definitions to i830_reg.h - add fix from Arjan for 965 depth buffer tiling - add VT switch and clear-at-server-start code for FBC registers
2007-07-02Fix reversed LVDS dither enabling logic on GM965.Eric Anholt
2007-07-02Bug #11365: Disable the panel fitter unless it's needed for the chosen mode.Eric Anholt
The automatic panel scaling appears to choose bad sampling on some GM965 hardware for 1:1 mapping modes, and there's no real sense in having it on if we just want 1:1.
2007-07-02Enable framebuffer compression (use Option "FrameBufferCompression"Jesse Barnes
"true" in your xorg.conf). Should save ~0.5W during typical 2D usage.
2007-06-30Fix load detection to use border region instead of blanking.Keith Packard
Make sure there is some border area to use by changing how the pipe is configured, then pick a scanline in the middle of the border for load detection. This lets the load detect code use an active pipe instead of requiring an idle one.
2007-06-28Add *~ to .gitignore to skip emacs & patch backup filesAlan Coopersmith
2007-06-28Add AM_PROG_CC_C_O to configure.acAlan Coopersmith
Clears automake-1.10 warning: src/bios_reader/Makefile.am:8: compiling `bios_dumper.c' with per-target flags requires `AM_PROG_CC_C_O' in `configure.ac'
2007-06-28Handle dual-channel LVDS on i855.Keith Packard
Just as with i9xx LVDS, the i855 LVDS can operate in dual-channel mode with a modified P2 divisor value (7 instead of 14). Just using the existing 9xx code for 855 appears to work fine.
2007-06-28Decode PLL registers in LVDS mode a bit better in debug code.Keith Packard
LVDS mode changes how the PLL works in fairly dramatic ways; the debug code wasn't properly accounting for those differences resulting in fairly bogus debug output.
2007-06-27EXA: fallback mask transform on i965Wang Zhenyu
It needs to fix shader programs which hasn't been done yet.
2007-06-27EXA: don't have to check offscreen sizeWang Zhenyu
DDX will check it for EXA_OFFSCREEN_PIXMAPS flag
2007-06-25Use local structures for vs_state, sf_state, and wm_stateCarl Worth
2007-06-25Use local structure for src_sampler_state and mask_sampler_stateCarl Worth
2007-06-25Use local structure for mask_surf_stateCarl Worth
2007-06-25Use local structure for src_surf_stateCarl Worth
2007-06-25Use local structure for dest_surf_stateCarl Worth
2007-06-25Use local structure for cc_stateCarl Worth
2007-06-25Remove redundant i830WaitSync from i965_prepare_compositeCarl Worth
There were two calls to i830WaitSync, and between them no state was being changed---just offsets were being computed.
2007-06-22Bug #11171: Add support for the Ti TFP410 DVO TMDS transmitter.Dave Mueller
2007-06-22Move the ivch's fixed panel mode support to i830_dvo.c for other LVDS drivers.Eric Anholt
This also results in removal of the setup hook, which was being called unconditionally and breaking non-ivch dvo drivers.
2007-06-22I830 needs to have plane/pipe/pll started in mode_set.Keith Packard
The patch for the i855 to stop enabling plane/pipe/pll in mode_set broke the i830. Revert that just for the i830, leaving it enabled for the i855.
2007-06-22Increase vblank wait timeout from 20ms to 30ms. 49.6Hz < 20ms.Keith Packard
The x40 LVDS mode has a 49.6Hz vertical refresh. Waiting for only 20ms can sometimes cause the driver to start programming the hardware before the vblank has occurred, which will lock up the i855 chipset. Extend this to 30ms (the maximum timeout used by the BIOS) to ensure this doesn't happen. Detecting actual vblank occurance using the various status registers should also be possible but isn't yet working.
2007-06-21Follow BIOS configuration for Legacy Backlight Brightness.Keith Packard
The backlight control in the LVDS controller can either operate in 'normal' mode or 'legacy' mode. In legacy mode, it uses the PCI config space register 0xf4 which can range from 0 to 0xff. In normal mode, it reads the range and current value from the BLC_PWM_CTL register.
2007-06-21Eliminate some uninitialized variable warningsKeith Packard
2007-06-21Add 3DSTATE_CLEAR_PARAMETERS bitsKeith Packard
2007-06-19Fix left G33 issuesWang Zhenyu
Be sure to check G33 chip type in: - sdvo output - Y-major tile - crt detect - and xaa composite Sorry for that I should have fixed them very earlier...
2007-06-18Bug #11295: Disable textured video on i915 with framebuffer width too large.Eric Anholt
2007-06-17Let DPMS functions enable plane/pipe/output on 8xx hardware.Keith Packard
On 855, letting crtc_mode_set enable the plane and pipe will occasionally hang the chip. Instead, wait for crtc_enable to light things up. For 9xx, leave things alone.
2007-06-17Include stdint.h to get uint64_tRĂ©mi Cardona
2007-06-15sdvo: add support for RGB outputs on SDVODave Airlie
This lights up my monitor VGA-1 - it doesn't look the best though
2007-06-13Fix and enable the 915-class planar textured video path.Eric Anholt