Age | Commit message (Collapse) | Author |
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CRT blanking needn't be adjusted to perform load detection on 9xx chips, and
the 8xx load detection path now adjusts blanking just during load detection.
Adjusting the blanking interval turned out to cause many monitors to fail to
sync.
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If the pipe or output have been set to DPMSOff, then load detection will not
work correctly. Also, share the load detection configuration code between
crt and tv outputs.
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Instead of always adding blanking to mode lines, use the FORCE_BORDER option
on i9xx hardware where it works, and dynamically add a bit of border if
necessary on i8xx hardware to make load detection work. This may cause
flashing when a usable crtc is not otherwise idle when load detection is
requested.
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Make it to check fence register for dest buffer.
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The upper bits would have been inappropriately dropped on G33-class hardware,
and on G965-class hardware in a 32-bit environment. The only use of physical
addresses on these should be for FBC, though, and FBC requires addresses
below 4GB. This is unresolved.
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- allow FBC and Tiling to be forced off if configured to do so
- only touch FBC registers if pI830->fb_compression is true
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isn't enabled twice on two different pipes.
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- change framebuffer option name to "FramebufferCompression"
- add new "Tiling" option (controls all tiling, not just front buffer)
- add debug message to fb compression enable/disable routines
- update man page with new options
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- properly check several FBC enablement constraints
- don't use alpha discard if FBC is in use
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pitch.
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- move FBC register definitions to i830_reg.h
- add fix from Arjan for 965 depth buffer tiling
- add VT switch and clear-at-server-start code for FBC registers
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The automatic panel scaling appears to choose bad sampling on some GM965
hardware for 1:1 mapping modes, and there's no real sense in having it on
if we just want 1:1.
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"true" in your xorg.conf). Should save ~0.5W during typical 2D usage.
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Make sure there is some border area to use by changing how the pipe is
configured, then pick a scanline in the middle of the border for load
detection. This lets the load detect code use an active pipe instead of
requiring an idle one.
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Clears automake-1.10 warning: src/bios_reader/Makefile.am:8: compiling
`bios_dumper.c' with per-target flags requires `AM_PROG_CC_C_O' in
`configure.ac'
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Just as with i9xx LVDS, the i855 LVDS can operate in dual-channel mode with
a modified P2 divisor value (7 instead of 14). Just using the existing 9xx
code for 855 appears to work fine.
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LVDS mode changes how the PLL works in fairly dramatic ways; the debug code
wasn't properly accounting for those differences resulting in fairly bogus
debug output.
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It needs to fix shader programs which hasn't been done yet.
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DDX will check it for EXA_OFFSCREEN_PIXMAPS flag
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There were two calls to i830WaitSync, and between them no state was
being changed---just offsets were being computed.
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This also results in removal of the setup hook, which was being called
unconditionally and breaking non-ivch dvo drivers.
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The patch for the i855 to stop enabling plane/pipe/pll in mode_set broke the
i830. Revert that just for the i830, leaving it enabled for the i855.
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The x40 LVDS mode has a 49.6Hz vertical refresh. Waiting for only 20ms can
sometimes cause the driver to start programming the hardware before the
vblank has occurred, which will lock up the i855 chipset. Extend this to
30ms (the maximum timeout used by the BIOS) to ensure this doesn't happen.
Detecting actual vblank occurance using the various status registers should
also be possible but isn't yet working.
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The backlight control in the LVDS controller can either operate in 'normal'
mode or 'legacy' mode. In legacy mode, it uses the PCI config space register
0xf4 which can range from 0 to 0xff. In normal mode, it reads the range and
current value from the BLC_PWM_CTL register.
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Be sure to check G33 chip type in:
- sdvo output
- Y-major tile
- crt detect
- and xaa composite
Sorry for that I should have fixed them very earlier...
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On 855, letting crtc_mode_set enable the plane and pipe will occasionally
hang the chip. Instead, wait for crtc_enable to light things up. For 9xx,
leave things alone.
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This lights up my monitor VGA-1 - it doesn't look the best though
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