index
:
driver/xf86-video-intel
2.10
2.4
2.9.1-oga
COMPOSITEWRAP
CYGWIN
DAMAGE-XFIXES
IPv6-REVIEW
STSF-CURRENT
XACE-SELINUX
XEVIE
XINERAMA_2
XORG-6_8-branch
XORG-CURRENT
XORG-RELEASE-1
XORG-RELEASE-1-STSF
XORG-RELEASE-1-TM
XORG-STABLE
XPRINT
accelerated_indirect-0-0-1
bleeding_edge-oga
dri2
exa
exa-i965
fbc
glucose
i810_texman_0_1_branch
i830-pageflip
lg3d
lg3d-dev-0-6-1
lg3d-dev-0-6-1-1
lg3d-dev-0-6-1-current
lg3d-dev-0-6-1-latest
lg3d-dev-0-6-2
lg3d-dev-0-6-latest
lg3d-dev-0-7-0
lg3d-dev-0-7-1
lg3d-event
lg3d-master
lukas-resume
master
mergedfb
modesetting
modesetting-airlied
modesetting-keithp
modesetting-keithp-fu
modesetting-multihead
modesetting-rotation
modesetting-sdvo-stuffing
nonrandr-setup
obsd
obsd-2.7
obsd-2.8
obsd-xf86-video-intel-2.4.3
randr-1.2-rotation
restructure-outputs
sandybridge
sco_port_update
textured-video
xf86-video-i810-1_5-branch
xf86-video-intel-2.1-branch
xf86-video-intel-2.5-branch
xorg-7.0-branch
xprint_packagertest_20041125
xprint_packagertest_20041217
xvmc-i915
Intel video cards driver
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
i830_batchbuffer.h
Age
Commit message (
Expand
)
Author
2010-04-16
render: tell the kernel explicitly when fences are needed
Owain G. Ainsworth
2010-03-01
i965: Ensure that URB_FENCE is aligned to 64-bytes
Chris Wilson
2010-03-01
Assert that we only call OUT_BATCH() inside a BATCH
Chris Wilson
2010-03-01
batch: Ensure we send a MI_FLUSH in the block handler for TFP
Chris Wilson
2010-03-01
Remove flush parameter from intel_batch_flush()
Chris Wilson
2010-03-01
batch: Track pixmap domains.
Chris Wilson
2010-03-01
Check that batch buffers are atomic.
Chris Wilson
2010-03-01
Call pPixmaps plain old pixmaps.
Owain G. Ainsworth
2010-03-01
Rename the xf86 screen private from pScrn to scrn.
Owain G. Ainsworth
2010-03-01
Rename the screen private from I830Ptr pI830 to intel_screen_private *intel.
Owain G. Ainsworth
2010-02-28
Move to kernel coding style.
Eric Anholt
2009-05-26
Revert "Rely on BO pixmaps being present in acceleration paths."
Carl Worth
2009-05-01
intel_batch_start_atomic: fix size passed to intel_batch_require_space (*4)
Keith Packard
2009-04-27
Rely on BO pixmaps being present in acceleration paths.
Eric Anholt
2009-04-27
Replace I830Sync's irq emit/wait code with bufmgr use.
Eric Anholt
2009-04-27
unifdef I830_USE_UXA.
Eric Anholt
2009-04-27
Remove EXA support.
Eric Anholt
2009-01-16
Re-emit i915 composite setup when the batchbuffer wraps.
Eric Anholt
2008-10-19
Reduce incidence of MI_FLUSH usage.
Keith Packard
2008-09-09
Track move of bufmgr functions to libdrm_intel.
Eric Anholt
2008-08-13
Make EXA & UXA share bo getting function
Jesse Barnes
2008-08-05
Use dri_bo for all object allocations, including pixmaps under uxa
Keith Packard
2008-07-31
Add OUT_RELOC macro and backing intel_batch_emit_reloc function
Carl Worth
2008-06-10
Change most usage of pixmap offsets to using a reloc macro.
Eric Anholt
2008-06-10
Use batchbuffers instead of ring emits for general commands.
Eric Anholt