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path: root/src/i830_reg.h
AgeCommit message (Collapse)Author
2010-11-01add BLT ring supportZou Nan hai
gen6+ platform has a BLT engine with seperate command streamer to support BLT commands. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> [ickle: merge trivial conflict] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-06-25i810: Move into a legacy directory.Chris Wilson
The driver is still built but is no longer under active development so move it and supporting files to a new directory. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2009-10-06Move to kernel coding style.Eric Anholt
We've talked about doing this since the start of the project, putting it off until "some convenient time". Just after removing a third of the driver seems like a convenient time, when backporting's probably not happening much anyway.
2009-09-22i8xx: Format projective texture coordinates correctly.Keith Packard
Projective texture coordinates must be delivered as TEXCOORDFMT_3D using TEXCOORDTYPE_HOMOGENOUS. This meant selecting the correct type in i830_texture_setup, the correct format in i830_emit_composite_state and sending only 3 coordinates in i830_emit_composite_primitive. Signed-off-by: Keith Packard <keithp@keithp.com> [ickle: tweaked to fix up a couple of use-before-initialised] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2007-11-15Move fb compression reg definition into i810_reg.hZhenyu Wang
where we put MMIO control reg in, and shared with intel_reg_dump program.
2007-11-14Add more FBC regsJesse Barnes
Needed for the new debug code
2007-08-03Tiled rendering & fbc fixes:Jesse Barnes
- actually enable tiling in DSP(A|B)CNTR if needed - add logic to EXA routines for tiled case (still needs work) - enable/disable fbc on DPMS events (meant moving functions higher in file) - fix fence register pitch programming (use correct pitch instead of kludged value)
2007-07-06Fix naming of FBC plane enable bits (mistakenly called them pipes earlier).Jesse Barnes
2007-07-03Fixup line length buffer padding, add kludge for front buffer tileJesse Barnes
pitch.
2007-07-02Framebuffer compression changes:Jesse Barnes
- move FBC register definitions to i830_reg.h - add fix from Arjan for 965 depth buffer tiling - add VT switch and clear-at-server-start code for FBC registers
2007-04-16EXA: Add i830 supported pict format XRGB8888, XBGR8888Wang Zhenyu
2007-03-27EXA: fix i830 texture setupWang Zhenyu
Use LOAD_IMM_2 helper cmd for tex setup. Enable RepeatNormal support. Fix A8 format, i830 can support it now.
2006-07-21Take from i915, blend ctl code cleanup.Wang Zhenyu
2006-07-14Current exa render implement for i830 and i915, test onWang Zhenyu
865GM and 915G. There is issue in picture 'repeat' support. And also stop recursive behavior in I830WaitLpRing to allow server to abort instead of system hang.
2006-06-19Set some invarient state, cures some problems withAlan Hourihane
rotation at startup. This mimicks the 3D drivers setup.
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