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The main change is to send SDVO commands using data passed into the send
command function, and receive responses into memory passed into the read
response function, rather than stuff things in/out through dev_priv->sdvo_regs.
This lets us use structures to represent some arguments, which results in a
nice cleanup (and 100% fewer arguments named magicN as a side effect).
Also, the mode set path is changed to not do any preferred input timing
work. We weren't doing anything legitimate with the results, since we didn't
modify the CRTC timing appropriately, so now we just stuff the CRTC timing into
both and hope for the best. This should probably be revisited later.
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All the SDVO code should now be in lower case rather than StudlyCaps.
This also adjusts the I2C setup to create a bus per SDVO output we set up.
The previous setup with shared buses was failing in some circumstances, which
is probably due to the lack of refcounting in xf86i2c.c.
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This is currently disconnected, but will be used in more overhaul work.
This should be where any output limitations, such as clocks, resolution,
scaling limits, or other options, are validated. Other limitations, such as
chipset resolution limits, CRTC clock limits, etc. should be elsewhere.
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This is not a very clean interface, as a number of outputs require tweaks to
the DPLL registers. When possible, the DPLLs are just adjusted in the
per-output post_set_mode, which happens just after the DPLL is enabled.
However, this seems better than the previous method of having all outputs
programmed in the same function.
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Now, the output is only set up if it fully initializes, so it will never exist
if the private it requires doesn't.
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This appears to have been hidden for others by header pollution in X Server
headers.
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interface, due to a name match with SDVOB.
Bus names must be unique.
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Add lots of register debugging to track delta from BIOS settings.
Fix various mode settings to mirror BIOS sDVO values.
Disable analog/lvds output on pipe with sDVO.
Borrow Dave Airlie's I830xf86ValidateDDCModes code.
Fix various sDVO I2C messages to mirror Dave's code.
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This reads the SDVO cap bits and uses them to figure out the input/output
to save/restore
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SDVO reg instead of the one assigned to the output. When trying to fix that, I
ended up getting no output at all.
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no effect. Note that we are currently trying to program both outputs of any
SDVO device the same way.
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some cases. Pretty-print the return status.
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control bus will reset from DDC mode to internal-registers mode after every
Stop afer a Start on the DDC bus. The xf86 DDC code causes multiple Start/Stops
in one probe. So, we create a wrapper bus that does the control bus switch at
every Start. It's not working yet on my hardware, but I'm pretty sure this is
the right way to go.
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This destroys the i2c device properly if the device isn't detected,
and allows sDVO to work on GM chipsets, and doesn't initialise
the i2c bus twice for sDVO.
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slave address on the first device as well. This gets me to the point of
bringing up some modes on my device.
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replaced by symbolic names in many places. I tried to restrain myself from
functional changes in airlied's code in this pass.
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