Age | Commit message (Expand) | Author |
---|---|---|
2011-04-08 | intel: Restore manual flush for old kernels | Chris Wilson |
2011-04-08 | Tell users to grab i915_error_state on gpu hangs | Daniel Vetter |
2011-04-07 | gen6: Invalidate texture cache | Chris Wilson |
2011-04-04 | Take advantage of the kernel flush for dirty bo in the busy ioctl | Chris Wilson |
2011-04-04 | i965: segregate each vertex element into its own buffer | Chris Wilson |
2010-12-03 | Wait on the current buffer to complete when running synchronously. | Chris Wilson |
2010-12-03 | i965: Amalgamate surface binding tables | Chris Wilson |
2010-12-03 | i965: Upload an entire vbo in a single pwrite, rather than per-rectangle | Chris Wilson |
2010-11-05 | Wait for any pending rendering before switching modes. | Chris Wilson |
2010-11-01 | add BLT ring support | Zou Nan hai |
2010-11-01 | Xv: setup pipeline for Xv on Sandybridge | Xiang, Haihao |
2010-10-07 | Include a chipset generation number to clarify device specific paths. | Chris Wilson |
2010-06-25 | Rename common infrastructure to the intel namespace. | Chris Wilson |