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2015-11-19Add Kabylake PCI IDsWayne Boyer
Add the Kabylake PCI IDs based on the following kernel patches: commit d97044b661d0d56b2a2ae9b2b95ab0b359b417dc Author: Deepak S <deepak.s@intel.com> Date: Wed Oct 28 12:19:51 2015 -0700 drm/i915/kbl: Add Kabylake PCI ID commit 8b10c0cf21ec84618d4bf02c73c0543500ece68d Author: Deepak S <deepak.s@intel.com> Date: Wed Oct 28 12:21:12 2015 -0700 drm/i915/kbl: Add Kabylake GT4 PCI ID Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Wayne Boyer <wayne.boyer@intel.com> [ickle: Copy across the real i915_pciids.h from the kernel]
2015-06-11Add Broxton PCI idsDamien Lespiau
Syncs up to kernel commit ee87697f8bc4da0aea6fe1a825c734fb5e4a5b3b Author: Damien Lespiau <damien.lespiau@intel.com> Date: Fri May 15 19:43:56 2015 +0100 drm/i915/bxt: Update the Broxton PCI ids and, importantly, including kernel commit 1347f5b46a270db1991625f9f57af91e23a4b512 Author: Damien Lespiau <damien.lespiau@intel.com> Date: Tue Mar 17 11:39:27 2015 +0200 drm/i915/bxt: Add BXT PCI id Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-05-16intel: Prevent crash with X -configureChris Wilson
When run with -configure, xf86configptr is NULL, so be careful and do not dereference it. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-04-16intel: Fix inconsistent captilisation of "graphics"Chris Wilson
As we treat it as a name we should capitilize each word, but we forgot that rule (sometimes!) for Broadwell. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-04-16intel: Add marketing names for CHVVille Syrjälä
All CHV devices will be branded as "Intel(r) HD Graphics". Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2015-01-31intel: Try to load one AccelMethod if the .conf doesn't matchChris Wilson
If you mistype or make the wrong selection in the AccelMethod override, you can end up with a non-booting system, so lets always try to start something! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-11-06Remove defunct glamor supportChris Wilson
It never was a stable or complete replacement, and now it is incorporated in Xorg itself! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-10-08intel: Store pointer to struct intel_deviceChris Wilson
Beware the barbarians at the gate, who invade and steal your ScrnInfoPtr and its Entity from underneath you. In some configurations, we lose access to the struct intel_device stored on the Entity after initialisation, causing havoc. Workaround this by storing the intel_device that we open in our driverPrivate. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-09-26Add Skylake PCI IDsChris Wilson
From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625 Author: Damien Lespiau <damien.lespiau@intel.com> Date: Wed Feb 13 15:27:37 2013 +0000 drm/i915/skl: Add the Skylake PCI ids Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-08-05intel: Use NOACCEL to avoid a symbol clash on old XorgChris Wilson
Old Xorg xf86str.h defines NONE preventing us from using it within an enum. Use NOACCEL instead. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-07-27configure: Expose no acceleration by default (--with-default-accel=none)Chris Wilson
Why? I am not sure, but it seems equally as valid as allowing the switch to uxa/glamor as default. The runtime equivalent is Option "AccelMethod". Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-07-23Fix compile failure on old Xorg with XF86_ALLOCATE_GPU_SCREENChris Wilson
Sigh, a late fix was not compile checked against xorg-1.7. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-07-23sna: Disable all outputs when initializing as a slaved output providerChris Wilson
When we are constructed as a slaved device, we need to disable all outputs or else they are not correctly hooked into the master device upon startup. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-06-30intel: Use the i845 info structure for INTEL_I845G_IDS()Damien Lespiau
I assume the intention was to provide a different structure for each of the gen 2 devices. This doesn't change anything really. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-06-24Add marketing names for BroadwellRodrigo Vivi
Even the unknown/reserved ones will stay with HD Graphics. v2: Add missing names to intel.man and README files as well. (Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2014-06-24intel: Add a note about the myriad places we have identifier stringsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-05-16intel: Update PCI IDs for CherryviewChris Wilson
Copied from kernel commit 7d87a7f709650bde4d7d63117f25ee1c095da5dd Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Wed Apr 9 18:19:04 2014 +0300 srm/i915/chv: Add Cherryview PCI IDs and also includes non-functional changes from commit fd3c269f8ff940cc0fbb3b7f7e84c0572f6f759a Author: Zhao Yakui <yakui.zhao@intel.com> Date: Thu Apr 17 10:37:35 2014 +0800 drm/i915: Split the BDW device definition to prepare for dual BSD rings on BDW GT3 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-03-11intel: Fix versioning of SUPPORTS_SERVER_FDChris Wilson
The current snapshot is 1.15.99.901, which means that the new feature will first be available in 1.15.99.902. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-03-10intel: Add support for server managed fdsHans de Goede
In the post-modern world, the platform device nodes are handed to a non-privileged Xserver by systemd/logind. We can then query the core for our assigned fd rather than try to open the device for ourselves (which would fail when trying to obtain DRM_MASTER status). A consequence is that we then do not directly control DRM_MASTER status and must act as a delegate of systemd. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-01-28Allow selection of glamor as the default acceleration methodChris Wilson
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74162 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-12-11intel: Recognise gen8Chris Wilson
Assign gen=8 to the Broadwell PCI IDs, no marketing names are known at this point in time. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-12-04intel: Tidy up driver identification stringChris Wilson
Split the identification strings between the older integrated graphic chipsets and the more recent integrated processor graphics. This helps to emphasis the recent branding and should reduce confusion about which processors are supported by the driver. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-11-12Add identification strings for new AtomsChris Wilson
All of the new Atom (Baytrail) products ship with "HD Graphics". Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-10-03intel: Allow opening the device only through platform informationChris Wilson
Only fail to open the device based on the PCI address, if and only if we do not have sufficient platform information to find the correct system device. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-10-03intel: Handle fallback probing without match_dataChris Wilson
One extreme fallback path through the xf86PlatformProbe results in a call without any match data. As we have a device by this point, we can simply do a reverse match. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-10-03intel: Remove dependence upon having PciInfoChris Wilson
After some probing mechanisms, we may end up with a valid device without knowing its PCI address a priori. Having a valid device, we can just query it for the correct device id, and can safely abort any path that requires PCI information that we don't have. (Those paths are not valid under such hosting anyway - if it may be required, we could reconstruct the address.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-10-03intel: And restore PlatformProbe to working orderChris Wilson
In the saga of the untested WIP patches for hosted device probing, was the failure in logic to detect a valid device during probing. Yikes. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-10-02intel: Pass the platform device along to the open routinesChris Wilson
This allows us to pass along more metadata along with the platform device in future. Currently we pass the device path, but in a hosted environment we should be passing along the authorized fd from the host. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-18intel: Compile fixes for base install of SLED11.sp3Chris Wilson
Highlights of that distribution include xorg-xserver-1.6.5, kernel 3.0.76 and gcc-4.3. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-04configure: Check for required UMS headers before enablingChris Wilson
Prevents the build failing with i810 if we can not find vgaHW.h Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-08-12intel: Check for HW_SKIP_CONSOLE before useChris Wilson
For the older xserver. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-08-09intel: Disable incompatible features whilst hostedChris Wilson
Start adding the infrastructure to disable direct hardware access if X is being run under a system compositor (aka "hosted"). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-30Suppress a bunch of compiler warnings for using constant stringsChris Wilson
We want these allocated in ro memory even if the antique API complains. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Remove some unused macrosChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28uxa: Clear up the common intel directoryChris Wilson
Move all the UXA backend specifc files into their own subdirectory. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Only print the unique chipset namesChris Wilson
When printing out the list of supported chipsets, remove the (many times) repeated names as they are very confusing and obscure the product name you may be searching for. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Replace the codename in the user facing string for unknown Haswell partsChris Wilson
For these parts we do not yet known the correct marketing name, so replace our use of the codename with the generic term. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Set the correct marketing names for Ironlake, Sandybridge and IvybridgeChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Remove the SDV from the list of identified chipsetsChris Wilson
These devices are not for retail and so have no marketing names. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Cross-check an unnamed chipset against the list of known PCI-IDsChris Wilson
If we recognise the PCI-ID but do not have a marketing name for it, it means we are deliberating ignoring it - presumably because it is an engineering sample. In this case, we do not want to print out a warning into the logfile so replace the "Unknown chipset" with some info about the future product. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Source our PCI IDs table from the copy in the kernelChris Wilson
Rather than duplicating the information we already use in the kernel, we can reuse the pci-id tables so long as we apply a little fuzz. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-02intel: Move the validation of the KMS device into the open routineChris Wilson
Currently we leak the fd should we open the device node and decide that is not a GEM/KMS kernel driver. The simplest way to perform the cleanup upon failure is to move the checking for GEM/KMS into the device open routine. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-23Tidy version query for i915.koChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-23sna: Only open the /dev/dri/cardX device onceChris Wilson
Merge the device open in the main driver with the probing so that we can open the path explicitly passed in by the PlatformProbe and keep that fd around for the main driver and so avoid a later search. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-06-05Add more correct names for Haswell.Rodrigo Vivi
As we find out more of the final product names for Haswell chipsets, we need to update the user visible identification strings. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
2013-05-28Add the known marketing names for the performance Haswell partsChris Wilson
Start filling in the names for the parts that have been announced, the Iris branded Haswell GT3 parts. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-05-14Adding more reserved PCI IDs for Haswell.Rodrigo Vivi
As Chris mentioned there is a tendency for us to find out more PCI IDs only when users report. So let's add all new reserved Haswell IDs. I didn't have better names for this reserved ids and didn't want to use rsvd1 and rsvd2 groups, so I decided to use "B" and "E" that stands for the last id digit. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
2013-05-14Fix Haswell GT3 names.Rodrigo Vivi
When publishing first HSW ids we weren't allowed to use "GT3" codname. But this is the correct codname and Mesa is using it already. So to avoid people getting confused why in Mesa it is called GT3 and here it is called GT2_PLUS let's fix this name in a standard and correct way. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
2013-04-27Add all reserved PCI-IDs for HaswellChris Wilson
There is a tendency for a product to ship based on a 'reserved' PCI-ID prior to us being notified about it. In other words, the first we find out about such a product is when customers start complaining about their shiny new hardware not being supported... References: https://bugs.freedesktop.org/show_bug.cgi?id=63701 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-03-07intel: Relax the has-kms test slightlyChris Wilson
Do not rely on a fully populated set of CRTCs, but merely note that the GETRESOURCES ioctl returns an error if KMS is not enabled. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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