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path: root/src/sna/gen4_vertex.c
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2014-06-23sna/gen4+: Add some more asserts around recreating vertex buffersChris Wilson
References: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c46 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-06-23sna/gen4+: Add box emitters for the generic vertex pathsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-06-23sna: Inject a batch flush before adding a fresh boChris Wilson
Fresh bo (those without a reservation already defined, ala presumed_offset) will cause the kernel to do a full relocation pass. So, if possible flush the already correct batch in the hope of trimming the amount of checking the kernel has to perform on this new batch. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-01-24sna/gen3+: Allow for spill when aligning verticesChris Wilson
We need to flush the batch if we run out of space aligning our vertex buffer - but the test must anticipate the space required for the new alignment. Reported-by: Arkadiusz Miskiewicz Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-12-12sna/gen4+: Drop new assertion that we only finish a vbo after use in this batchChris Wilson
A full vbo might not be discarded and so upon first use in the following batch we decided to finish the old vbo and allocate a new. This can happen before we even emit any relocations and so the assert is bogus. Reported-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-12-11sna/gen8: Initial backend for BroadwellChris Wilson
Should match the functionality of the earlier generations, but untuned. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-10-09sna/gen3+: Flush vertex buffer after computing resizeChris Wilson
Upon aligning the buffer, we may enlarge the vbo to accomodate the vertex alignment and push the current index past the end of the buffer. Move the space check from before the alignment computation to afterwards. Reported-by: Jiri Slaby <jirislaby@gmail.com> References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-10-07sna/trapezoids: Only use a single thread to emit rectilinear spansChris Wilson
If the trapezoids are rectilinear, they should hit a fast path through the span compositors and so threading them seems pointless. Expect possibily for inplace pixman operations. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-23sna: Track CPU/GTT maps independentlyChris Wilson
Now that we use CPU mmaps to read/write to tiled X surfaces, we find ourselves frequently switching between CPU and GTT mmaps and so wish to cache both. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-11sna/gen4+: Rebalance creation of vbo during batch flushingChris Wilson
We need to be careful not to copy too much data during the vertex flush or else that becomes the rate-limiting step. The goal here is to do the early flush to warm up the GPU, then transition to larger batches. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-09-08sna/gen4+: Flush batch if idle on filling vboChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-08-04sna/trapezoids: Some minor DBG to investigate threaded renderingChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-05-09sna: Add DBG statements for choice of spans vertex emitterChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-03-26sna/gen4+: Reorder code to compile on squeezeChris Wilson
Remember to only use sse4_2, avx2 in their restricted sections that check for compiler support. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-03-26sna/gen4+: Add a couple more advanced SSE variants for composite verticesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-03-12sna/gen4: Tweak compilation flags to avoid mixed settings across functionsChris Wilson
Confusing gcc with different flags for supposedly inlined functions is not a good idea. References: https://bugs.freedesktop.org/show_bug.cgi?id=62198 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-26sna: Conditionally compile sse2 routinesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-26sna: Conditionally compile sse4_2 routinesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-26sna: Conditionally compile avx routinesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-26sna/gen4: Cluster ISAChris Wilson
Otherwise we seem to confuse the poor little compiler. This should also make it easier to use CPP to turn off blocks. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-26sna/gen4+: All associated CPUs have sse2 at leastChris Wilson
So mark up the basic functions as SSE2 in case we are compiling for 32-bit only. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-02-26sna/gen4+: Begin specialising vertex programs for ISAChris Wilson
Allow use of advanced ISA when available by detecting support at runtime. This initial work just uses GCC to emit varying ISA, future work could use hand written code for these hot spots. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-27sna: Fix typo in vertex count for threaded source span emitterChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-27sna: Enable threaded rasterisation for non-antialiased geometryChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-27sna: Begin sketching out a threaded rasteriser for spansChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-20sna/gen3+: Remove bogus assertion that the vbo in included before finishChris Wilson
If we are carrying over a nearly full vbo from one batch to the next, we may indeed finish it prior to writing any new primitives and so the assert is truly bogus. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-20sna/gen3+: Handle flushing vbo for CA glyphsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-06sna/gen4+: Handle solids passed to the general texcoord emitterChris Wilson
The general texcoord emitter does handle solids (for the case of a transformed mask) and so we need to be careful to setup the VERTEX_ELEMENTS accordingly. Fixes regression from commit 2559cfcc4cbc1d0d84b048565cad3bfee61df8da Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Jan 2 10:22:14 2013 +0000 sna/gen4+: Specialise linear vertex emissio Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-02sna/gen4+: Specialise linear vertex emissionChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-01-02sna/gen2+: Precompute the affine transformation scale factorsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-28sna/gen4+: Trim an extraneous coordinate from solid composite emissionChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-28sna/gen4+: Trim an extraneous coordinate from solid span emissionChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-28sna/gen4+: Tidy emit_spans_affine()Chris Wilson
gcc produced abysmal code for the inlined emission, so hand unroll it for sanity. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-28sna/gen4+: Tidy emit_spans_solid()Chris Wilson
gcc produced abysmal code for the inlined emission, so hand unroll it for sanity. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-21sna: Refactor test for a rotation matrixChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-20sna/gen4+: Amalgamate all the gen4-7 vertex buffer emissionChris Wilson
Having reduced all the vb code for these generations to the same set of routines, we can refactor them into a single set of functions. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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