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Based on the patch by Kenneth Graunke,
"Several places (such as intel_cache_expire) call intel_emit_batch_flush,
so it needs to work on Broadwell. Sometimes the batch is empty, in
which case current_batch may not yet be BLT_RING.
The PIPE_CONTROL code has not been ported to work on Broadwell, so
trying to do a render ring flush will hang the GPU. It also doesn't
make any sense to do a render ring flush, given that we never use the
render ring for UXA on Broadwell."
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This supports solid, copy, put_image, and get_image acceleration via the
BLT engine. RENDER acceleration (composite) and Xv would be piles of work,
which is not worth doing since SNA exists, and Glamor is coming.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
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Highlights of that distribution include xorg-xserver-1.6.5, kernel
3.0.76 and gcc-4.3.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Move all the UXA backend specifc files into their own subdirectory.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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