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2012-12-17sna: Limit the default upload buffer size to half the cpu cacheChris Wilson
This seems to help with small slow caches. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna: Enable support for opting out of the kernel CS workaroundChris Wilson
Keeping a set of pinned batches in userspace is considerably faster as we can avoid the blit overhead. However, combining the two approaches yields even greater performance, as fast as without either w/a, and yet stable. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna: Try to reuse pinned batches by inspecting the kernel busy statusChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna: Precompute the base set of batch-flagsChris Wilson
This is to make it easier to extend in future. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna: Only flush at the low fence wm if idleChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16intel: Support debugging through AccelMethodChris Wilson
Ease debugging by allowing all acceleration or render acceleration to be disabled through AccelMethod: Option "AccelMethod" "off" -> disable all acceleration Option "AccelMethod" "blt" -> disable render acceleration (only use BLT) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna: Tweak the idle SHM CopyArea path to also replace a busy GPU boChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna: Do not force use of the GPU for a copy from a SHM pixmapChris Wilson
As we will undoubtably flush and sync upon the SHM request very shortly afterwards, we only want to use the GPU for the SHM upload iff it is currently busy. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna/gen6+: Tweak prefer-blt-boChris Wilson
Split the decision between where it is imperative to use the BLT to avoid TLB misses and the second case where it is merely preferential to witch. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna/gen6+: Keep the bo on its current ringChris Wilson
Track the most recent ring each bo is executed on, and prefer to keep it on that ring for the next operation. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna/gen6+: Apply the is_scanout to the key not value in the binding cacheChris Wilson
Oops, we never managed to reuse the cached location of the target surface as we entered it into the cache with the wrong key. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna/trapezoids: Add another inline hintChris Wilson
cell_list_alloc() is only called from one place, and the compiler should already be inlining it - but does not appear to be. Hint harder. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-16sna: Include shm hint in render placementChris Wilson
The goal is to reduce the preference of rendering to a SHM pixmap - only if it is already active, will we consider continuing to use it on the GPU. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-15sna/dri: Fallback to a blit after a failed flipChris Wilson
...rather than force the exchange. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-15sna/dri: Honour TripleBuffer OptionChris Wilson
In case anyone ever wants to disable the default. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-14sna/dri: Store and check size of front/back bo attached to a DRI2 drawableChris Wilson
So that we can prevent feeding back a stale bo when the DRI2 client tries to swap an old buffer. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57212 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-14sna: Reduce fence watermarksChris Wilson
Further restrict the amount of fenced bo we try to fit into the batch to make it easier for the kernel to accommodate the request. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-14sna/gen2+: Experiment with not forcing migration to GPU after CPU rasterisationChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-14sna/gen3: Don't combine primitives if beginning a ca 2-passChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-14sna/gen3: Remove stray setting of vertex_startChris Wilson
It is always done at the beginning of vertex emission. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna/gen2: Reorder reuse_source() to avoid NULL dereference for solidsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna/gen2: Initialise channel->is_affine for solidChris Wilson
In case we hit a path were we avoid reusing the source for the mask and leave is_affine unset for a solid mask. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna/gen2: AssertionsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna/gen3: Remove incorrect optimisation of an opaque source for CAChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna/gen2: Program solid mask using the DIFFUSE componentChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna/gen2: Align surface sizes to an even tileChris Wilson
Makes this 855gm much happier. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna: Fix up BLT overwrite detection to use target_handleChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna: Fix typo for 830/845 genChris Wilson
Must remember, its octal not decimal. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-13sna: Only flush the batch after an actual relocationChris Wilson
As we may write preparatory instructions into the batch before checking for a flush. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-12sna: Improve the initialisation failure path for pinned batchesChris Wilson
Simplify the later checks by always populating the lists with a single, albeit unpinned, bo in the case we fail to create pinned batches. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-12sna: Fix the error path in kgem_init_pinned_batches() to use the right iterChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-12sna: Pin some batches to avoid CS incoherence on 830/845Chris Wilson
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=26345 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-12sna/gen2: STIPPLE requires an argumentChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-12sna/gen3+: Use nearest for unscaled videosChris Wilson
If the output is unscaled, then we do not require pixel interpolation (and planar formats are exactly subsampled). References: https://bugs.freedesktop.org/show_bug.cgi?id=58185 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-12sna/gen4: Use the single-threaded SF w/a for spans as wellChris Wilson
Fixes the flickering seen in the fishtank demo, for example. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-11sna/dri: Fix handling of current_msc > target_mscChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-11sna/dri: Query current msc before useChris Wilson
Might be worth caching the last-known-value so we can skip the query for an old swap request. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-10sna/dri: Disable name exchanges for SwapBuffersChris Wilson
The DRI2 protocol is inherently racy. Fortuituously, this can be swept under the carpet by forcing the serialisation between the DRI2 clients by using a blit for the SwapBuffers. References: https://bugs.freedesktop.org/show_bug.cgi?id=58005 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-10sna/dri: Only special case 'divisor && msc-passed' for immediate flippingChris Wilson
As Jesse pointed out, it is legal for the client to request that the flip be some frame in the future even with no divisor. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-10dri2: don't schedule a flip prematurely at ScheduleSwap timeJesse Barnes
If divisor is 0 but the current MSC is behind the target, we shouldn't schedule a flip (which will occur at the next vblank) or we'll end up displaying it early and returning the wrong timestamp. Preserve the optimization though by allowing us to schedule a flip if both the divisor is 0 and the current MSC is equal to or ahead of the target; this avoids a round trip through the kernel. Reported-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2012-12-10sna: Try installing a fallback config on VT enter in case full desiredMode failsChris Wilson
This can happen naturally for 3-pipe config on Ivybridge or if the outputs are rearranged whilst we slept. Instead of failing to change the display on the VT, install at least a fb on the CompatOutput so that hopefully the DE can take over, or give some control to the user. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-10sna: Avoid reusing the same 'busy' bit for two different meanings.Chris Wilson
Oops, I thought the 'busy' bit was now used and apparently forgot it is used to control the periodic flushing... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-10sna: Compromise and only flush a split batch if writing to scanoutChris Wilson
A compromise between not flushing quick enough and flushing too often, hopefully. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-10sna: Immediately flush a split batchChris Wilson
If we submit a batch early (for example if the GPU is idle), then submit whatever else the client drew immediately upon completion of its blockhandler. This is required to prevent flashing due to visible delay between the clear at the start of the cycle and then the overdraw later. References: https://bugs.freedesktop.org/show_bug.cgi?id=51718 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-09sna/sprite: Add a DBG to report whether the kernel supports spritesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-09sna: Move source to CPU prior to referencing for inplace trapezoidsChris Wilson
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56825 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-09sna/gen4+: Refine test for preferring GPU spansChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-09sna: Replace remaining kgem_is_idle() with kgem_ring_is_idle()Chris Wilson
Further experimentation... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-08sna: Flush upon change of target if GPU is idleChris Wilson
The aim is to improve GPU concurrency by keeping it busy. The possible complication is that we incur more overhead due to small batches. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-12-07sna: Convert the ring from BLT/3D to the internal index for kgem_ring_is_idle()Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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