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2013-07-28uxa: Colocate architecture source files with backend implementation sourcesChris Wilson
i.e. move the toplevel uxa/*.[ch] into src/uxa/*.[ch] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28uxa: Clear up the common intel directoryChris Wilson
Move all the UXA backend specifc files into their own subdirectory. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Only print the unique chipset namesChris Wilson
When printing out the list of supported chipsets, remove the (many times) repeated names as they are very confusing and obscure the product name you may be searching for. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Replace the codename in the user facing string for unknown Haswell partsChris Wilson
For these parts we do not yet known the correct marketing name, so replace our use of the codename with the generic term. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Set the correct marketing names for Ironlake, Sandybridge and IvybridgeChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Remove the SDV from the list of identified chipsetsChris Wilson
These devices are not for retail and so have no marketing names. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Cross-check an unnamed chipset against the list of known PCI-IDsChris Wilson
If we recognise the PCI-ID but do not have a marketing name for it, it means we are deliberating ignoring it - presumably because it is an engineering sample. In this case, we do not want to print out a warning into the logfile so replace the "Unknown chipset" with some info about the future product. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28intel: Source our PCI IDs table from the copy in the kernelChris Wilson
Rather than duplicating the information we already use in the kernel, we can reuse the pci-id tables so long as we apply a little fuzz. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-28sna/dri: correct DBG typoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-26sna: Try the indirect upload if we elect to use a mmap and it failsChris Wilson
This allows us to avoid the occassional kernel bug if mmap() fails and the upload is possible via our indirect upload paths. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-25sna/dri: Discard the strict checking for stale bo before performing a blitChris Wilson
Instead of checking that the DRI2Buffers match up with the current DRI2Drawable, clip the area that is being copied to the minimum extents of the Drawable, source and destination buffers. This ensures that we never read nor write beyond the extents of the allocated or visible regions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67210 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67305 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-24sna/dri: Restore the comparison of bottom-right extents to the pixmap originChris Wilson
This reverts a portion of commit 6d80bd6a73 so that we do not compare an offset redirected window against its outer frame (e.g. glxgears in a 300x300 under unity sits within a much larger ~330x330 frame). References: https://bugs.freedesktop.org/show_bug.cgi?id=67210 Reported-by: Joseph Yasi <joe.yasi@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-24sna: Remove bogus comment concerning sna_enter_vtChris Wilson
This bogus comment confused both Chris Halse Rogers and myself. Suggested-by: Christopher James Halse Rogers <raof@ubuntu.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-24sna/dri: Cleanup validation of blit extentsChris Wilson
Prompted by a suggestion by Haihao, clarify the intent behind checking the incoming maximum blit extents against the recorded sizes of the attached bo. Due to the asynchronous nature of DRI2 invalidation, it is possible for the DRI2 buffer to be stale and for its bo to be smaller than required for the client's blit. References: https://bugs.freedesktop.org/show_bug.cgi?id=67210 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: haihao <haihao.xiang@intel.com>
2013-07-23sna/gen5: The cached value of the pipelined pointers key requires 32-bitsChris Wilson
Storing only the low 16-bits of the key for the pipelined state meant that we forced an update with every new drawing op - with the side effect of flushing the render cache. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67157 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-22sna: Fix DBG compilationChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-22sna: Bail if we fail to find the attached CRTC during probingChris Wilson
In a Zaphod configuration, the set of CRTCs available for an output is limited, and if that set does not match with the already established linkage, our quick probe function will select no mode. However, since the output is already on, the user definitely would like to continue using it, so fallback to InitialConfiguratio to select an appropriate mode. Reported-by: Nick Bowler <nbowler@draconx.ca> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67176 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-22sna/gen5: Rework the flush after blend state changesChris Wilson
QA complained that the full flush to memory was too much of a performance hit, so let's try a lighter weight non-stalling pipe flush without. References: https://bugs.freedesktop.org/show_bug.cgi?id=67157 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-21sna: Missing git add to fix typo in assert() from last commitChris Wilson
I915_TILING != I915_TILING_Y Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-21sna: Allow linear inplace uploads along the tiled X PutImage blt pathsChris Wilson
Mostly for symmetry with GetImage, this in theory just bypasses a lot of intermedate state checking. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-21sna: Unwind BLT setup if we don't emit any opsChris Wilson
Often we may find that the BLT operations we wish to do after a XY_BLT_SETUP are either completely clipped out or transparent and so do not generate any subsequent commands. This leaves us with many unused XY_SETUP_BLT. References: https://bugs.freedesktop.org/show_bug.cgi?id=61477 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna: Remember to apply drawable offsets for composite memcpyChris Wilson
Yet another missing chunk from commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits I had the composite offsets, but not the normal window offsets! Reported-by: F.Brown <francisbrwn9@gmail.com> Reported-by: Jiri Slaby <jirislaby@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67124 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67064 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna: Release cloned pixmap when updating tearfree scanoutChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna: Relax assertion that CPU syncs are performed on reffed objectsChris Wilson
Along some paths, we use a CPU mapping on a temporary object that never gets a user ref - so the assertion is bogus. A lesson I keep forgetting. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna: Correct typo in checking src extents before performing memcpyChris Wilson
A regression in commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits And add the full set of assertions to validate the memcpy. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna: Inform the upper layers that we turn the CRTC on after a modesetChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna: Fix application of composite offsets along PutImage fallback pathChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna: Tidy fast source clip processing for sna_do_copyChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-20sna/dri: Fix the strict blitting check not to assume the dst is the front bufferChris Wilson
In order to allow the case for copying onto a target other than the front buffer, such as the fake front buffer for example. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Perform an explicit check against the region extentsChris Wilson
RegionNotEmpty() is only valid if we only use the Region API, and as we mix direct operations on the region extents, we need to also do our own final check. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Check for bpp>=8 before attempting to use memcpy_blt fastpathChris Wilson
Fixes regression in commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Return true from get_drawable_deltas() if the pixmap is offsetChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Add a fast path for the most common fallback for CPU-CPU blitsChris Wilson
This path will mostly be upload for individual glyph uploads, for which the malloc overhead is significant. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Remove the duplicated pimxap migration for the composite fb pathChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: DBG controls to turn off unwinding partial boChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Allow operation inplace when wedgedChris Wilson
There are times, such as rendering into the scanout, where continuing to use the GTT is preferrable even when wedged. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Treat a source with a CPU bo as being attached.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Discard overwritten operations before doing a BLT compositeChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Tidy a few DBG regarding cached uploadsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Only IGNORE_CPU for blt composite operations if the size is knownChris Wilson
Some operations we do not know the true extents and so check the whole drawable when considering placement. In this case, the drawing may only partially cover the drawable and so we can not simply ignore existing CPU damage. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna: Also do exposure checking after source clipping in sna_do_copyChris Wilson
Hopefully a final regression from: commit 07926bfe507071a3d46a2ec13bb86a36bc225761 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jul 11 15:28:55 2013 +0100 sna: Remove the temporary region allocation from sna_do_copy References: https://bugs.freedesktop.org/show_bug.cgi?id=67055 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna/dri: Return early is the DRI2CopyRegion is not attached to the GPUChris Wilson
This can happen if the DRI client passes in a stale DRI2Drawable - that is the Drawable now references a new Pixmap which the client has not run DRI2GetBuffers against. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna/dri: Reject invalid DRI2Drawables if STRICT_BLIT is definedChris Wilson
Simply reject any attempts to copy using stale references (i.e. the DRI2Drawable has changed structure but the client hasn't yet noticed). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna/dri: Rearrange some more DBG to come before its assertionChris Wilson
Again, useful to know what the assertion fails with. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-19sna/dri: Expose the refcnts in DBG before we hit the assertionsChris Wilson
Useful to try and explain some failures. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-17sna: Wrap cpuid.hChris Wilson
More our ifdef out of line from the main code into a header file, where we can also apply a little bit of synatic sugar. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-17sna: Guard cpuid for use only with gcc-4.4 and laterChris Wilson
Since __cpuid_count() was only introduced into gcc-4.4, we obviously cannot use it with earlier versions or with compilers that do not provide compatible interfaces. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-17sna: Ensure that buffer_size is a power-of-two for use in ALIGNChris Wilson
ALIGN() expects it alignment argument to be a power of two. As buffer size depended upon cache_size, which is not always a power of two, issues could arise with unexpected buffer sizes. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-17sna: Fix typo in computing box intersectionChris Wilson
Comparing y2 against y1 for the intersection was a silly typo, especially as the routine for computing the intersection already existed. Fixes regression in commit 34c9b759fbab8d548108e954d55de38c6f5bec31 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Tue Jul 16 19:39:37 2013 +0100 sna: Note that borderClip region may be more than a singular box Reported-by: Clemens Eisserer <linuxhippy@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66991 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-17sna: Fall back to /proc/cpuinfo parsing if cpuid cache size probe failsChris Wilson
Older hardware does not support cache size probing via cpuid4, so we need to implement the older algorithm which requires a table based lookup. (And in hindsight, why I thought cache probing via cpuid to be quite hairy.) For the moment, just use the value found in /proc/cpuinfo. Reported-by: Oscar Dario Trujillo Tejada <oscardt19@gmail.com> Reported-by: Ferry Toth <ftoth@telfort.nl> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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