From e5d3f3818660cb875ce2ef4721c51bc95317b78d Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Thu, 6 Sep 2012 10:54:57 +0100 Subject: sna: Add is-pinned checks to changing the pitch on an existing bo Signed-off-by: Chris Wilson --- src/sna/sna_accel.c | 13 +++++++++++-- src/sna/sna_dri.c | 4 ++++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c index 0eaa67ad..bb0bc147 100644 --- a/src/sna/sna_accel.c +++ b/src/sna/sna_accel.c @@ -942,20 +942,29 @@ sna_share_pixmap_backing(PixmapPtr pixmap, ScreenPtr slave, void **fd_handle) /* XXX negotiate format and stride restrictions */ if (priv->gpu_bo->tiling && - !sna_pixmap_change_tiling(pixmap, I915_TILING_NONE)) + !sna_pixmap_change_tiling(pixmap, I915_TILING_NONE)) { + DBG(("%s: failed to change tiling for export\n", __FUNCTION__)); return FALSE; + } /* nvidia requires a minimum pitch alignment of 256 */ if (priv->gpu_bo->pitch & 255) { struct kgem_bo *bo; + if (priv->pinned) { + DBG(("%s: failed to change pitch for export, pinned!\n", __FUNCTION__)); + return FALSE; + } + bo = kgem_replace_bo(&sna->kgem, priv->gpu_bo, pixmap->drawable.width, pixmap->drawable.height, ALIGN(priv->gpu_bo->pitch, 256), pixmap->drawable.bitsPerPixel); - if (bo == NULL) + if (bo == NULL) { + DBG(("%s: failed to change pitch for export\n", __FUNCTION__)); return FALSE; + } kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = bo; diff --git a/src/sna/sna_dri.c b/src/sna/sna_dri.c index ff18fe3f..e28ea4a5 100644 --- a/src/sna/sna_dri.c +++ b/src/sna/sna_dri.c @@ -362,6 +362,10 @@ static void _sna_dri_destroy_buffer(struct sna *sna, DRI2Buffer2Ptr buffer) /* Undo the DRI markings on this pixmap */ if (priv->flush && --priv->flush == 0) { + DBG(("%s: releasing last DRI pixmap=%ld, scanout?=%d\n", + __FUNCTION__, + pixmap->drawable.serialNumber, + pixmap == sna->front)); list_del(&priv->list); sna_accel_watch_flush(sna, -1); priv->pinned = pixmap == sna->front; -- cgit v1.2.3