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authorMichel Daenzer <michel@daenzer.net>2006-06-08 17:29:12 +0000
committerMichel Daenzer <michel@daenzer.net>2006-06-08 17:29:12 +0000
commitecbec8379c24bd6c16ced674d5e6affcd3985e46 (patch)
tree70cc17d3b3359b500180e18f60b437371a6cdeea
parent874ff105bc63c4fc242fbabaec04fde2cb81fdd4 (diff)
Bug #5678: Fix setting of transfer mode for AGPv3 devices (Tilman
Sauerbeck).
-rw-r--r--ChangeLog6
-rw-r--r--src/radeon_dri.c3
2 files changed, 8 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog
index a83ca5c..086b01b 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2006-06-08 Michel Dänzer <michel@tungstengraphics.com>
+
+ * src/radeon_dri.c: (RADEONSetAgpMode):
+ Bug #5678: Fix setting of transfer mode for AGPv3 devices
+ (Tilman Sauerbeck).
+
2006-06-03 Daniel Stone <daniel@freedesktop.org>
* src/r128_accel.c:
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 62543ca..5b42c33 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -728,8 +728,9 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen)
mode &= ~RADEON_AGP_MODE_MASK;
if ((mode & RADEON_AGPv3_MODE) &&
(INREG(RADEON_AGP_STATUS) & RADEON_AGPv3_MODE)) {
+ /* only set one mode bit for AGPv3 */
switch (info->agpMode) {
- case 8: mode |= RADEON_AGPv3_8X_MODE;
+ case 8: mode |= RADEON_AGPv3_8X_MODE; break;
case 4: default: mode |= RADEON_AGPv3_4X_MODE;
}
/*TODO: need to take care of other bits valid for v3 mode