RADEON: tell the bios not to muck with the hardware while the driver is active

by toggling the appropriate bios scratch regs you can tell
the bios not the touch the hw while the driver is active.
This should prevent the bios from scrambling the hardware
when users open the lid or toggle bios hotkeys.

fixes bug 12567

3 files changed, 47 insertions, 7 deletions

diff --git a/src/radeon.h b/src/radeon.h
index 7248291..6ee43b2 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -913,6 +913,8 @@ extern void        RADEONRestoreFP2Registers(ScrnInfoPtr pScrn,
 					     RADEONSavePtr restore);
 extern void        RADEONRestoreLVDSRegisters(ScrnInfoPtr pScrn,
 					      RADEONSavePtr restore);
+extern void        RADEONRestoreBIOSRegisters(ScrnInfoPtr pScrn,
+					      RADEONSavePtr restore);
 extern void        RADEONRestoreRMXRegisters(ScrnInfoPtr pScrn,
 					     RADEONSavePtr restore);
 extern void        RADEONRestorePLLRegisters(ScrnInfoPtr pScrn,
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 47e46f3..ca554d2 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -768,6 +768,18 @@ RADEONInitPLL2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save,
 }
 
 static void
+RADEONInitBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
+{
+    RADEONInfoPtr  info      = RADEONPTR(pScrn);
+
+    /* tell the bios not to muck with the hardware on events */
+    save->bios_4_scratch = 0;
+    save->bios_5_scratch = 0xff00;
+    save->bios_6_scratch = info->SavedReg.bios_6_scratch | 0x40000000;
+
+}
+
+static void
 radeon_update_tv_routing(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 {
     /* pixclks_cntl controls tv clock routing */
@@ -813,6 +825,9 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
 	}
     }
 
+    if (info->IsMobility)
+	RADEONInitBIOSRegisters(pScrn, &info->ModeReg);
+
     ErrorF("init memmap\n");
     RADEONInitMemMapRegisters(pScrn, &info->ModeReg, info);
     ErrorF("init common\n");
@@ -868,6 +883,9 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
 	}
     }
 
+    if (info->IsMobility)
+	RADEONRestoreBIOSRegisters(pScrn, &info->ModeReg);
+
     ErrorF("restore memmap\n");
     RADEONRestoreMemMapRegisters(pScrn, &info->ModeReg);
     ErrorF("restore common\n");
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 7149b12..10223f4 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4236,14 +4236,25 @@ void RADEONRestoreLVDSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
 
     if (info->IsMobility) {
 	OUTREG(RADEON_LVDS_GEN_CNTL,  restore->lvds_gen_cntl);
-	OUTREG(RADEON_LVDS_PLL_CNTL,  restore->lvds_pll_cntl);  
-	/*OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch);
-	OUTREG(RADEON_BIOS_5_SCRATCH, restore->bios_5_scratch);
-	OUTREG(RADEON_BIOS_6_SCRATCH, restore->bios_6_scratch);*/
+	OUTREG(RADEON_LVDS_PLL_CNTL,  restore->lvds_pll_cntl);
     }
 
 }
 
+void RADEONRestoreBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
+{
+    RADEONInfoPtr  info       = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
+    CARD32 bios_6_scratch = INREG(RADEON_BIOS_6_SCRATCH);
+
+    OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch);
+    OUTREG(RADEON_BIOS_5_SCRATCH, restore->bios_5_scratch);
+    if (restore->bios_6_scratch & 0x40000000)
+	bios_6_scratch |= 0x40000000;
+    OUTREG(RADEON_BIOS_6_SCRATCH, bios_6_scratch);
+
+}
+
 /* Write to TV FIFO RAM */
 static void RADEONWriteTVFIFO(ScrnInfoPtr pScrn, CARD16 addr,
 			      CARD32 value)
@@ -5083,6 +5094,16 @@ static void RADEONSaveDACRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 
 }
 
+static void RADEONSaveBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
+{
+    RADEONInfoPtr  info       = RADEONPTR(pScrn);
+    unsigned char *RADEONMMIO = info->MMIO;
+
+    save->bios_4_scratch       = INREG(RADEON_BIOS_4_SCRATCH);
+    save->bios_5_scratch       = INREG(RADEON_BIOS_5_SCRATCH);
+    save->bios_6_scratch       = INREG(RADEON_BIOS_6_SCRATCH);
+}
+
 /* Read flat panel registers */
 static void RADEONSaveFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
 {
@@ -5097,9 +5118,6 @@ static void RADEONSaveFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
     save->lvds_pll_cntl        = INREG(RADEON_LVDS_PLL_CNTL);
     save->tmds_pll_cntl        = INREG(RADEON_TMDS_PLL_CNTL);
     save->tmds_transmitter_cntl= INREG(RADEON_TMDS_TRANSMITTER_CNTL);
-    save->bios_4_scratch       = INREG(RADEON_BIOS_4_SCRATCH);
-    save->bios_5_scratch       = INREG(RADEON_BIOS_5_SCRATCH);
-    save->bios_6_scratch       = INREG(RADEON_BIOS_6_SCRATCH);
 
     if (info->ChipFamily == CHIP_FAMILY_RV280) {
 	/* bit 22 of TMDS_PLL_CNTL is read-back inverted */
@@ -5341,6 +5359,7 @@ static void RADEONSave(ScrnInfoPtr pScrn)
     RADEONSavePLLRegisters(pScrn, save);
     RADEONSaveCrtcRegisters(pScrn, save);
     RADEONSaveFPRegisters(pScrn, save);
+    RADEONSaveBIOSRegisters(pScrn, save);
     RADEONSaveDACRegisters(pScrn, save);
     if (pRADEONEnt->HasCRTC2) {
 	RADEONSaveCrtc2Registers(pScrn, save);
@@ -5387,6 +5406,7 @@ void RADEONRestore(ScrnInfoPtr pScrn)
 	RADEONRestorePLL2Registers(pScrn, restore);
     }
 
+    RADEONRestoreBIOSRegisters(pScrn, restore);
     RADEONRestoreCrtcRegisters(pScrn, restore);
     RADEONRestorePLLRegisters(pScrn, restore);
     RADEONRestoreRMXRegisters(pScrn, restore);