diff options
| author | Alex Deucher <alex@botch2.com> | 2007-07-25 20:22:25 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@botch2.com> | 2007-07-25 20:22:25 -0400 |
| commit | 62f06d89da3f7160d5e4df8d7ce6fe1a94e9d07c (patch) | |
| tree | 593a7a5a0917ee85b5d27b184a63cc78728ddfc6 | |
| parent | 9cc3ab8320162f371bba15dc131f23c5de2013fc (diff) | |
RADEON: write out saved vclk and pixclk values
| -rw-r--r-- | src/radeon.h | 2 | ||||
| -rw-r--r-- | src/radeon_crtc.c | 2 | ||||
| -rw-r--r-- | src/radeon_driver.c | 12 |
3 files changed, 9 insertions, 7 deletions
diff --git a/src/radeon.h b/src/radeon.h index c759b75..96c4632 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -281,7 +281,7 @@ typedef struct { unsigned ppll_ref_div; unsigned ppll_div_3; CARD32 htotal_cntl; - CARD32 vclk_cntl; + CARD32 vclk_ecp_cntl; /* Computed values for PLL2 */ CARD32 dot_clock_freq_2; diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 5bd2338..3518c9c 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -670,7 +670,7 @@ RADEONInitPLLRegisters(ScrnInfoPtr pScrn, RADEONInfoPtr info, save->ppll_div_3 = (save->feedback_div | (post_div->bitvalue << 16)); save->htotal_cntl = 0; - save->vclk_cntl = (info->SavedReg.vclk_cntl & + save->vclk_ecp_cntl = (info->SavedReg.vclk_ecp_cntl & ~RADEON_VCLK_SRC_SEL_MASK) | RADEON_VCLK_SRC_SEL_PPLLCLK; } diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 36e14ff..d82e912 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -4431,9 +4431,10 @@ void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn, usleep(50000); /* Let the clock to lock */ - OUTPLLP(pScrn, RADEON_VCLK_ECP_CNTL, + /* OUTPLLP(pScrn, RADEON_VCLK_ECP_CNTL, RADEON_VCLK_SRC_SEL_PPLLCLK, - ~(RADEON_VCLK_SRC_SEL_MASK)); + ~(RADEON_VCLK_SRC_SEL_MASK));*/ + OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, restore->vclk_ecp_cntl); ErrorF("finished PLL1\n"); @@ -4493,9 +4494,10 @@ void RADEONRestorePLL2Registers(ScrnInfoPtr pScrn, usleep(5000); /* Let the clock to lock */ - OUTPLLP(pScrn, RADEON_PIXCLKS_CNTL, + /*OUTPLLP(pScrn, RADEON_PIXCLKS_CNTL, RADEON_PIX2CLK_SRC_SEL_P2PLLCLK, - ~(RADEON_PIX2CLK_SRC_SEL_MASK)); + ~(RADEON_PIX2CLK_SRC_SEL_MASK));*/ + OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, restore->pixclks_cntl); ErrorF("finished PLL2\n"); @@ -4907,7 +4909,7 @@ static void RADEONSavePLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) save->ppll_ref_div = INPLL(pScrn, RADEON_PPLL_REF_DIV); save->ppll_div_3 = INPLL(pScrn, RADEON_PPLL_DIV_3); save->htotal_cntl = INPLL(pScrn, RADEON_HTOTAL_CNTL); - save->vclk_cntl = INPLL(pScrn, RADEON_VCLK_ECP_CNTL); + save->vclk_ecp_cntl = INPLL(pScrn, RADEON_VCLK_ECP_CNTL); xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Read: 0x%08x 0x%08x 0x%08lx\n", |