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authorAdam Jackson <ajax@redhat.com>2008-02-23 20:29:51 -0500
committerAdam Jackson <ajax@redhat.com>2008-02-23 20:29:51 -0500
commit05dc3e4fc19d056ce99a7b110665adab2ca1ea21 (patch)
tree6fc09bf9f0b424ab4a0b8a9f4a164fe330230e26
parent080606ad528972623e1ed1124d8efe7705a73446 (diff)
Clarify R500 US setup.
-rw-r--r--src/radeon_reg.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 03657d1..5469e9d 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -4038,8 +4038,10 @@
/*
* The R500 unified shader (US) registers come in banks of 512 each, one
- * for each instruction slot in the shader. The base _0 registers are
- * defined here, use offsets to program the others.
+ * for each instruction slot in the shader. You can't touch them directly.
+ * R500_US_VECTOR_INDEX() sets the base instruction to modify; successive
+ * writes to R500_GA_US_VECTOR_DATA autoincrement the index after the
+ * instruction is fully specified.
*/
#define R500_US_ALU_ALPHA_INST_0 0xa800
# define R500_ALPHA_OP_MAD 0