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authorAlex Deucher <alex@cube.(none)>2008-02-12 14:46:49 -0500
committerAlex Deucher <alex@cube.(none)>2008-02-12 14:46:49 -0500
commit860f5af75274cb236f536e1da09da6bd9a579530 (patch)
tree8d8500e4620d21c69110e9cfb964602a9adf584b
parent32f2119b43a0faf6069d8cc0816f0d9f7914c07f (diff)
R6xx: fix up use of bios scratch regs to reflect the new offsets
-rw-r--r--src/atombios_output.c9
-rw-r--r--src/radeon_driver.c66
-rw-r--r--src/radeon_output.c33
-rw-r--r--src/radeon_reg.h9
4 files changed, 79 insertions, 38 deletions
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 921a386..6c638b1 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -427,7 +427,6 @@ void
atombios_output_dpms(xf86OutputPtr output, int mode)
{
RADEONOutputPrivatePtr radeon_output = output->driver_private;
- RADEONInfoPtr info = RADEONPTR(output->scrn);
ErrorF("AGD: output dpms %d\n", mode);
@@ -452,7 +451,8 @@ atombios_output_dpms(xf86OutputPtr output, int mode)
ErrorF("AGD: cv dpms\n");
if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT)
atombios_device_dpms(output, ATOM_DEVICE_CV_SUPPORT, mode);
- } else if (0 /*OUTPUT_IS_TV*/) {
+ } else if (0 /*radeon_output->MonType == MT_STV ||
+ radeon_output->MonType == MT_CTV*/) {
ErrorF("AGD: tv dpms\n");
if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT)
atombios_device_dpms(output, ATOM_DEVICE_TV1_SUPPORT, mode);
@@ -642,7 +642,10 @@ atombios_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output)
ret = atom_bios_dac_load_detect(info->atomBIOS, output);
if (ret == ATOM_SUCCESS) {
- bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH);
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ bios_0_scratch = INREG(R600_BIOS_0_SCRATCH);
+ else
+ bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH);
ErrorF("DAC connect %08X\n", (unsigned int)bios_0_scratch);
if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) {
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 3ba7ce8..9c5fce6 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2988,9 +2988,6 @@ RADEONInitBIOSRegisters(ScrnInfoPtr pScrn)
unsigned char *RADEONMMIO = info->MMIO;
RADEONSavePtr save = info->ModeReg;
- if (info->ChipFamily >= CHIP_FAMILY_R600)
- return;
-
save->bios_0_scratch = info->SavedReg->bios_0_scratch;
save->bios_1_scratch = info->SavedReg->bios_1_scratch;
save->bios_2_scratch = info->SavedReg->bios_2_scratch;
@@ -3006,8 +3003,13 @@ RADEONInitBIOSRegisters(ScrnInfoPtr pScrn)
/* tell the bios not to handle mode switching */
save->bios_6_scratch |= ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH;
- OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch);
- OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch);
+ if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch);
+ OUTREG(R600_BIOS_6_SCRATCH, save->bios_6_scratch);
+ } else {
+ OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch);
+ OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch);
+ }
} else {
/* let the bios control the backlight */
save->bios_0_scratch &= ~RADEON_DRIVER_BRIGHTNESS_EN;
@@ -4361,14 +4363,25 @@ RADEONRestoreBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
- OUTREG(RADEON_BIOS_0_SCRATCH, restore->bios_0_scratch);
- OUTREG(RADEON_BIOS_1_SCRATCH, restore->bios_1_scratch);
- OUTREG(RADEON_BIOS_2_SCRATCH, restore->bios_2_scratch);
- OUTREG(RADEON_BIOS_3_SCRATCH, restore->bios_3_scratch);
- OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch);
- OUTREG(RADEON_BIOS_5_SCRATCH, restore->bios_5_scratch);
- OUTREG(RADEON_BIOS_6_SCRATCH, restore->bios_6_scratch);
- OUTREG(RADEON_BIOS_7_SCRATCH, restore->bios_7_scratch);
+ if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ OUTREG(R600_BIOS_0_SCRATCH, restore->bios_0_scratch);
+ OUTREG(R600_BIOS_1_SCRATCH, restore->bios_1_scratch);
+ OUTREG(R600_BIOS_2_SCRATCH, restore->bios_2_scratch);
+ OUTREG(R600_BIOS_3_SCRATCH, restore->bios_3_scratch);
+ OUTREG(R600_BIOS_4_SCRATCH, restore->bios_4_scratch);
+ OUTREG(R600_BIOS_5_SCRATCH, restore->bios_5_scratch);
+ OUTREG(R600_BIOS_6_SCRATCH, restore->bios_6_scratch);
+ OUTREG(R600_BIOS_7_SCRATCH, restore->bios_7_scratch);
+ } else {
+ OUTREG(RADEON_BIOS_0_SCRATCH, restore->bios_0_scratch);
+ OUTREG(RADEON_BIOS_1_SCRATCH, restore->bios_1_scratch);
+ OUTREG(RADEON_BIOS_2_SCRATCH, restore->bios_2_scratch);
+ OUTREG(RADEON_BIOS_3_SCRATCH, restore->bios_3_scratch);
+ OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch);
+ OUTREG(RADEON_BIOS_5_SCRATCH, restore->bios_5_scratch);
+ OUTREG(RADEON_BIOS_6_SCRATCH, restore->bios_6_scratch);
+ OUTREG(RADEON_BIOS_7_SCRATCH, restore->bios_7_scratch);
+ }
}
static void
@@ -4377,14 +4390,25 @@ RADEONSaveBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
- save->bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH);
- save->bios_1_scratch = INREG(RADEON_BIOS_1_SCRATCH);
- save->bios_2_scratch = INREG(RADEON_BIOS_2_SCRATCH);
- save->bios_3_scratch = INREG(RADEON_BIOS_3_SCRATCH);
- save->bios_4_scratch = INREG(RADEON_BIOS_4_SCRATCH);
- save->bios_5_scratch = INREG(RADEON_BIOS_5_SCRATCH);
- save->bios_6_scratch = INREG(RADEON_BIOS_6_SCRATCH);
- save->bios_7_scratch = INREG(RADEON_BIOS_7_SCRATCH);
+ if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ save->bios_0_scratch = INREG(R600_BIOS_0_SCRATCH);
+ save->bios_1_scratch = INREG(R600_BIOS_1_SCRATCH);
+ save->bios_2_scratch = INREG(R600_BIOS_2_SCRATCH);
+ save->bios_3_scratch = INREG(R600_BIOS_3_SCRATCH);
+ save->bios_4_scratch = INREG(R600_BIOS_4_SCRATCH);
+ save->bios_5_scratch = INREG(R600_BIOS_5_SCRATCH);
+ save->bios_6_scratch = INREG(R600_BIOS_6_SCRATCH);
+ save->bios_7_scratch = INREG(R600_BIOS_7_SCRATCH);
+ } else {
+ save->bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH);
+ save->bios_1_scratch = INREG(RADEON_BIOS_1_SCRATCH);
+ save->bios_2_scratch = INREG(RADEON_BIOS_2_SCRATCH);
+ save->bios_3_scratch = INREG(RADEON_BIOS_3_SCRATCH);
+ save->bios_4_scratch = INREG(RADEON_BIOS_4_SCRATCH);
+ save->bios_5_scratch = INREG(RADEON_BIOS_5_SCRATCH);
+ save->bios_6_scratch = INREG(RADEON_BIOS_6_SCRATCH);
+ save->bios_7_scratch = INREG(RADEON_BIOS_7_SCRATCH);
+ }
}
/* Save everything needed to restore the original VC state */
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 4194654..50bceba 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -665,9 +665,6 @@ radeon_bios_output_lock(xf86OutputPtr output, Bool lock)
unsigned char *RADEONMMIO = info->MMIO;
RADEONSavePtr save = info->ModeReg;
- if (info->ChipFamily >= CHIP_FAMILY_R600)
- return;
-
if (info->IsAtomBios) {
if (lock) {
save->bios_6_scratch |= (ATOM_S6_CRITICAL_STATE | ATOM_S6_ACC_MODE);
@@ -681,7 +678,10 @@ radeon_bios_output_lock(xf86OutputPtr output, Bool lock)
save->bios_6_scratch &= ~(RADEON_DRIVER_CRITICAL | RADEON_ACC_MODE_CHANGE);
}
}
- OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch);
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ OUTREG(R600_BIOS_6_SCRATCH, save->bios_6_scratch);
+ else
+ OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch);
}
static void
@@ -693,9 +693,6 @@ radeon_bios_output_dpms(xf86OutputPtr output, int mode)
unsigned char *RADEONMMIO = info->MMIO;
RADEONSavePtr save = info->ModeReg;
- if (info->ChipFamily >= CHIP_FAMILY_R600)
- return;
-
if (info->IsAtomBios) {
if (mode == DPMSModeOn) {
if (radeon_output->MonType == MT_STV ||
@@ -772,8 +769,13 @@ radeon_bios_output_dpms(xf86OutputPtr output, int mode)
}
}
}
- OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch);
- OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch);
+ if (info->ChipFamily >= CHIP_FAMILY_R600) {
+ OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch);
+ OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch);
+ } else {
+ OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch);
+ OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch);
+ }
} else {
if (mode == DPMSModeOn) {
save->bios_6_scratch &= ~(RADEON_DPMS_MASK | RADEON_SCREEN_BLANKING);
@@ -838,9 +840,6 @@ radeon_bios_output_crtc(xf86OutputPtr output)
xf86CrtcPtr crtc = output->crtc;
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
- if (info->ChipFamily >= CHIP_FAMILY_R600)
- return;
-
if (info->IsAtomBios) {
if (radeon_output->MonType == MT_STV ||
radeon_output->MonType == MT_CTV) {
@@ -878,7 +877,10 @@ radeon_bios_output_crtc(xf86OutputPtr output)
save->bios_3_scratch |= (radeon_crtc->crtc_id << 25);
}
}
- OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch);
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch);
+ else
+ OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch);
} else {
if (radeon_output->MonType == MT_STV ||
radeon_output->MonType == MT_CTV) {
@@ -972,7 +974,10 @@ radeon_bios_output_connected(xf86OutputPtr output, Bool connected)
save->bios_0_scratch &= ~ATOM_S0_DFP3;
}
}
- OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch);
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ OUTREG(R600_BIOS_0_SCRATCH, save->bios_0_scratch);
+ else
+ OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch);
} else {
if (connected) {
if (radeon_output->MonType == MT_STV)
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index b68e25c..61cdb15 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3809,6 +3809,15 @@
#define R600_CONFIG_F0_BASE 0x542C
#define R600_CONFIG_APER_SIZE 0x5430
+#define R600_BIOS_0_SCRATCH 0x1724
+#define R600_BIOS_1_SCRATCH 0x1728
+#define R600_BIOS_2_SCRATCH 0x172c
+#define R600_BIOS_3_SCRATCH 0x1730
+#define R600_BIOS_4_SCRATCH 0x1734
+#define R600_BIOS_5_SCRATCH 0x1738
+#define R600_BIOS_6_SCRATCH 0x173c
+#define R600_BIOS_7_SCRATCH 0x1740
+
#define R300_GB_TILE_CONFIG 0x4018
#define R300_GB_SELECT 0x401c
#define R300_GB_ENABLE 0x4008