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authorAlex Deucher <alex@botch2.com>2007-07-29 15:23:14 -0400
committerAlex Deucher <alex@botch2.com>2007-07-29 15:23:14 -0400
commit6b9b7a7bdc290d07de9b226691ec8025af8db896 (patch)
treead5ec5300554d97a871b4552425b4bd7edac8ca1 /src/radeon_display.c
parent8d043db1817d94edeb72ab208dfea60026715d48 (diff)
RADEON: Initial pass at integrated tv out support
Based on the GATOS tv-out support by Federico Ulivi <fulivi@lycos.com> and information from ati with substantial rework by myself. Code is not actually hooked up yet.
Diffstat (limited to 'src/radeon_display.c')
-rw-r--r--src/radeon_display.c33
1 files changed, 31 insertions, 2 deletions
diff --git a/src/radeon_display.c b/src/radeon_display.c
index 79fb352..059dfca 100644
--- a/src/radeon_display.c
+++ b/src/radeon_display.c
@@ -360,12 +360,27 @@ void RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
OUTREG(RADEON_LVDS_GEN_CNTL, tmp);
save->lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_BLON);
save->lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
- }
+ } else if (radeon_output->MonType == MT_STV ||
+ radeon_output->MonType == MT_CTV) {
+#if 0
+ /* TV_MASTER_CNTL ??? */
+
+ /* XXX: FIXME: STV vs CTV and DACPD bits */
+ tmp = INREG(RADEON_TV_DAC_CNTL);
+ tmp |= (TV_DAC_CNTL_NBLANK | TV_DAC_CNTL_NHOLD);
+ tmp &= ~(TV_DAC_CNTL_BGSLEEP | TV_DAC_CNTL_RDACPD
+ | TV_DAC_CNTL_GDACPD | TV_DAC_CNTL_BDACPD);
+ OUTREG(RADEON_TV_DAC_CNTL, tmp);
+ save->tv_dac_cntl |= (TV_DAC_CNTL_NBLANK | TV_DAC_CNTL_NHOLD);
+ save->tv_dac_cntl &= ~(TV_DAC_CNTL_BGSLEEP | TV_DAC_CNTL_RDACPD
+ | TV_DAC_CNTL_GDACPD | TV_DAC_CNTL_BDACPD);
+#endif
+ }
} else {
if (radeon_output->MonType == MT_CRT || radeon_output->MonType == NONE) {
if (radeon_output->DACType == DAC_PRIMARY) {
tmp = INREG(RADEON_CRTC_EXT_CNTL);
- tmp &= ~RADEON_CRTC_CRT_ON;
+ tmp &= ~RADEON_CRTC_CRT_ON;
OUTREG(RADEON_CRTC_EXT_CNTL, tmp);
save->crtc_ext_cntl &= ~RADEON_CRTC_CRT_ON;
} else if (radeon_output->DACType == DAC_TVDAC) {
@@ -417,6 +432,20 @@ void RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmpPixclksCntl);
}
}
+
+ if (radeon_output->MonType == MT_STV ||
+ radeon_output->MonType == MT_CTV) {
+
+ /* TV_MASTER_CNTL ??? */
+#if 0
+ tmp = INREG(RADEON_TV_DAC_CNTL);
+ tmp &= ~(TV_DAC_CNTL_NBLANK | TV_DAC_CNTL_NHOLD);
+ tmp |= (TV_DAC_CNTL_BGSLEEP | TV_DAC_CNTL_RDACPD | TV_DAC_CNTL_GDACPD | TV_DAC_CNTL_BDACPD);
+ OUTREG(RADEON_TV_DAC_CNTL, tmp);
+ save->tv_dac_cntl &= ~(TV_DAC_CNTL_NBLANK | TV_DAC_CNTL_NHOLD);
+ save->tv_dac_cntl |= (TV_DAC_CNTL_BGSLEEP | TV_DAC_CNTL_RDACPD | TV_DAC_CNTL_GDACPD | TV_DAC_CNTL_BDACPD);
+#endif
+ }
}
}