radeon: Fix for pci-rework.

Surprisingly easy, thanks to George's pci-rework changes.

1 files changed, 92 insertions, 32 deletions

diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index d434116..6f8a753 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -525,6 +525,8 @@ static Bool RADEONMapMMIO(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr  info = RADEONPTR(pScrn);
 
+#ifndef XSERVER_LIBPCIACCESS
+
     info->MMIO = xf86MapPciMem(pScrn->scrnIndex,
 			       VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
 			       info->PciTag,
@@ -532,6 +534,25 @@ static Bool RADEONMapMMIO(ScrnInfoPtr pScrn)
 			       info->MMIOSize);
 
     if (!info->MMIO) return FALSE;
+
+#else
+
+    void** result = (void**)&info->MMIO;
+    int err = pci_device_map_range(info->PciInfo,
+				   info->MMIOAddr,
+				   info->MMIOSize,
+				   PCI_DEV_MAP_FLAG_WRITABLE,
+				   result);
+
+    if (err) {
+	xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                    "Unable to map MMIO aperture. %s (%d)\n",
+                    strerror (err), err);
+	return FALSE;
+    }
+
+#endif
+
     return TRUE;
 }
 
@@ -542,7 +563,11 @@ static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr  info = RADEONPTR(pScrn);
 
+#ifndef XSERVER_LIBPCIACCESS
     xf86UnMapVidMem(pScrn->scrnIndex, info->MMIO, info->MMIOSize);
+#else
+    pci_device_unmap_range(info->PciInfo, info->MMIO, info->MMIOSize);
+#endif
 
     info->MMIO = NULL;
     return TRUE;
@@ -555,6 +580,9 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn)
 
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
 		   "Map: 0x%08lx, 0x%08lx\n", info->LinearAddr, info->FbMapSize);
+
+#ifndef XSERVER_LIBPCIACCESS
+
     info->FB = xf86MapPciMem(pScrn->scrnIndex,
 			     VIDMEM_FRAMEBUFFER,
 			     info->PciTag,
@@ -562,6 +590,25 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn)
 			     info->FbMapSize);
 
     if (!info->FB) return FALSE;
+
+#else
+
+    int err = pci_device_map_range(info->PciInfo,
+				   info->LinearAddr,
+				   info->FbMapSize,
+				   PCI_DEV_MAP_FLAG_WRITABLE |
+				   PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+				   &info->FB);
+
+    if (err) {
+	xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+                    "Unable to map FB aperture. %s (%d)\n",
+                    strerror (err), err);
+	return FALSE;
+    }
+
+#endif
+
     return TRUE;
 }
 
@@ -570,7 +617,12 @@ static Bool RADEONUnmapFB(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr  info = RADEONPTR(pScrn);
 
+#ifndef XSERVER_LIBPCIACCESS
     xf86UnMapVidMem(pScrn->scrnIndex, info->FB, info->FbMapSize);
+#else
+    pci_device_unmap_range(info->PciInfo, info->FB, info->FbMapSize);
+#endif
+
     info->FB = NULL;
     return TRUE;
 }
@@ -1271,6 +1323,7 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn)
     RADEONInfoPtr  info   = RADEONPTR(pScrn);
     unsigned char *RADEONMMIO = info->MMIO;
     CARD32	   aper_size = INREG(RADEON_CONFIG_APER_SIZE) / 1024;
+    unsigned char  byte;
 
 #ifdef XF86DRI
     /* If we use the DRI, we need to check if it's a version that has the
@@ -1311,7 +1364,8 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn)
      * check if it's a multifunction card by reading the PCI config
      * header type... Limit those to one aperture size
      */
-    if (pciReadByte(info->PciTag, 0xe) & 0x80) {
+    PCI_READ_BYTE(info->PciInfo, &byte, 0xe);
+    if (byte & 0x80) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		   "Generation 1 PCI interface in multifunction mode"
 		   ", accessible memory limited to one aperture\n");
@@ -1359,7 +1413,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
     accessible = RADEONGetAccessibleVRAM(pScrn);
 
     /* Crop it to the size of the PCI BAR */
-    bar_size = (1ul << info->PciInfo->size[0]) / 1024;
+    bar_size = PCI_REGION_SIZE(info->PciInfo, 0) / 1024;
     if (bar_size == 0)
 	bar_size = 0x20000;
     if (accessible > bar_size)
@@ -1419,6 +1473,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
     MessageType    from = X_PROBED;
 #ifdef XF86DRI
     const char *s;
+    uint32_t cmd_stat;
 #endif
 
     /* Chipset */
@@ -1430,7 +1485,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
 	info->Chipset  = dev->chipID;
 	from           = X_CONFIG;
     } else {
-	info->Chipset = info->PciInfo->chipType;
+	info->Chipset = PCI_DEV_DEVICE_ID(info->PciInfo);
     }
 
     pScrn->chipset = (char *)xf86TokenToString(RADEONChipsets, info->Chipset);
@@ -1470,17 +1525,17 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
 	info->ChipFamily = CHIP_FAMILY_RV100;
 
 	/* DELL triple-head configuration. */
-	if ((info->PciInfo->subsysVendor == PCI_VENDOR_DELL) &&
-	    ((info->PciInfo->subsysCard  == 0x016c) ||
-	    (info->PciInfo->subsysCard   == 0x016d) ||
-	    (info->PciInfo->subsysCard   == 0x016e) ||
-	    (info->PciInfo->subsysCard   == 0x016f) ||
-	    (info->PciInfo->subsysCard   == 0x0170) ||
-	    (info->PciInfo->subsysCard   == 0x017d) ||
-	    (info->PciInfo->subsysCard   == 0x017e) ||
-	    (info->PciInfo->subsysCard   == 0x0183) ||
-	    (info->PciInfo->subsysCard   == 0x018a) ||
-	    (info->PciInfo->subsysCard   == 0x019a))) {
+	if ((PCI_SUB_VENDOR_ID(info->PciInfo) == PCI_VENDOR_DELL) &&
+	    ((PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016c) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016d) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016e) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x016f) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x0170) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x017d) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x017e) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x0183) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x018a) ||
+	     (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x019a))) {
 	    info->IsDellServer = TRUE;
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DELL server detected, force to special setup\n");
 	}
@@ -1702,7 +1757,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
 
 
     from               = X_PROBED;
-    info->LinearAddr   = info->PciInfo->memBase[0] & 0xfe000000;
+    info->LinearAddr   = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & 0xfe000000;
     pScrn->memPhysBase = info->LinearAddr;
     if (dev->MemBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -1719,6 +1774,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
     xf86DrvMsg(pScrn->scrnIndex, from,
 	       "Linear framebuffer at 0x%08lx\n", info->LinearAddr);
 
+#ifndef XSERVER_LIBPCIACCESS
 				/* BIOS */
     from              = X_PROBED;
     info->BIOSAddr    = info->PciInfo->biosBase & 0xfffe0000;
@@ -1734,6 +1790,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
 	xf86DrvMsg(pScrn->scrnIndex, from,
 		   "BIOS at 0x%08lx\n", info->BIOSAddr);
     }
+#endif
 
 				/* Read registers used to determine options */
     /* Check chip errata */
@@ -1796,15 +1853,15 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
 
     info->cardType = CARD_PCI;
 
-    if (pciReadLong(info->PciTag, PCI_CMD_STAT_REG) & RADEON_CAP_LIST) {
-	CARD32 cap_ptr, cap_id;
-	
-	cap_ptr = pciReadLong(info->PciTag,
-			      RADEON_CAPABILITIES_PTR_PCI_CONFIG)
-	    & RADEON_CAP_PTR_MASK;
+    PCI_READ_LONG(info->PciInfo, &cmd_stat, PCI_CMD_STAT_REG);
+    if (cmd_stat & RADEON_CAP_LIST) {
+	uint32_t cap_ptr, cap_id;
+
+	PCI_READ_LONG(info->PciInfo, &cap_ptr, RADEON_CAPABILITIES_PTR_PCI_CONFIG);
+	cap_ptr &= RADEON_CAP_PTR_MASK;
 
 	while(cap_ptr != RADEON_CAP_ID_NULL) {
-	    cap_id = pciReadLong(info->PciTag, cap_ptr);
+	    PCI_READ_LONG(info->PciInfo, &cap_id, cap_ptr);
 	    if ((cap_id & 0xff)== RADEON_CAP_ID_AGP) {
 		info->cardType = CARD_AGP;
 		break;
@@ -1991,7 +2048,7 @@ static Bool RADEONPreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10)
 	/* The VGA BIOS on the RV100/QY cannot be read when the digital output
 	 * is enabled.  Clear and restore FP2_ON around int10 to avoid this.
 	 */
-	if (info->PciInfo->chipType == PCI_CHIP_RV100_QY) {
+	if (PCI_DEV_DEVICE_ID(info->PciInfo) == PCI_CHIP_RV100_QY) {
 	    fp2_gen_ctl_save = INREG(RADEON_FP2_GEN_CNTL);
 	    if (fp2_gen_ctl_save & RADEON_FP2_ON) {
 		xf86DrvMsg(pScrn->scrnIndex, X_INFO, "disabling digital out\n");
@@ -2527,11 +2584,11 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
     if (info->pEnt->location.type != BUS_PCI) goto fail;
 
     info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index);
-    info->PciTag  = pciTag(info->PciInfo->bus,
-			   info->PciInfo->device,
-			   info->PciInfo->func);
-    info->MMIOAddr   = info->PciInfo->memBase[2] & 0xffffff00;
-    info->MMIOSize  = (1 << info->PciInfo->size[2]);
+    info->PciTag  = pciTag(PCI_DEV_BUS(info->PciInfo),
+			   PCI_DEV_DEV(info->PciInfo),
+			   PCI_DEV_FUNC(info->PciInfo));
+    info->MMIOAddr = PCI_REGION_BASE(info->PciInfo, 2, REGION_MEM) & 0xffffff00;
+    info->MMIOSize = PCI_REGION_SIZE(info->PciInfo, 2);
     if (info->pEnt->device->IOBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
 		   "MMIO address override, using 0x%08lx instead of 0x%08lx\n",
@@ -2552,7 +2609,10 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
     }
 
 #if !defined(__alpha__)
-    if (xf86GetPciDomain(info->PciTag) ||
+    if (
+#ifndef XSERVER_LIBPCIACCESS
+	xf86GetPciDomain(info->PciTag) ||
+#endif
 	!xf86IsPrimaryPci(info->PciInfo))
 	RADEONPreInt10Save(pScrn, &int10_save);
 #else
@@ -2574,9 +2634,9 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 	       "PCI bus %d card %d func %d\n",
-	       info->PciInfo->bus,
-	       info->PciInfo->device,
-	       info->PciInfo->func);
+	       PCI_DEV_BUS(info->PciInfo),
+	       PCI_DEV_DEV(info->PciInfo),
+	       PCI_DEV_FUNC(info->PciInfo));
 
     if (xf86RegisterResources(info->pEnt->index, 0, ResExclusive))
 	goto fail;