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authorMichel Daenzer <michel@daenzer.net>2004-08-30 04:31:50 +0000
committerMichel Daenzer <michel@daenzer.net>2004-08-30 04:31:50 +0000
commitc829f667c8a79bbdd40e1f924d57638e7bd425dc (patch)
treee103211413feb1e3e6e40df5b920e78ff11574eb /src/radeon_render.c
parent677246740b5b538e73a7fbde661ec6a97319430b (diff)
Hotfix for Eric Anholt's fix for bug #1156 : Clear theXORG-6_7_99_904
RADEON_NONSURF_AP0_SWP_16BPP bit for 4 bpp data, otherwise it breaks at depth 16.
Diffstat (limited to 'src/radeon_render.c')
-rw-r--r--src/radeon_render.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/radeon_render.c b/src/radeon_render.c
index f05c850..145b653 100644
--- a/src/radeon_render.c
+++ b/src/radeon_render.c
@@ -312,8 +312,9 @@ static Bool RADEONSetupRenderByteswap(ScrnInfoPtr pScrn, int tex_bytepp)
| RADEON_NONSURF_AP0_SWP_16BPP);
break;
case 4:
- OUTREG(RADEON_SURFACE_CNTL, info->ModeReg.surface_cntl
- | RADEON_NONSURF_AP0_SWP_32BPP);
+ OUTREG(RADEON_SURFACE_CNTL, (info->ModeReg.surface_cntl &
+ ~RADEON_NONSURF_AP0_SWP_16BPP)
+ | RADEON_NONSURF_AP0_SWP_32BPP);
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "%s: Don't know what to do for "