diff options
| author | Kusanagi Kouichi <slash@ma.neweb.ne.jp> | 2008-01-19 15:04:21 +0100 |
|---|---|---|
| committer | Michel Dänzer <michel@tungstengraphics.com> | 2008-01-19 15:04:21 +0100 |
| commit | 7238258c12def8ef273e5362f716d165f720c5a5 (patch) | |
| tree | 706eff06813f934ed3177baa9a8422498aebf279 /src/radeon_video.c | |
| parent | 32be3cf9d6c34e60ff8c3d6cfe9f73f1869c50e4 (diff) | |
radeon: Partial fix for XVideo RGB image distortions.
Diffstat (limited to 'src/radeon_video.c')
| -rw-r--r-- | src/radeon_video.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/radeon_video.c b/src/radeon_video.c index 29d6508..92b4a61 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -2733,7 +2733,8 @@ RADEONDisplayVideo( } else { left = (left >> 16) & 7; - leftuv = left >> 1; + if (!is_rgb) + leftuv = left >> 1; } RADEONWaitForFifo(pScrn, 2); @@ -2742,7 +2743,7 @@ RADEONDisplayVideo( while(!(INREG(RADEON_OV0_REG_LOAD_CNTL) & RADEON_REG_LD_CTL_LOCK_READBACK)); RADEONWaitForFifo(pScrn, 10); - OUTREG(RADEON_OV0_H_INC, h_inc | ((h_inc_uv >> 1) << 16)); + OUTREG(RADEON_OV0_H_INC, h_inc | ((is_rgb? h_inc_uv: (h_inc_uv >> 1)) << 16)); OUTREG(RADEON_OV0_STEP_BY, step_by_y | (step_by_uv << 8) | predownscale << 4 | predownscale << 12); @@ -2807,7 +2808,8 @@ RADEONDisplayVideo( OUTREG(RADEON_OV0_VID_BUF_PITCH0_VALUE, pitch); OUTREG(RADEON_OV0_VID_BUF_PITCH1_VALUE, is_planar ? pitch >> 1 : pitch); OUTREG(RADEON_OV0_P1_X_START_END, (src_w + left - 1) | (left << 16)); - src_w >>= 1; + if (!is_rgb) + src_w >>= 1; OUTREG(RADEON_OV0_P2_X_START_END, (src_w + leftuv - 1) | (leftuv << 16)); OUTREG(RADEON_OV0_P3_X_START_END, (src_w + leftuv - 1) | (leftuv << 16)); OUTREG(RADEON_OV0_VID_BUF0_BASE_ADRS, offset1); |