diff options
| -rw-r--r-- | src/atombios_crtc.c | 36 | ||||
| -rw-r--r-- | src/radeon_crtc.c | 2 | ||||
| -rw-r--r-- | src/radeon_reg.h | 4 |
3 files changed, 35 insertions, 7 deletions
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c index 3c61ef7..5b09107 100644 --- a/src/atombios_crtc.c +++ b/src/atombios_crtc.c @@ -238,7 +238,7 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode) SET_PIXEL_CLOCK_PS_ALLOCATION spc_param; void *ptr; AtomBiosArgRec data; - unsigned char *space; + unsigned char *space; RADEONSavePtr save = info->ModeReg; if (IS_AVIVO_VARIANT) { @@ -383,7 +383,8 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc, default: FatalError("Unsupported screen depth: %d\n", xf86GetDepth()); } - if (info->tilingEnabled) { + + if (info->tilingEnabled && (crtc->rotatedData == NULL)) { radeon_crtc->fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; } @@ -394,24 +395,47 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc, /* setup fb format and location */ - OUTREG(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset, (x << 16) | y); - OUTREG(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, - (mode->HDisplay << 16) | mode->VDisplay); + if (crtc->rotatedData != NULL) { + /* x/y offset is already included */ + x = 0; + y = 0; + fb_location = fb_location + (char *)crtc->rotatedData - (char *)info->FB; + } + + /* lock the grph regs */ + OUTREG(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, AVIVO_D1GRPH_UPDATE_LOCK); OUTREG(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location); OUTREG(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location); OUTREG(AVIVO_D1GRPH_CONTROL + radeon_crtc->crtc_offset, radeon_crtc->fb_format); + OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0); + OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0); + OUTREG(AVIVO_D1GRPH_X_START + radeon_crtc->crtc_offset, 0); + OUTREG(AVIVO_D1GRPH_Y_START + radeon_crtc->crtc_offset, 0); OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, crtc->scrn->virtualX); OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, crtc->scrn->virtualY); OUTREG(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, crtc->scrn->displayWidth); - OUTREG(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1); + /* unlock the grph regs */ + OUTREG(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, 0); + + /* lock the mode regs */ + OUTREG(AVIVO_D1SCL_UPDATE + radeon_crtc->crtc_offset, AVIVO_D1SCL_UPDATE_LOCK); + + OUTREG(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, + crtc->scrn->virtualY); + OUTREG(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset, (x << 16) | y); + OUTREG(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, + (mode->HDisplay << 16) | mode->VDisplay); + /* unlock the mode regs */ + OUTREG(AVIVO_D1SCL_UPDATE + radeon_crtc->crtc_offset, 0); + } atombios_crtc_set_pll(crtc, adjusted_mode); diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index fa2aba0..caf7369 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -1268,7 +1268,7 @@ radeon_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height) if (!data) data = radeon_crtc_shadow_allocate(crtc, width, height); - + rotate_pitch = pScrn->displayWidth * cpp; rotate_pixmap = GetScratchPixmapHeader(pScrn->pScreen, diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 8737d2e..e7ef932 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -3390,6 +3390,7 @@ #define AVIVO_D1GRPH_X_END 0x6134 #define AVIVO_D1GRPH_Y_END 0x6138 #define AVIVO_D1GRPH_UPDATE 0x6144 +# define AVIVO_D1GRPH_UPDATE_LOCK (1<<16) #define AVIVO_D1GRPH_FLIP_CONTROL 0x6148 #define AVIVO_D1CUR_CONTROL 0x6400 @@ -3421,12 +3422,15 @@ #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8 +#define AVIVO_D1MODE_DESKTOP_HEIGHT 0x652C #define AVIVO_D1MODE_VIEWPORT_START 0x6580 #define AVIVO_D1MODE_VIEWPORT_SIZE 0x6584 #define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6588 #define AVIVO_D1MODE_EXT_OVERSCAN_TOP_BOTTOM 0x658c #define AVIVO_D1SCL_SCALER_ENABLE 0x6590 +#define AVIVO_D1SCL_UPDATE 0x65cc +# define AVIVO_D1SCL_UPDATE_LOCK (1<<16) /* second crtc */ #define AVIVO_D2CRTC_H_TOTAL 0x6800 |