diff options
| -rw-r--r-- | src/radeon.h | 1 | ||||
| -rw-r--r-- | src/radeon_driver.c | 2 | ||||
| -rw-r--r-- | src/radeon_video.c | 39 | ||||
| -rw-r--r-- | src/radeon_video.h | 1 |
4 files changed, 23 insertions, 20 deletions
diff --git a/src/radeon.h b/src/radeon.h index 4c3cbcc..1f44163 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -742,6 +742,7 @@ typedef struct { } MM_TABLE; CARD16 video_decoder_type; int overlay_scaler_buffer_width; + int ecp_div; /* Render */ Bool RenderAccel; diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 566197c..ab19b22 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -6595,6 +6595,8 @@ _X_EXPORT Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) RADEONResetDPI(pScrn, FALSE); } + info->ecp_div = -1; + return ret; } diff --git a/src/radeon_video.c b/src/radeon_video.c index 237f653..83b4fd2 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -1275,6 +1275,7 @@ RADEONAllocAdaptor(ScrnInfoPtr pScrn) RADEONInfoPtr info = RADEONPTR(pScrn); RADEONPortPrivPtr pPriv; CARD32 dot_clock; + int ecp; if(!(adapt = xf86XVAllocateVideoAdaptorRec(pScrn))) return NULL; @@ -1339,32 +1340,28 @@ RADEONAllocAdaptor(ScrnInfoPtr pScrn) dot_clock = info->ModeReg.dot_clock_freq; if(dot_clock < 17500) - pPriv->ecp_div = 0; + info->ecp_div = 0; else - pPriv->ecp_div = 1; - + info->ecp_div = 1; + ecp = (INPLL(pScrn, RADEON_VCLK_ECP_CNTL) & 0xfffffCff) | (info->ecp_div << 8); #if 0 - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Dotclock is %g Mhz, setting ecp_div to %d\n", info->ModeReg.dot_clock_freq/100.0, pPriv->ecp_div); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Dotclock is %g Mhz, setting ecp_div to %d\n", info->ModeReg.dot_clock_freq/100.0, info->ecp_div); #endif - OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, (INPLL(pScrn, RADEON_VCLK_ECP_CNTL) & - 0xfffffCff) | (pPriv->ecp_div << 8)); - - /* I suspect we may need a usleep after writing to the PLL. if you play a video too soon - after switching crtcs in mergedfb clone mode you get a temporary one pixel line of colorkey - on the right edge video output. */ - if ((info->ChipFamily == CHIP_FAMILY_RS100) || (info->ChipFamily == CHIP_FAMILY_RS200) || (info->ChipFamily == CHIP_FAMILY_RS300)) { /* Force the overlay clock on for integrated chips */ - OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, - (INPLL(pScrn, RADEON_VCLK_ECP_CNTL) | (1<<18))); + ecp |= (1<<18); } + OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, ecp); + + + /* Decide on tuner type */ if((info->tunerType<0) && (info->MM_TABLE_valid)) { pPriv->tuner_type = info->MM_TABLE.tuner_type; @@ -2453,10 +2450,9 @@ RADEONDisplayVideo( break; } - /* Unlike older Mach64 chips, RADEON has only two ECP settings: 0 for PIXCLK < 175Mhz, and 1 (divide by 2) - for higher clocks, sure makes life nicer - - Here we need to find ecp_div again, as the user may have switched resolutions */ + /* Here we need to find ecp_div again, as the user may have switched resolutions + but only call OUTPLL/INPLL if needed since it may cause a 10ms delay due to + workarounds for chip erratas */ /* Figure out which head we are on for dot clock */ if ((info->MergedFB && info->OverlayOnCRTC2) || info->IsSecondary) @@ -2469,12 +2465,17 @@ RADEONDisplayVideo( else ecp_div = 1; - OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, + if (ecp_div != info->ecp_div) { + info->ecp_div = ecp_div; + OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL, (INPLL(pScrn, RADEON_VCLK_ECP_CNTL) & 0xfffffCff) | (ecp_div << 8)); + } /* I suspect we may need a usleep after writing to the PLL. if you play a video too soon after switching crtcs in mergedfb clone mode you get a temporary one pixel line of colorkey - on the right edge video output. */ + on the right edge video output. + Is this still the case? Might have been chips which need the errata, + there is now plenty of usleep after INPLL/OUTPLL for those...*/ v_inc_shift = 20; y_mult = 1; diff --git a/src/radeon_video.h b/src/radeon_video.h index 4b97d51..b6d5d2d 100644 --- a/src/radeon_video.h +++ b/src/radeon_video.h @@ -22,7 +22,6 @@ typedef struct { int red_intensity; int green_intensity; int blue_intensity; - int ecp_div; /* overlay composition mode */ int alpha_mode; /* 0 = key mode, 1 = global mode */ |