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-rw-r--r--src/radeon.h6
-rw-r--r--src/radeon_display.c30
-rw-r--r--src/radeon_driver.c15
-rw-r--r--src/radeon_probe.h8
-rw-r--r--src/radeon_video.c36
5 files changed, 41 insertions, 54 deletions
diff --git a/src/radeon.h b/src/radeon.h
index 24d9878..e58747a 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -426,8 +426,9 @@ typedef struct {
Bool R300CGWorkaround;
/* EDID or BIOS values for FPs */
- /* int PanelXRes;
+ int PanelXRes;
int PanelYRes;
+#if 0
int HOverPlus;
int HSyncWidth;
int HBlank;
@@ -436,7 +437,8 @@ typedef struct {
int VBlank;
int PanelPwrDly;
int DotClock;
- */
+#endif
+ // move these to crtc priv rec
int RefDivider;
int FeedbackDivider;
int PostDivider;
diff --git a/src/radeon_display.c b/src/radeon_display.c
index f7a307b..c77ff64 100644
--- a/src/radeon_display.c
+++ b/src/radeon_display.c
@@ -695,6 +695,7 @@ static void RADEONGetPanelInfoFromReg (xf86OutputPtr output)
radeon_output->PanelYRes = 480;
}
+ // move this to crtc function
if (xf86ReturnOptValBool(info->Options, OPTION_LVDS_PROBE_PLL, TRUE)) {
CARD32 ppll_div_sel, ppll_val;
@@ -703,10 +704,10 @@ static void RADEONGetPanelInfoFromReg (xf86OutputPtr output)
ppll_val = INPLL(pScrn, RADEON_PPLL_DIV_0 + ppll_div_sel);
if ((ppll_val & 0x000707ff) == 0x1bb)
goto noprobe;
- radeon_output->FeedbackDivider = ppll_val & 0x7ff;
- radeon_output->PostDivider = (ppll_val >> 16) & 0x7;
- radeon_output->RefDivider = info->pll.reference_div;
- radeon_output->UseBiosDividers = TRUE;
+ info->FeedbackDivider = ppll_val & 0x7ff;
+ info->PostDivider = (ppll_val >> 16) & 0x7;
+ info->RefDivider = info->pll.reference_div;
+ info->UseBiosDividers = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Existing panel PLL dividers will be used.\n");
@@ -733,7 +734,8 @@ static void RADEONUpdatePanelSize(xf86OutputPtr output)
xf86MonPtr ddc = pScrn->monitor->DDC;
DisplayModePtr p;
- if ((radeon_output->UseBiosDividers && radeon_output->DotClock != 0) || (ddc == NULL))
+ // crtc should handle?
+ if ((info->UseBiosDividers && radeon_output->DotClock != 0) || (ddc == NULL))
return;
/* Go thru detailed timing table first */
@@ -758,7 +760,7 @@ static void RADEONUpdatePanelSize(xf86OutputPtr output)
*/
if (radeon_output->PanelXRes < d_timings->h_active &&
radeon_output->PanelYRes < d_timings->v_active &&
- !radeon_output->UseBiosDividers)
+ !info->UseBiosDividers)
match = 1;
if (match) {
@@ -784,7 +786,7 @@ static void RADEONUpdatePanelSize(xf86OutputPtr output)
}
}
- if (radeon_output->UseBiosDividers && radeon_output->DotClock != 0)
+ if (info->UseBiosDividers && radeon_output->DotClock != 0)
return;
/* Search thru standard VESA modes from EDID */
@@ -2538,6 +2540,20 @@ radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
mode->VDisplay < radeon_output->PanelYRes)
adjusted_mode->Flags |= RADEON_USE_RMX;
+ if (adjusted_mode->Flags & RADEON_USE_RMX) {
+ adjusted_mode->CrtcHTotal = mode->CrtcHDisplay + radeon_output->HBlank;
+ adjusted_mode->CrtcHSyncStart = mode->CrtcHDisplay + radeon_output->HOverPlus;
+ adjusted_mode->CrtcHSyncEnd = mode->CrtcHSyncStart + radeon_output->HSyncWidth;
+ adjusted_mode->CrtcVTotal = mode->CrtcVDisplay + radeon_output->VBlank;
+ adjusted_mode->CrtcVSyncStart = mode->CrtcVDisplay + radeon_output->VOverPlus;
+ adjusted_mode->CrtcVSyncEnd = mode->CrtcVSyncStart + radeon_output->VSyncWidth;
+ adjusted_mode->Clock = radeon_output->DotClock;
+ adjusted_mode->Flags = radeon_output->Flags | RADEON_USE_RMX;
+ /* save these for Xv with RMX */
+ info->PanelYRes = radeon_output->PanelYRes;
+ info->PanelXRes = radeon_output->PanelXRes;
+ }
+
return TRUE;
}
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 6f3ee7a..d5cd60e 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -5529,21 +5529,6 @@ Bool RADEONInitCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
save->crtc_more_cntl |= RADEON_CRTC_H_CUTOFF_ACTIVE_EN;
}
- // fix me, move to output
- /*
- if (mode->Flags & RADEON_USE_RMX) {
- mode->CrtcHTotal = mode->CrtcHDisplay + info->HBlank;
- mode->CrtcHSyncStart = mode->CrtcHDisplay + info->HOverPlus;
- mode->CrtcHSyncEnd = mode->CrtcHSyncStart + info->HSyncWidth;
- mode->CrtcVTotal = mode->CrtcVDisplay + info->VBlank;
- mode->CrtcVSyncStart = mode->CrtcVDisplay + info->VOverPlus;
- mode->CrtcVSyncEnd = mode->CrtcVSyncStart + info->VSyncWidth;
- mode->Clock = info->DotClock;
- mode->Flags = info->Flags | RADEON_USE_RMX;
- }
- */
-
-
save->crtc_h_total_disp = ((((mode->CrtcHTotal / 8) - 1) & 0x3ff)
| ((((mode->CrtcHDisplay / 8) - 1) & 0x1ff)
<< 16));
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index d2f9299..9a4a52d 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -126,6 +126,10 @@ typedef struct _RADEONCrtcPrivateRec {
int binding;
/* Lookup table values to be set when the CRTC is enabled */
CARD8 lut_r[256], lut_g[256], lut_b[256];
+ int RefDivider;
+ int FeedbackDivider;
+ int PostDivider;
+ Bool UseBiosDividers;
} RADEONCrtcPrivateRec, *RADEONCrtcPrivatePtr;
typedef struct _RADEONOutputPrivateRec {
@@ -153,10 +157,6 @@ typedef struct _RADEONOutputPrivateRec {
int Flags; /* Saved copy of mode flags */
int PanelPwrDly;
int DotClock;
- int RefDivider;
- int FeedbackDivider;
- int PostDivider;
- Bool UseBiosDividers;
RADEONTMDSPll tmds_pll[4];
} RADEONOutputPrivateRec, *RADEONOutputPrivatePtr;
diff --git a/src/radeon_video.c b/src/radeon_video.c
index a91cb36..97724eb 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -2479,33 +2479,17 @@ RADEONDisplayVideo(
v_inc_shift = 20;
y_mult = 1;
- /* TODO NO IDEA WHAT THIS IS ABOUT */
- if (0) {//info->MergedFB) {
- if (overlay_mode->Flags & V_INTERLACE)
- v_inc_shift++;
- if (overlay_mode->Flags & V_DBLSCAN) {
- v_inc_shift--;
- y_mult = 2;
- }
- // FIXME
- /* if (overlay_mode->Flags & RADEON_USE_RMX) {
- v_inc = ((src_h * overlay_mode->CrtcVDisplay / info->PanelYRes) << v_inc_shift) / drw_h;
- } else {*/
- v_inc = (src_h << v_inc_shift) / drw_h;
- /*}*/
+ if (pScrn->currentMode->Flags & V_INTERLACE)
+ v_inc_shift++;
+ if (pScrn->currentMode->Flags & V_DBLSCAN) {
+ v_inc_shift--;
+ y_mult = 2;
+ }
+ // FIXME
+ if (pScrn->currentMode->Flags & RADEON_USE_RMX) {
+ v_inc = ((src_h * pScrn->currentMode->CrtcVDisplay / info->PanelYRes) << v_inc_shift) / drw_h;
} else {
- if (pScrn->currentMode->Flags & V_INTERLACE)
- v_inc_shift++;
- if (pScrn->currentMode->Flags & V_DBLSCAN) {
- v_inc_shift--;
- y_mult = 2;
- }
- // FIXME
- /* if (pScrn->currentMode->Flags & RADEON_USE_RMX) {
- v_inc = ((src_h * pScrn->currentMode->CrtcVDisplay / info->PanelYRes) << v_inc_shift) / drw_h;
- } else {*/
- v_inc = (src_h << v_inc_shift) / drw_h;
- /*}*/
+ v_inc = (src_h << v_inc_shift) / drw_h;
}
h_inc = (1 << (12 + ecp_div));
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-29 17:12:11 +0000