From 52cc1dc1491559a9055f3ba6dd54064bb382ad86 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 25 Jun 2007 15:49:19 -0400 Subject: RADEON: tiling and FB size fixes - fix tiling on older radeons - allow the user to specify FB size using Virtual line in config Current default is 1600x1200 - reset ecp_div for Xv in randr crtc mode set --- src/radeon_crtc.c | 27 +++++++++++++++++++++++++++ src/radeon_driver.c | 24 +++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index bee05e2..d7eadd8 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -746,9 +746,25 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONInfoPtr info = RADEONPTR(pScrn); RADEONMonitorType montype = MT_NONE; + Bool tilingOld = info->tilingEnabled; int i = 0; double dot_clock = 0; + + if (info->allowColorTiling) { + info->tilingEnabled = (adjusted_mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE; +#ifdef XF86DRI + if (info->directRenderingEnabled && (info->tilingEnabled != tilingOld)) { + RADEONSAREAPrivPtr pSAREAPriv; + if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0) + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[drm] failed changing tiling status\n"); + pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen); + info->tilingEnabled = pSAREAPriv->tiling_enabled ? TRUE : FALSE; + } +#endif + } + for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; RADEONOutputPrivatePtr radeon_output = output->driver_private; @@ -811,6 +827,17 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, if (info->DispPriority) RADEONInitDispBandwidth(pScrn); + if (info->tilingEnabled != tilingOld) { + /* need to redraw front buffer, I guess this can be considered a hack ? */ + xf86EnableDisableFBAccess(pScrn->scrnIndex, FALSE); + RADEONChangeSurfaces(pScrn); + xf86EnableDisableFBAccess(pScrn->scrnIndex, TRUE); + /* xf86SetRootClip would do, but can't access that here */ + } + + /* reset ecp_div for Xv */ + info->ecp_div = -1; + } static void diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 7434936..bee23f0 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -2261,6 +2261,7 @@ static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn) info->allowColorTiling = xf86ReturnOptValBool(info->Options, OPTION_COLOR_TILING, TRUE); if (IS_R300_VARIANT) { + /* this may be 4096 on r4xx -- need to double check */ info->MaxSurfaceWidth = 3968; /* one would have thought 4096...*/ info->MaxLines = 4096; } else { @@ -2554,6 +2555,7 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) void *int10_save = NULL; const char *s; MessageType from; + int crtc_max_X, crtc_max_Y; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONPreInit\n"); @@ -2750,8 +2752,28 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) RADEONPreInitColorTiling(pScrn); - xf86CrtcSetSizeRange (pScrn, 320, 200, 2708, 1200);//nfo->MaxSurfaceWidth, info->MaxLines); + /* we really need an FB manager... */ + if (pScrn->display->virtualX) { + crtc_max_X = pScrn->display->virtualX; + crtc_max_Y = pScrn->display->virtualY; + if (info->allowColorTiling) { + if (crtc_max_X > info->MaxSurfaceWidth) + crtc_max_X = info->MaxSurfaceWidth; + if (crtc_max_Y > info->MaxLines) + crtc_max_Y = info->MaxLines; + } else { + if (crtc_max_X > 8192) + crtc_max_X = 8192; + if (crtc_max_Y > 8192) + crtc_max_Y = 8192; + } + } else { + crtc_max_X = 1600; + crtc_max_Y = 1200; + } + /*xf86CrtcSetSizeRange (pScrn, 320, 200, info->MaxSurfaceWidth, info->MaxLines);*/ + xf86CrtcSetSizeRange (pScrn, 320, 200, crtc_max_X, crtc_max_Y); RADEONPreInitDDC(pScrn); -- cgit v1.2.3