From a416667f980a8679352be897af2fb3215da2d000 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 31 Mar 2005 23:18:10 +0000 Subject: - Add new Radeon pci ids (ATI devrel), bug 2827 --- man/radeon.man | 15 +++++++++++--- src/radeon_chipset.h | 39 ++++++++++++++++++++++++++++++++++++ src/radeon_driver.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++ src/radeon_probe.c | 39 ++++++++++++++++++++++++++++++++++++ 4 files changed, 146 insertions(+), 3 deletions(-) diff --git a/man/radeon.man b/man/radeon.man index 9fd281a..2dad96b 100644 --- a/man/radeon.man +++ b/man/radeon.man @@ -52,6 +52,9 @@ Radeon 9100 IGP .B RS350 Radeon 9200 IGP .TP 12 +.B RS400 +Radeon XPRESS 200/200M IGP +.TP 12 .B RV280 Radeon 9200PRO/9200/9200SE, M9+ .TP 12 @@ -76,11 +79,17 @@ Radeon X300, M22 (2d only) .B RV380 Radeon X600, M24 (2d only) .TP 12 +.B RV410 +Radeon X700, M26 PCIE (2d only) +.TP 12 .B R420 -Radeon X800 (2d only) +Radeon X800 AGP (2d only) +.TP 12 +.B R423/R430 +Radeon X800, M28 PCIE (2d only) .TP 12 -.B R423 -Radeon X800 PCIE (2d only) +.B R480/R481 +Radeon X850 PCIE/AGP (2d only) .SH CONFIGURATION DETAILS Please refer to __xconfigfile__(__filemansuffix__) for general configuration diff --git a/src/radeon_chipset.h b/src/radeon_chipset.h index 3ae8486..e2dfcd7 100644 --- a/src/radeon_chipset.h +++ b/src/radeon_chipset.h @@ -37,6 +37,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_RV280_5961, "ATI Radeon 9200 5961 (AGP)" }, { PCI_CHIP_RV280_5962, "ATI Radeon 9200 5962 (AGP)" }, { PCI_CHIP_RV280_5964, "ATI Radeon 9200SE 5964 (AGP)" }, + { PCI_CHIP_RV280_5965, "ATI FireMV 2200 (PCI)" }, { PCI_CHIP_RV280_5C61, "ATI Radeon Mobility 9200 (M9+) 5C61 (AGP)" }, { PCI_CHIP_RV280_5C63, "ATI Radeon Mobility 9200 (M9+) 5C63 (AGP)" }, { PCI_CHIP_R300_AD, "ATI Radeon 9500 AD (AGP)" }, @@ -59,6 +60,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_RV350_NS, "ATI Radeon Mobility 9600 (M10) NS (AGP)" }, { PCI_CHIP_RV350_NT, "ATI FireGL Mobility T2 (M10) NT (AGP)" }, { PCI_CHIP_RV350_NV, "ATI FireGL Mobility T2e (M11) NV (AGP)" }, + { PCI_CHIP_RV350_4155, "ATI Radeon 9650" }, { PCI_CHIP_R350_AH, "ATI Radeon 9800SE AH (AGP)" }, { PCI_CHIP_R350_AI, "ATI Radeon 9800 AI (AGP)" }, { PCI_CHIP_R350_AJ, "ATI Radeon 9800 AJ (AGP)" }, @@ -77,6 +79,24 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_RV370_5B65, "ATI FireGL D1100 (RV370) 5B65 (PCIE)" }, { PCI_CHIP_RV370_5460, "ATI Radeon Mobility M300 (M22) 5460 (PCIE)" }, { PCI_CHIP_RV370_5464, "ATI FireGL M22 GL 5464 (PCIE)" }, + { PCI_CHIP_RS400_5A41, "ATI Radeon XPRESS 200 5A41 (PCIE)" }, + { PCI_CHIP_RS400_5A42, "ATI Radeon XPRESS 200M 5A42 (PCIE)" }, + { PCI_CHIP_RC410_5A61, "ATI Radeon XPRESS 200 5A61 (PCIE)" }, + { PCI_CHIP_RC410_5A62, "ATI Radeon XPRESS 200M 5A62 (PCIE)" }, + { PCI_CHIP_RS480_5954, "ATI Radeon XPRESS 200 5954 (PCIE)" }, + { PCI_CHIP_RS480_5955, "ATI Radeon XPRESS 200M 5955 (PCIE)" }, + { PCI_CHIP_RS482_5974, "ATI Radeon XPRESS 200 5974 (PCIE)" }, + { PCI_CHIP_RS482_5975, "ATI Radeon XPRESS 200M 5975 (PCIE)" }, + { PCI_CHIP_RV410_5E48, "ATI FireGL V5000 (RV410) (PCIE)" }, + { PCI_CHIP_RV410_564A, "ATI Mobility FireGL V5000 (M26) (PCIE)" }, + { PCI_CHIP_RV410_564B, "ATI Mobility FireGL V5000 (M26) (PCIE)" }, + { PCI_CHIP_RV410_5652, "ATI Mobility Radeon X700 (M26) (PCIE)" }, + { PCI_CHIP_RV410_5653, "ATI Mobility Radeon X700 (M26) (PCIE)" }, + { PCI_CHIP_RV410_5E4B, "ATI Radeon X700 PRO (RV410) (PCIE)" }, + { PCI_CHIP_RV410_5E4A, "ATI Radeon X700 XT (RV410) (PCIE)" }, + { PCI_CHIP_RV410_5E4D, "ATI Radeon X700 (RV410) (PCIE)" }, + { PCI_CHIP_RV410_5E4C, "ATI Radeon X700 SE (RV410) (PCIE)" }, + { PCI_CHIP_RV410_5E4F, "ATI Radeon X700 SE (RV410) (PCIE)" }, { PCI_CHIP_R420_JH, "ATI Radeon X800 (R420) JH (AGP)" }, { PCI_CHIP_R420_JI, "ATI Radeon X800PRO (R420) JI (AGP)" }, { PCI_CHIP_R420_JJ, "ATI Radeon X800SE (R420) JJ (AGP)" }, @@ -85,6 +105,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_R420_JM, "ATI FireGL X3 (R420) JM (AGP)" }, { PCI_CHIP_R420_JN, "ATI Radeon Mobility 9800 (M18) JN (AGP)" }, { PCI_CHIP_R420_JP, "ATI Radeon X800XT (R420) JP (AGP)" }, + { PCI_CHIP_R420_4A4F, "ATI Radeon X800 SE (R420) (AGP)" }, { PCI_CHIP_R423_UH, "ATI Radeon X800 (R423) UH (PCIE)" }, { PCI_CHIP_R423_UI, "ATI Radeon X800PRO (R423) UI (PCIE)" }, { PCI_CHIP_R423_UJ, "ATI Radeon X800LE (R423) UJ (PCIE)" }, @@ -93,6 +114,24 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_R423_UR, "ATI FireGL V5100 (R423) UR (PCIE)" }, { PCI_CHIP_R423_UT, "ATI FireGL V7100 (R423) UT (PCIE)" }, { PCI_CHIP_R423_5D57, "ATI Radeon X800XT (R423) 5D57 (PCIE)" }, + { PCI_CHIP_R423_5550, "ATI FireGL V7100 (R423) (PCIE)" }, + { PCI_CHIP_R430_5D49, "ATI Mobility FireGL V5100 (M28) (PCIE)" }, + { PCI_CHIP_R430_5D4A, "ATI Mobility Radeon X800 (M28) (PCIE)" }, + { PCI_CHIP_R430_5D48, "ATI Mobility Radeon X800 XT (M28) (PCIE)" }, + { PCI_CHIP_R430_554F, "ATI Radeon X800 (R430) (PCIE)" }, + { PCI_CHIP_R430_554D, "ATI Radeon X800 XL (R430) (PCIE)" }, + { PCI_CHIP_R430_554E, "ATI Radeon X800 SE (R430) (PCIE)" }, + { PCI_CHIP_R430_554C, "ATI Radeon X800 XTP (R430) (PCIE)" }, + { PCI_CHIP_R480_5D4C, "ATI Radeon X850 5D4C (PCIE)" }, + { PCI_CHIP_R480_5D50, "ATI Radeon FireGL (R480) GL 5D50 (PCIE)" }, + { PCI_CHIP_R480_5D4E, "ATI Radeon X850 SE (R480) (PCIE)" }, + { PCI_CHIP_R480_5D4F, "ATI Radeon X850 PRO (R480) (PCIE)" }, + { PCI_CHIP_R480_5D52, "ATI Radeon X850 XT (R480) (PCIE)" }, + { PCI_CHIP_R480_5D4D, "ATI Radeon X850 XT PE (R480) (PCIE)" }, + { PCI_CHIP_R481_4B4B, "ATI Radeon X850 PRO (R480) (AGP)" }, + { PCI_CHIP_R481_4B4A, "ATI Radeon X850 SE (R480) (AGP)" }, + { PCI_CHIP_R481_4B49, "ATI Radeon X850 XT (R480) (AGP)" }, + { PCI_CHIP_R481_4B4C, "ATI Radeon X850 XT PE (R480) (AGP)" }, { -1, NULL } }; diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 83b16e3..f803b33 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -2435,6 +2435,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_RV280_5961: case PCI_CHIP_RV280_5962: case PCI_CHIP_RV280_5964: + case PCI_CHIP_RV280_5965: info->ChipFamily = CHIP_FAMILY_RV280; break; @@ -2462,6 +2463,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_RV350_AS: case PCI_CHIP_RV350_AT: case PCI_CHIP_RV350_AV: + case PCI_CHIP_RV350_4155: info->ChipFamily = CHIP_FAMILY_RV350; break; @@ -2493,6 +2495,34 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) info->ChipFamily = CHIP_FAMILY_RV380; break; + case PCI_CHIP_RS400_5A42: + case PCI_CHIP_RC410_5A62: + case PCI_CHIP_RS480_5955: + case PCI_CHIP_RS482_5975: + info->IsMobility = TRUE; + case PCI_CHIP_RS400_5A41: + case PCI_CHIP_RC410_5A61: + case PCI_CHIP_RS480_5954: + case PCI_CHIP_RS482_5974: + info->ChipFamily = CHIP_FAMILY_RS300; /*CHIP_FAMILY_RS400*/ + info->IsIGP = TRUE; + info->HasSingleDAC = TRUE; /*?*/ + break; + + case PCI_CHIP_RV410_564A: + case PCI_CHIP_RV410_564B: + case PCI_CHIP_RV410_5652: + case PCI_CHIP_RV410_5653: + info->IsMobility = TRUE; + case PCI_CHIP_RV410_5E48: + case PCI_CHIP_RV410_5E4B: + case PCI_CHIP_RV410_5E4A: + case PCI_CHIP_RV410_5E4D: + case PCI_CHIP_RV410_5E4C: + case PCI_CHIP_RV410_5E4F: + info->ChipFamily = CHIP_FAMILY_R420; /* CHIP_FAMILY_RV410*/ + break; + case PCI_CHIP_R420_JN: info->IsMobility = TRUE; case PCI_CHIP_R420_JH: @@ -2502,6 +2532,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_R420_JL: case PCI_CHIP_R420_JM: case PCI_CHIP_R420_JP: + case PCI_CHIP_R420_4A4F: info->ChipFamily = CHIP_FAMILY_R420; break; @@ -2513,9 +2544,34 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_R423_UR: case PCI_CHIP_R423_UT: case PCI_CHIP_R423_5D57: + case PCI_CHIP_R423_5550: info->ChipFamily = CHIP_FAMILY_R420; break; + case PCI_CHIP_R430_5D49: + case PCI_CHIP_R430_5D4A: + case PCI_CHIP_R430_5D48: + info->IsMobility = TRUE; + case PCI_CHIP_R430_554F: + case PCI_CHIP_R430_554D: + case PCI_CHIP_R430_554E: + case PCI_CHIP_R430_554C: + info->ChipFamily = CHIP_FAMILY_R420; /*CHIP_FAMILY_R430*/ + break; + + case PCI_CHIP_R480_5D4C: + case PCI_CHIP_R480_5D50: + case PCI_CHIP_R480_5D4E: + case PCI_CHIP_R480_5D4F: + case PCI_CHIP_R480_5D52: + case PCI_CHIP_R480_5D4D: + case PCI_CHIP_R481_4B4B: + case PCI_CHIP_R481_4B4A: + case PCI_CHIP_R481_4B49: + case PCI_CHIP_R481_4B4C: + info->ChipFamily = CHIP_FAMILY_R420; /*CHIP_FAMILY_R480*/ + break; + default: /* Original Radeon/7200 */ info->ChipFamily = CHIP_FAMILY_RADEON; diff --git a/src/radeon_probe.c b/src/radeon_probe.c index 3d3abf0..778f94a 100644 --- a/src/radeon_probe.c +++ b/src/radeon_probe.c @@ -90,6 +90,7 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RV280_5961, PCI_CHIP_RV280_5961, RES_SHARED_VGA }, { PCI_CHIP_RV280_5962, PCI_CHIP_RV280_5962, RES_SHARED_VGA }, { PCI_CHIP_RV280_5964, PCI_CHIP_RV280_5964, RES_SHARED_VGA }, + { PCI_CHIP_RV280_5965, PCI_CHIP_RV280_5965, RES_SHARED_VGA }, { PCI_CHIP_RV280_5C61, PCI_CHIP_RV280_5C61, RES_SHARED_VGA }, { PCI_CHIP_RV280_5C63, PCI_CHIP_RV280_5C63, RES_SHARED_VGA }, { PCI_CHIP_R300_AD, PCI_CHIP_R300_AD, RES_SHARED_VGA }, @@ -112,6 +113,7 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RV350_NS, PCI_CHIP_RV350_NS, RES_SHARED_VGA }, { PCI_CHIP_RV350_NT, PCI_CHIP_RV350_NT, RES_SHARED_VGA }, { PCI_CHIP_RV350_NV, PCI_CHIP_RV350_NV, RES_SHARED_VGA }, + { PCI_CHIP_RV350_4155, PCI_CHIP_RV350_4155, RES_SHARED_VGA }, { PCI_CHIP_R350_AH, PCI_CHIP_R350_AH, RES_SHARED_VGA }, { PCI_CHIP_R350_AI, PCI_CHIP_R350_AI, RES_SHARED_VGA }, { PCI_CHIP_R350_AJ, PCI_CHIP_R350_AJ, RES_SHARED_VGA }, @@ -130,6 +132,24 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RV370_5B65, PCI_CHIP_RV370_5B65, RES_SHARED_VGA }, { PCI_CHIP_RV370_5460, PCI_CHIP_RV370_5460, RES_SHARED_VGA }, { PCI_CHIP_RV370_5464, PCI_CHIP_RV370_5464, RES_SHARED_VGA }, + { PCI_CHIP_RS400_5A41, PCI_CHIP_RS400_5A41, RES_SHARED_VGA }, + { PCI_CHIP_RS400_5A42, PCI_CHIP_RS400_5A42, RES_SHARED_VGA }, + { PCI_CHIP_RC410_5A61, PCI_CHIP_RC410_5A61, RES_SHARED_VGA }, + { PCI_CHIP_RC410_5A62, PCI_CHIP_RC410_5A62, RES_SHARED_VGA }, + { PCI_CHIP_RS480_5954, PCI_CHIP_RS480_5954, RES_SHARED_VGA }, + { PCI_CHIP_RS480_5955, PCI_CHIP_RS480_5955, RES_SHARED_VGA }, + { PCI_CHIP_RS482_5974, PCI_CHIP_RS482_5974, RES_SHARED_VGA }, + { PCI_CHIP_RS482_5975, PCI_CHIP_RS482_5975, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5E48, PCI_CHIP_RV410_5E48, RES_SHARED_VGA }, + { PCI_CHIP_RV410_564A, PCI_CHIP_RV410_564A, RES_SHARED_VGA }, + { PCI_CHIP_RV410_564B, PCI_CHIP_RV410_564B, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5652, PCI_CHIP_RV410_5652, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5653, PCI_CHIP_RV410_5653, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5E4B, PCI_CHIP_RV410_5E4B, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5E4A, PCI_CHIP_RV410_5E4A, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5E4D, PCI_CHIP_RV410_5E4D, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5E4C, PCI_CHIP_RV410_5E4C, RES_SHARED_VGA }, + { PCI_CHIP_RV410_5E4F, PCI_CHIP_RV410_5E4F, RES_SHARED_VGA }, { PCI_CHIP_R420_JH, PCI_CHIP_R420_JH, RES_SHARED_VGA }, { PCI_CHIP_R420_JI, PCI_CHIP_R420_JI, RES_SHARED_VGA }, { PCI_CHIP_R420_JJ, PCI_CHIP_R420_JJ, RES_SHARED_VGA }, @@ -138,6 +158,7 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_R420_JM, PCI_CHIP_R420_JM, RES_SHARED_VGA }, { PCI_CHIP_R420_JN, PCI_CHIP_R420_JN, RES_SHARED_VGA }, { PCI_CHIP_R420_JP, PCI_CHIP_R420_JP, RES_SHARED_VGA }, + { PCI_CHIP_R420_4A4F, PCI_CHIP_R420_4A4F, RES_SHARED_VGA }, { PCI_CHIP_R423_UH, PCI_CHIP_R423_UH, RES_SHARED_VGA }, { PCI_CHIP_R423_UI, PCI_CHIP_R423_UI, RES_SHARED_VGA }, { PCI_CHIP_R423_UJ, PCI_CHIP_R423_UJ, RES_SHARED_VGA }, @@ -146,6 +167,24 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_R423_UR, PCI_CHIP_R423_UR, RES_SHARED_VGA }, { PCI_CHIP_R423_UT, PCI_CHIP_R423_UT, RES_SHARED_VGA }, { PCI_CHIP_R423_5D57, PCI_CHIP_R423_5D57, RES_SHARED_VGA }, + { PCI_CHIP_R423_5550, PCI_CHIP_R423_5550, RES_SHARED_VGA }, + { PCI_CHIP_R430_5D49, PCI_CHIP_R430_5D49, RES_SHARED_VGA }, + { PCI_CHIP_R430_5D4A, PCI_CHIP_R430_5D4A, RES_SHARED_VGA }, + { PCI_CHIP_R430_5D48, PCI_CHIP_R430_5D48, RES_SHARED_VGA }, + { PCI_CHIP_R430_554F, PCI_CHIP_R430_554F, RES_SHARED_VGA }, + { PCI_CHIP_R430_554D, PCI_CHIP_R430_554D, RES_SHARED_VGA }, + { PCI_CHIP_R430_554E, PCI_CHIP_R430_554E, RES_SHARED_VGA }, + { PCI_CHIP_R430_554C, PCI_CHIP_R430_554C, RES_SHARED_VGA }, + { PCI_CHIP_R480_5D4C, PCI_CHIP_R480_5D4C, RES_SHARED_VGA }, + { PCI_CHIP_R480_5D50, PCI_CHIP_R480_5D50, RES_SHARED_VGA }, + { PCI_CHIP_R480_5D4E, PCI_CHIP_R480_5D4E, RES_SHARED_VGA }, + { PCI_CHIP_R480_5D4F, PCI_CHIP_R480_5D4F, RES_SHARED_VGA }, + { PCI_CHIP_R480_5D52, PCI_CHIP_R480_5D52, RES_SHARED_VGA }, + { PCI_CHIP_R480_5D4D, PCI_CHIP_R480_5D4D, RES_SHARED_VGA }, + { PCI_CHIP_R481_4B4B, PCI_CHIP_R481_4B4B, RES_SHARED_VGA }, + { PCI_CHIP_R481_4B4A, PCI_CHIP_R481_4B4A, RES_SHARED_VGA }, + { PCI_CHIP_R481_4B49, PCI_CHIP_R481_4B49, RES_SHARED_VGA }, + { PCI_CHIP_R481_4B4C, PCI_CHIP_R481_4B4C, RES_SHARED_VGA }, { -1, -1, RES_UNDEFINED } }; -- cgit v1.2.3