diff options
author | James Cloos <cloos@jhcloos.com> | 2007-09-03 06:07:32 -0400 |
---|---|---|
committer | James Cloos <cloos@jhcloos.com> | 2007-09-03 06:07:32 -0400 |
commit | 6fde3fd6d34e7252ee16422b19896d71b1622039 (patch) | |
tree | f14ab2b9dd93d9097d5f2c8a4085ee2b81a6f7fc | |
parent | 4bfc1e1ea11604e3af150a4228663cb1cb1bf9f3 (diff) | |
parent | 923176f5aad777b4023003a457bb77da21373389 (diff) |
Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-mga
-rw-r--r-- | configure.ac | 12 | ||||
-rw-r--r-- | src/clientlx.c | 16 | ||||
-rw-r--r-- | src/mga.h | 61 | ||||
-rw-r--r-- | src/mga_bios.c | 15 | ||||
-rw-r--r-- | src/mga_dac3026.c | 10 | ||||
-rw-r--r-- | src/mga_dacG.c | 50 | ||||
-rw-r--r-- | src/mga_dri.c | 74 | ||||
-rw-r--r-- | src/mga_driver.c | 962 | ||||
-rw-r--r-- | src/mga_macros.h | 20 | ||||
-rw-r--r-- | src/mga_merge.c | 6 | ||||
-rw-r--r-- | src/mga_storm.c | 33 | ||||
-rw-r--r-- | src/mga_vga.c | 4 |
12 files changed, 804 insertions, 459 deletions
diff --git a/configure.ac b/configure.ac index fafb63a..1605dee 100644 --- a/configure.ac +++ b/configure.ac @@ -104,6 +104,18 @@ if test "x$DRI" = xyes; then AC_DEFINE(XF86DRI_DEVEL,1,[Enable developmental DRI driver support]) fi +save_CFLAGS="$CFLAGS" +CFLAGS="$XORG_CFLAGS" +AC_CHECK_DECL(XSERVER_LIBPCIACCESS, + [XSERVER_LIBPCIACCESS=yes], [XSERVER_LIBPCIACCESS=no], + [#include "xorg-server.h"]) +CFLAGS="$save_CFLAGS" + +if test "x$XSERVER_LIBPCIACCESS" = xyes; then + PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0]) +fi +AM_CONDITIONAL(XSERVER_LIBPCIACCESS, test "x$XSERVER_LIBPCIACCESS" = xyes) + AM_CONDITIONAL(USE_XAA, true) AC_DEFINE(USE_XAA, 1, [Build support for XAA]) diff --git a/src/clientlx.c b/src/clientlx.c index 306d3ed..9c6ab50 100644 --- a/src/clientlx.c +++ b/src/clientlx.c @@ -67,7 +67,11 @@ ULONG ClientReadConfigSpaceByte(LPBOARDHANDLE pBoard, ULONG ulOffset, ASSERT_HANDLER(pBoard); +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u8(pMga->PciInfo, pucByte, ulOffset); +#else *pucByte = pciReadByte(pMga->PciTag,ulOffset); +#endif return 0; } @@ -95,7 +99,11 @@ ULONG ClientReadConfigSpaceDword(LPBOARDHANDLE pBoard, ULONG ulOffset, ASSERT_HANDLER(pBoard); +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u32(pMga->PciInfo, (uint32_t *) pulDword, ulOffset); +#else *pulDword = pciReadLong(pMga->PciTag,ulOffset); +#endif return 0; } @@ -123,7 +131,11 @@ ULONG ClientWriteConfigSpaceByte(LPBOARDHANDLE pBoard, ULONG ulOffset, ASSERT_HANDLER(pBoard); +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_u8(pMga->PciInfo, ucByte, ulOffset); +#else pciWriteByte(pMga->PciTag,ulOffset, ucByte); +#endif return 0; } @@ -151,7 +163,11 @@ ULONG ClientWriteConfigSpaceDword(LPBOARDHANDLE pBoard, ULONG ulOffset, ASSERT_HANDLER(pBoard); +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_u32(pMga->PciInfo, (uint32_t) ulDword, ulOffset); +#else pciWriteLong(pMga->PciTag,ulOffset, ulDword); +#endif return 0; } @@ -14,6 +14,9 @@ #ifndef MGA_H #define MGA_H +#ifdef XSERVER_LIBPCIACCESS +#include <pciaccess.h> +#endif #include <string.h> #include <stdio.h> @@ -286,7 +289,11 @@ typedef struct { #ifdef DISABLE_VGA_IO typedef struct mgaSave { +#ifdef XSERVER_LIBPCIACCESS + struct pci_device * pvp; +#else pciVideoPtr pvp; +#endif Bool enable; } MgaSave, *MgaSavePtr; #endif @@ -399,6 +406,31 @@ struct mga_bios_values { }; +/** + * Attributes that of an MGA device that can be derrived purely from its + * PCI ID. + */ +struct mga_device_attributes { + unsigned has_sdram:1; + unsigned probe_for_sdram:1; + unsigned dual_head_possible:1; + unsigned fb_4mb_quirk:1; + unsigned hwcursor_1064:1; + + unsigned dri_capable:1; + unsigned dri_chipset:3; + + unsigned HAL_chipset:1; + + enum { + old_BARs = 0, + probe_BARs, + new_BARs + } BARs:2; + + uint32_t accel_flags; +}; + typedef struct { #ifdef USEMGAHAL LPCLIENTDATA pClientStruct; @@ -409,15 +441,19 @@ typedef struct { EntityInfoPtr pEnt; struct mga_bios_values bios; CARD8 BiosOutputMode; +#ifdef XSERVER_LIBPCIACCESS + struct pci_device * PciInfo; +#else pciVideoPtr PciInfo; PCITAG PciTag; +#endif + const struct mga_device_attributes * chip_attribs; xf86AccessRec Access; int Chipset; int ChipRev; int is_Gx50:1; int is_G200SE:1; - int is_HAL_chipset:1; Bool Primary; Bool Interleave; @@ -429,12 +465,30 @@ typedef struct { int YDstOrg; int DstOrg; int SrcOrg; + + /** + * Which BAR corresponds to the framebuffer on this chip? + */ + unsigned framebuffer_bar; + + /** + * Which BAR corresponds to IO space on this chip? + */ + unsigned io_bar; + + /** + * Which BAR corresponds to ILOAD space on this chip? If the value is + * -1, then this chip does not have an ILOAD region. + */ + int iload_bar; + +#ifndef XSERVER_LIBPCIACCESS unsigned long IOAddress; - unsigned long FbAddress; unsigned long ILOADAddress; - int FbBaseReg; unsigned long BiosAddress; MessageType BiosFrom; +#endif + unsigned long FbAddress; unsigned char * IOBase; unsigned char * FbBase; unsigned char * ILOADBase; @@ -448,7 +502,6 @@ typedef struct { Bool Exa; ExaDriverPtr ExaDriver; Bool SyncOnGreen; - Bool Dac6Bit; Bool HWCursor; Bool UsePCIRetry; Bool ShowCache; diff --git a/src/mga_bios.c b/src/mga_bios.c index dd75f3f..aece217 100644 --- a/src/mga_bios.c +++ b/src/mga_bios.c @@ -406,15 +406,18 @@ static void mga_parse_bios_ver_5( struct mga_bios_values * bios, Bool mga_read_and_process_bios( ScrnInfoPtr pScrn ) { - CARD8 bios_data[0x10000]; + CARD8 bios_data[0x20000]; unsigned offset; MGAPtr pMga = MGAPTR(pScrn); +#ifndef XSERVER_LIBPCIACCESS Bool pciBIOS = TRUE; +#endif int rlen; static const unsigned expected_length[] = { 0, 64, 64, 64, 128, 128 }; unsigned version; unsigned pins_len; const CARD8 * pins_data; + int err; #ifdef BIOS_DEBUG static const char * const host_interface_strings[8] = { "Reserved", @@ -443,6 +446,9 @@ Bool mga_read_and_process_bios( ScrnInfoPtr pScrn ) * might be controlled by the PCI config space. */ +#ifdef XSERVER_LIBPCIACCESS + err = pci_device_read_rom(pMga->PciInfo, bios_data); +#else if (pMga->BiosFrom == X_DEFAULT) { pciBIOS = FALSE; } @@ -451,7 +457,7 @@ Bool mga_read_and_process_bios( ScrnInfoPtr pScrn ) } if (pciBIOS) { - rlen = xf86ReadPciBIOS(0, pMga->PciTag, pMga->FbBaseReg, + rlen = xf86ReadPciBIOS(0, pMga->PciTag, pMga->framebuffer_bar, bios_data, sizeof(bios_data)); } else { @@ -459,7 +465,10 @@ Bool mga_read_and_process_bios( ScrnInfoPtr pScrn ) sizeof(bios_data), bios_data); } - if (rlen < (bios_data[2] << 9)) { + err = rlen < (bios_data[2] << 9); +#endif + + if (err) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Could not retrieve video BIOS!\n"); return FALSE; diff --git a/src/mga_dac3026.c b/src/mga_dac3026.c index 1eddefd..e33f914 100644 --- a/src/mga_dac3026.c +++ b/src/mga_dac3026.c @@ -746,8 +746,13 @@ MGA3026Restore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, for (i = 0; i < 6; i++) OUTREG16(0x1FDE, (mgaReg->ExtVga[i] << 8) | i); +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_bits(pMga->PciInfo, OPTION_MASK, mgaReg->Option, + PCI_OPTION_REG); +#else pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, OPTION_MASK, mgaReg->Option); +#endif MGA_NOT_HAL( /* select pixel clock PLL as clock source */ @@ -866,7 +871,12 @@ MGA3026Save(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, for (i = 0; i < DACREGSIZE; i++) mgaReg->DacRegs[i] = inTi3026(MGADACregs[i]); +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u32(pMga->PciInfo, & mgaReg->Option, + PCI_OPTION_REG); +#else mgaReg->Option = pciReadLong(pMga->PciTag, PCI_OPTION_REG); +#endif #ifdef DEBUG ErrorF("read: %02X %02X %02X %02X %02X %02X %08lX\n", diff --git a/src/mga_dacG.c b/src/mga_dacG.c index 99eff18..1a6a565 100644 --- a/src/mga_dacG.c +++ b/src/mga_dacG.c @@ -130,26 +130,23 @@ MGAGCalcClock ( ScrnInfoPtr pScrn, long f_out, double f_vco; double m_err, calc_f; const double ref_freq = (double) pMga->bios.pll_ref_freq; - int feed_div_min, feed_div_max; - int in_div_min, in_div_max; - int post_div_max; - + const int feed_div_max = 127; + const int in_div_min = 1; + const int post_div_max = 7; + int feed_div_min; + int in_div_max; + + switch( pMga->Chipset ) { case PCI_CHIP_MGA1064: feed_div_min = 100; - feed_div_max = 127; - in_div_min = 1; in_div_max = 31; - post_div_max = 7; break; case PCI_CHIP_MGAG400: case PCI_CHIP_MGAG550: feed_div_min = 7; - feed_div_max = 127; - in_div_min = 1; in_div_max = 31; - post_div_max = 7; break; case PCI_CHIP_MGAG200_SE_A_PCI: case PCI_CHIP_MGAG200_SE_B_PCI: @@ -159,10 +156,7 @@ MGAGCalcClock ( ScrnInfoPtr pScrn, long f_out, case PCI_CHIP_MGAG200_PCI: default: feed_div_min = 7; - feed_div_max = 127; - in_div_min = 1; in_div_max = 6; - post_div_max = 7; break; } @@ -776,6 +770,23 @@ MGA_NOT_HAL( } if (!MGAISGx50(pMga)) { + /* restore pci_option register */ +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_bits(pMga->PciInfo, optionMask, + mgaReg->Option, PCI_OPTION_REG); + + if (pMga->Chipset != PCI_CHIP_MGA1064) { + pci_device_cfg_write_bits(pMga->PciInfo, OPTION2_MASK, + mgaReg->Option2, PCI_MGA_OPTION2); + + if (pMga->Chipset == PCI_CHIP_MGAG400 + || pMga->Chipset == PCI_CHIP_MGAG550) { + pci_device_cfg_write_bits(pMga->PciInfo, OPTION3_MASK, + mgaReg->Option3, + PCI_MGA_OPTION3); + } + } +#else /* restore pci_option register */ pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, optionMask, mgaReg->Option); @@ -785,6 +796,7 @@ MGA_NOT_HAL( if (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) pciSetBitsLong(pMga->PciTag, PCI_MGA_OPTION3, OPTION3_MASK, mgaReg->Option3); +#endif } ); /* MGA_NOT_HAL */ #ifdef USEMGAHAL @@ -948,11 +960,23 @@ MGAGSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg, mgaReg->PIXPLLCSaved = TRUE; +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u32(pMga->PciInfo, & mgaReg->Option, + PCI_OPTION_REG); + pci_device_cfg_read_u32(pMga->PciInfo, & mgaReg->Option2, + PCI_MGA_OPTION2); +#else mgaReg->Option = pciReadLong(pMga->PciTag, PCI_OPTION_REG); mgaReg->Option2 = pciReadLong(pMga->PciTag, PCI_MGA_OPTION2); +#endif if (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u32(pMga->PciInfo, & mgaReg->Option3, + PCI_MGA_OPTION3); +#else mgaReg->Option3 = pciReadLong(pMga->PciTag, PCI_MGA_OPTION3); +#endif ); /* MGA_NOT_HAL */ for (i = 0; i < 6; i++) diff --git a/src/mga_dri.c b/src/mga_dri.c index 731c354..43fcaa8 100644 --- a/src/mga_dri.c +++ b/src/mga_dri.c @@ -608,8 +608,8 @@ static Bool MGADRIBootstrapDMA(ScreenPtr pScreen) xf86DrvMsg( pScreen->myNum, X_INFO, "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", mode, vendor, device, - pMga->PciInfo->vendor, - pMga->PciInfo->chipType ); + VENDOR_ID(pMga->PciInfo), + DEVICE_ID(pMga->PciInfo)); if ( drmAgpEnable( pMga->drmFD, mode ) < 0 ) { xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] AGP not enabled\n" ); @@ -756,7 +756,7 @@ static Bool MGADRIBootstrapDMA(ScreenPtr pScreen) pMGADRIServer->registers.size = MGAIOMAPSIZE; if ( drmAddMap( pMga->drmFD, - (drm_handle_t)pMga->IOAddress, + (drm_handle_t) MGA_IO_ADDRESS(pMga), pMGADRIServer->registers.size, DRM_REGISTERS, DRM_READ_ONLY, &pMGADRIServer->registers.handle ) < 0 ) { @@ -793,23 +793,16 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen ) drm_mga_init_t init; int ret; + + if (!pMga->chip_attribs->dri_capable) { + return FALSE; + } + memset( &init, 0, sizeof(drm_mga_init_t) ); init.func = MGA_INIT_DMA; init.sarea_priv_offset = sizeof(XF86DRISAREARec); - - switch ( pMga->Chipset ) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - init.chipset = MGA_CARD_TYPE_G400; - break; - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - init.chipset = MGA_CARD_TYPE_G200; - break; - default: - return FALSE; - } + init.chipset = pMga->chip_attribs->dri_chipset; init.sgram = !pMga->HasSDRAM; init.maccess = pMga->MAccess; @@ -849,20 +842,26 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen ) return TRUE; } +/* FIXME: This function uses the DRM to get the IRQ, but the pci_device + * FIXME: structure (PciInfo) already has that information. + */ static void MGADRIIrqInit(MGAPtr pMga, ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - /* version = drmGetVersion(pMga->drmFD); - if ( version ) { - if ( version->version_major != 3 || - version->version_minor < 0 ) {*/ if (!pMga->irq) { - pMga->irq = drmGetInterruptFromBusID( - pMga->drmFD, + pMga->irq = drmGetInterruptFromBusID(pMga->drmFD, +#ifdef XSERVER_LIBPCIACCESS + ((pMga->PciInfo->domain << 8) | + pMga->PciInfo->bus), + pMga->PciInfo->dev, + pMga->PciInfo->func +#else ((pciConfigPtr)pMga->PciInfo->thisCard)->busnum, ((pciConfigPtr)pMga->PciInfo->thisCard)->devnum, - ((pciConfigPtr)pMga->PciInfo->thisCard)->funcnum); + ((pciConfigPtr)pMga->PciInfo->thisCard)->funcnum +#endif + ); if((drmCtlInstHandler(pMga->drmFD, pMga->irq)) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, @@ -1104,13 +1103,7 @@ Bool MGADRIScreenInit( ScreenPtr pScreen ) MGADRIPtr pMGADRI; MGADRIServerPrivatePtr pMGADRIServer; - switch(pMga->Chipset) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - break; - default: + if (!pMga->chip_attribs->dri_capable) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[drm] Direct rendering only supported with G200/G400/G450/G550.\n"); return FALSE; } @@ -1167,9 +1160,15 @@ Bool MGADRIScreenInit( ScreenPtr pScreen ) } else { pDRIInfo->busIdString = xalloc(64); sprintf( pDRIInfo->busIdString, "PCI:%d:%d:%d", +#ifdef XSERVER_LIBPCIACCESS + ((pMga->PciInfo->domain << 8) | pMga->PciInfo->bus), + pMga->PciInfo->dev, pMga->PciInfo->func +#else ((pciConfigPtr)pMga->PciInfo->thisCard)->busnum, ((pciConfigPtr)pMga->PciInfo->thisCard)->devnum, - ((pciConfigPtr)pMga->PciInfo->thisCard)->funcnum ); + ((pciConfigPtr)pMga->PciInfo->thisCard)->funcnum +#endif + ); } pDRIInfo->ddxDriverMajorVersion = PACKAGE_VERSION_MAJOR; pDRIInfo->ddxDriverMinorVersion = PACKAGE_VERSION_MINOR; @@ -1412,18 +1411,7 @@ Bool MGADRIFinishScreenInit( ScreenPtr pScreen ) MGADRIIrqInit(pMga, pScreen); - switch(pMga->Chipset) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - pMGADRI->chipset = MGA_CARD_TYPE_G400; - break; - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - pMGADRI->chipset = MGA_CARD_TYPE_G200; - break; - default: - return FALSE; - } + pMGADRI->chipset = pMga->chip_attribs->dri_chipset; pMGADRI->width = pScrn->virtualX; pMGADRI->height = pScrn->virtualY; pMGADRI->cpp = pScrn->bitsPerPixel / 8; diff --git a/src/mga_driver.c b/src/mga_driver.c index a9323fe..d9b786f 100644 --- a/src/mga_driver.c +++ b/src/mga_driver.c @@ -64,7 +64,9 @@ #include "xf86PciInfo.h" /* Drivers that need to access the PCI config space directly need this */ +#ifndef XSERVER_LIBPCIACCESS #include "xf86Pci.h" +#endif /* All drivers initialising the SW cursor need this */ #include "mipointer.h" @@ -109,7 +111,12 @@ /* Mandatory functions */ static const OptionInfoRec * MGAAvailableOptions(int chipid, int busid); static void MGAIdentify(int flags); +#ifdef XSERVER_LIBPCIACCESS +static Bool MGAPciProbe(DriverPtr drv, int entity_num, + struct pci_device * dev, intptr_t match_data); +#else static Bool MGAProbe(DriverPtr drv, int flags); +#endif static Bool MGAPreInit(ScrnInfoPtr pScrn, int flags); static Bool MGAScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv); @@ -131,8 +138,14 @@ static void MGAFreeScreen(int scrnIndex, int flags); static ModeStatus MGAValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags); +#if ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 4)) || (__GNUC__ >= 4) +#define __must_check __attribute__((warn_unused_result)) +#else +#define __must_check /* */ +#endif + /* Internally used functions */ -static Bool MGAMapMem(ScrnInfoPtr pScrn); +static Bool __must_check MGAMapMem(ScrnInfoPtr pScrn); static Bool MGAUnmapMem(ScrnInfoPtr pScrn); static void MGASave(ScrnInfoPtr pScrn); static void MGARestore(ScrnInfoPtr pScrn); @@ -144,24 +157,65 @@ static int MGAEntityIndex = -1; #include "mga_merge.h" +static const struct mga_device_attributes attribs[8] = { + /* 2064 */ + [0] = { 1, 0, 0, 1, 0, 0, 0, 0, old_BARs, + (BLK_OPAQUE_EXPANSION | FASTBLT_BUG | USE_LINEAR_EXPANSION) }, -/* - * This contains the functions needed by the server after loading the - * driver module. It must be supplied, and gets added the driver list by - * the Module Setup funtion in the dynamic case. In the static case a - * reference to this is compiled in, and this requires that the name of - * this DriverRec be an upper-case version of the driver name. - */ + /* 1064 */ + [1] = { 0, 1, 0, 0, 1, 0, 0, 0, probe_BARs, + (USE_LINEAR_EXPANSION) }, -_X_EXPORT DriverRec MGA_C_NAME = { - MGA_VERSION, - MGA_DRIVER_NAME, - MGAIdentify, - MGAProbe, - MGAAvailableOptions, - NULL, - 0 + /* 2164, 2164 AGP */ + [2] = { 1, 0, 0, 1, 0, 0, 0, 0, new_BARs, + (BLK_OPAQUE_EXPANSION | TRANSC_SOLID_FILL | USE_RECTS_FOR_LINES + | USE_LINEAR_EXPANSION) }, + + /* G100 */ + [3] = { 0, 1, 0, 0, 1, 0, 0, 0, new_BARs, + (MGA_NO_PLANEMASK | USE_LINEAR_EXPANSION) }, + + /* G200 */ + [4] = { 0, 1, 0, 0, 1, 1, 1, 1, new_BARs, + (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION) }, + + /* G400 / G450 */ + [5] = { 0, 1, 1, 0, 1, 1, 2, 1, new_BARs, + (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION) }, + + /* G550 */ + [6] = { 0, 1, 1, 0, 1, 1, 2, 1, new_BARs, + (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION) }, + + /* G200SE */ + [7] = { 0, 1, 0, 0, 1, 0, 0, 1, new_BARs, + (TRANSC_SOLID_FILL | TWO_PASS_COLOR_EXPAND | USE_LINEAR_EXPANSION) }, +}; + +#ifdef XSERVER_LIBPCIACCESS +#define MGA_DEVICE_MATCH(d, i) \ + { 0x102B, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) } +#define MGA_SUBDEVICE_MATCH(d, s, i) \ + { 0x102B, (d), 0x102B, (s), 0, 0, (i) } + +static const struct pci_id_match mga_device_match[] = { + MGA_DEVICE_MATCH( PCI_CHIP_MGA2064, 0 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGA1064, 1 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGA2164, 2 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGA2164_AGP, 2 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGAG100, 3 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGAG100_PCI, 3 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGAG200, 4 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGAG200_PCI, 4 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGAG400, 5 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGAG550, 6 ), + + MGA_DEVICE_MATCH( PCI_CHIP_MGAG200_SE_A_PCI, 7 ), + MGA_DEVICE_MATCH( PCI_CHIP_MGAG200_SE_B_PCI, 7 ), + + { 0, 0, 0 }, }; +#endif /* Supported chipsets */ static SymTabRec MGAChipsets[] = { @@ -198,6 +252,35 @@ static PciChipsets MGAPciChipsets[] = { { -1, -1, (resRange*)RES_UNDEFINED } }; +/* + * This contains the functions needed by the server after loading the + * driver module. It must be supplied, and gets added the driver list by + * the Module Setup funtion in the dynamic case. In the static case a + * reference to this is compiled in, and this requires that the name of + * this DriverRec be an upper-case version of the driver name. + */ + +_X_EXPORT DriverRec MGA_C_NAME = { + MGA_VERSION, + MGA_DRIVER_NAME, + MGAIdentify, +#ifdef XSERVER_LIBPCIACCESS + NULL, +#else + MGAProbe, +#endif + MGAAvailableOptions, + NULL, + 0, + NULL, + +#ifdef XSERVER_LIBPCIACCESS + mga_device_match, + MGAPciProbe +#endif +}; + + static const OptionInfoRec MGAOptions[] = { { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, @@ -458,7 +541,7 @@ mgaSetup(pointer module, pointer opts, int *errmaj, int *errmin) if (!setupDone) { setupDone = TRUE; - xf86AddDriver(&MGA_C_NAME, module, 0); + xf86AddDriver(&MGA_C_NAME, module, 1); /* * Modules that this driver always requires may be loaded here @@ -552,6 +635,94 @@ MGAIdentify(int flags) } +#ifdef XSERVER_LIBPCIACCESS +Bool +MGAPciProbe(DriverPtr drv, int entity_num, struct pci_device * dev, + intptr_t match_data) +{ + ScrnInfoPtr pScrn = NULL; + EntityInfoPtr pEnt; + MGAPtr pMga; +#ifdef DISABLE_VGA_IO + MgaSavePtr smga; + + + smga = xnfalloc(sizeof(MgaSave)); + smga->pvp = dev; +#endif + + /* Allocate a ScrnInfoRec and claim the slot */ + pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, MGAPciChipsets, + NULL, +#ifndef DISABLE_VGA_IO + NULL, NULL, NULL, NULL +#else + VgaIOSave, VgaIOSave, VgaIORestore, smga +#endif + ); + if (pScrn != NULL) { + /* Fill in what we can of the ScrnInfoRec */ + pScrn->driverVersion = MGA_VERSION; + pScrn->driverName = MGA_DRIVER_NAME; + pScrn->name = MGA_NAME; + pScrn->Probe = NULL; + pScrn->PreInit = MGAPreInit; + pScrn->ScreenInit = MGAScreenInit; + pScrn->SwitchMode = MGASwitchMode; + pScrn->AdjustFrame = MGAAdjustFrame; + pScrn->EnterVT = MGAEnterVT; + pScrn->LeaveVT = MGALeaveVT; + pScrn->FreeScreen = MGAFreeScreen; + pScrn->ValidMode = MGAValidMode; + + + /* Allocate the MGARec driverPrivate */ + if (!MGAGetRec(pScrn)) { + return FALSE; + } + + pMga = MGAPTR(pScrn); + pMga->chip_attribs = & attribs[ match_data ]; + pMga->PciInfo = dev; + + + /* + * For cards that can do dual head per entity, mark the entity + * as sharable. + */ + pEnt = xf86GetEntityInfo(entity_num); + if (pMga->chip_attribs->dual_head_possible) { + MGAEntPtr pMgaEnt = NULL; + DevUnion *pPriv; + + xf86SetEntitySharable(entity_num); + /* Allocate an entity private if necessary */ + if (MGAEntityIndex < 0) + MGAEntityIndex = xf86AllocateEntityPrivateIndex(); + pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex); + if (!pPriv->ptr) { + pPriv->ptr = xnfcalloc(sizeof(MGAEntRec), 1); + pMgaEnt = pPriv->ptr; + pMgaEnt->lastInstance = -1; + } else { + pMgaEnt = pPriv->ptr; + } + /* + * Set the entity instance for this instance of the driver. For + * dual head per card, instance 0 is the "master" instance, driving + * the primary head, and instance 1 is the "slave". + */ + pMgaEnt->lastInstance++; + xf86SetEntityInstanceForScreen(pScrn, pScrn->entityList[0], + pMgaEnt->lastInstance); + } + } + + return (pScrn != NULL); +} + +#else + /* Mandatory */ static Bool MGAProbe(DriverPtr drv, int flags) @@ -621,81 +792,131 @@ MGAProbe(DriverPtr drv, int flags) if (flags & PROBE_DETECT) foundScreen = TRUE; else for (i = 0; i < numUsed; i++) { - ScrnInfoPtr pScrn; + ScrnInfoPtr pScrn = NULL; EntityInfoPtr pEnt; #ifdef DISABLE_VGA_IO MgaSavePtr smga; #endif /* Allocate a ScrnInfoRec and claim the slot */ - pScrn = NULL; - #ifndef DISABLE_VGA_IO - if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], - MGAPciChipsets, NULL, NULL, - NULL, NULL, NULL))) + pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], + MGAPciChipsets, NULL, NULL, + NULL, NULL, NULL); #else - smga = xnfalloc(sizeof(MgaSave)); - smga->pvp = xf86GetPciInfoForEntity(usedChips[i]); - if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], - MGAPciChipsets, NULL,VgaIOSave, - VgaIOSave, VgaIORestore,smga))) + smga = xnfalloc(sizeof(MgaSave)); + smga->pvp = xf86GetPciInfoForEntity(usedChips[i]); + pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], + MGAPciChipsets, NULL,VgaIOSave, + VgaIOSave, VgaIORestore,smga); #endif - { - - /* Fill in what we can of the ScrnInfoRec */ - pScrn->driverVersion = MGA_VERSION; - pScrn->driverName = MGA_DRIVER_NAME; - pScrn->name = MGA_NAME; - pScrn->Probe = MGAProbe; - pScrn->PreInit = MGAPreInit; - pScrn->ScreenInit = MGAScreenInit; - pScrn->SwitchMode = MGASwitchMode; - pScrn->AdjustFrame = MGAAdjustFrame; - pScrn->EnterVT = MGAEnterVT; - pScrn->LeaveVT = MGALeaveVT; - pScrn->FreeScreen = MGAFreeScreen; - pScrn->ValidMode = MGAValidMode; - - foundScreen = TRUE; + if (pScrn != NULL) { + MGAPtr pMga; + + /* Fill in what we can of the ScrnInfoRec */ + pScrn->driverVersion = MGA_VERSION; + pScrn->driverName = MGA_DRIVER_NAME; + pScrn->name = MGA_NAME; + pScrn->Probe = MGAProbe; + pScrn->PreInit = MGAPreInit; + pScrn->ScreenInit = MGAScreenInit; + pScrn->SwitchMode = MGASwitchMode; + pScrn->AdjustFrame = MGAAdjustFrame; + pScrn->EnterVT = MGAEnterVT; + pScrn->LeaveVT = MGALeaveVT; + pScrn->FreeScreen = MGAFreeScreen; + pScrn->ValidMode = MGAValidMode; + + foundScreen = TRUE; + + /* Allocate the MGARec driverPrivate */ + if (!MGAGetRec(pScrn)) { + return FALSE; } - /* - * For cards that can do dual head per entity, mark the entity - * as sharable. - */ - pEnt = xf86GetEntityInfo(usedChips[i]); - if ((pEnt->chipset == PCI_CHIP_MGAG400 || pEnt->chipset == PCI_CHIP_MGAG550)) { - MGAEntPtr pMgaEnt = NULL; - DevUnion *pPriv; + pMga = MGAPTR(pScrn); - xf86SetEntitySharable(usedChips[i]); - /* Allocate an entity private if necessary */ - if (MGAEntityIndex < 0) - MGAEntityIndex = xf86AllocateEntityPrivateIndex(); - pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex); - if (!pPriv->ptr) { - pPriv->ptr = xnfcalloc(sizeof(MGAEntRec), 1); - pMgaEnt = pPriv->ptr; - pMgaEnt->lastInstance = -1; - } else { - pMgaEnt = pPriv->ptr; - } /* - * Set the entity instance for this instance of the driver. For - * dual head per card, instance 0 is the "master" instance, driving - * the primary head, and instance 1 is the "slave". + * For cards that can do dual head per entity, mark the entity + * as sharable. */ - pMgaEnt->lastInstance++; - xf86SetEntityInstanceForScreen(pScrn, pScrn->entityList[0], - pMgaEnt->lastInstance); - } - } + pEnt = xf86GetEntityInfo(usedChips[i]); + + switch (pEnt->chipset) { + case PCI_CHIP_MGA2064: + i = 0; + break; + + case PCI_CHIP_MGA1064: + i = 1; + break; + + case PCI_CHIP_MGA2164: + case PCI_CHIP_MGA2164_AGP: + i = 2; + break; + case PCI_CHIP_MGAG100: + case PCI_CHIP_MGAG100_PCI: + i = 3; + break; + + case PCI_CHIP_MGAG200: + case PCI_CHIP_MGAG200_PCI: + i = 4; + break; + + case PCI_CHIP_MGAG400: + i = 5; + break; + + case PCI_CHIP_MGAG550: + i = 6; + break; + + case PCI_CHIP_MGAG200_SE_A_PCI: + case PCI_CHIP_MGAG200_SE_B_PCI: + i = 7; + break; + + default: + return FALSE; + } + + pMga->chip_attribs = & attribs[i]; + + if (pMga->chip_attribs->dual_head_possible) { + MGAEntPtr pMgaEnt = NULL; + DevUnion *pPriv; + + xf86SetEntitySharable(usedChips[i]); + /* Allocate an entity private if necessary */ + if (MGAEntityIndex < 0) + MGAEntityIndex = xf86AllocateEntityPrivateIndex(); + pPriv = xf86GetEntityPrivate(pScrn->entityList[0], MGAEntityIndex); + if (!pPriv->ptr) { + pPriv->ptr = xnfcalloc(sizeof(MGAEntRec), 1); + pMgaEnt = pPriv->ptr; + pMgaEnt->lastInstance = -1; + } else { + pMgaEnt = pPriv->ptr; + } + /* + * Set the entity instance for this instance of the driver. For + * dual head per card, instance 0 is the "master" instance, driving + * the primary head, and instance 1 is the "slave". + */ + pMgaEnt->lastInstance++; + xf86SetEntityInstanceForScreen(pScrn, pScrn->entityList[0], + pMgaEnt->lastInstance); + } + } + } xfree(usedChips); return foundScreen; } +#endif /* @@ -756,9 +977,15 @@ MGACountRam(ScrnInfoPtr pScrn) data for the memconfig even when the bios has initialized it. At least, my cards don't advertise the documented values (my 8 and 16 Meg G200s have the same values) */ - if(pMga->Primary) /* can only trust this for primary cards */ + if (pMga->Primary) { /* can only trust this for primary cards */ +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u32(pMga->PciInfo, & biosInfo, + PCI_OPTION_REG); +#else biosInfo = pciReadLong(pMga->PciTag, PCI_OPTION_REG); #endif + } +#endif switch(pMga->Chipset) { case PCI_CHIP_MGA2164: @@ -819,7 +1046,10 @@ MGACountRam(ScrnInfoPtr pScrn) int i; pMga->FbMapSize = ProbeSize * 1024; - MGAMapMem(pScrn); + if (!MGAMapMem(pScrn)) { + return 0; + } + base = pMga->FbBase; if (pMga->is_G200SE) { @@ -1059,26 +1289,41 @@ static void VgaIOSave(int i, void *arg) { MgaSavePtr sMga = arg; +#ifndef XSERVER_LIBPCIACCESS PCITAG tag = pciTag(sMga->pvp->bus,sMga->pvp->device,sMga->pvp->func); +#endif + uint32_t temp; #ifdef DEBUG ErrorF("mga: VgaIOSave: %d:%d:%d\n", sMga->pvp->bus, sMga->pvp->device, sMga->pvp->func); #endif - sMga->enable = (pciReadLong(tag, PCI_OPTION_REG) & 0x100) != 0; +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u32(pMga->PciInfo, & temp, PCI_OPTION_REG); +#else + temp = pciReadLong(tag, PCI_OPTION_REG); +#endif + sMga->enable = (temp & 0x100) != 0; } static void VgaIORestore(int i, void *arg) { MgaSavePtr sMga = arg; +#ifndef XSERVER_LIBPCIACCESS PCITAG tag = pciTag(sMga->pvp->bus,sMga->pvp->device,sMga->pvp->func); +#endif #ifdef DEBUG ErrorF("mga: VgaIORestore: %d:%d:%d\n", sMga->pvp->bus, sMga->pvp->device, sMga->pvp->func); #endif +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_bits(pMga->PciInfo, 0x00000100, sMga->enable, + PCI_OPTION_REG); +#else pciSetBitsLong(tag, PCI_OPTION_REG, 0x100, sMga->enable ? 0x100 : 0x000); +#endif } static void @@ -1093,7 +1338,12 @@ VgaIODisable(void *arg) BOOLTOSTRING(xf86ResAccessEnter)); #endif /* Turn off the vgaioen bit. */ +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_bits(pMga->PciInfo, 0x00000100, 0x00000000, + PCI_OPTION_REG); +#else pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, 0x100, 0x000); +#endif } static void @@ -1108,8 +1358,14 @@ VgaIOEnable(void *arg) BOOLTOSTRING(xf86ResAccessEnter)); #endif /* Turn on the vgaioen bit. */ - if (pMga->Primary) + if (pMga->Primary) { +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_bits(pMga->PciInfo, 0x00000100, 0x00000100, + PCI_OPTION_REG); +#else pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, 0x100, 0x100); +#endif + } } #endif /* DISABLE_VGA_IO */ @@ -1184,10 +1440,6 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) if (pScrn->numEntities != 1) return FALSE; - /* Allocate the MGARec driverPrivate */ - if (!MGAGetRec(pScrn)) { - return FALSE; - } pMga = MGAPTR(pScrn); /* Set here until dri is enabled */ @@ -1227,10 +1479,12 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) if (!vgaHWGetHWRec(pScrn)) return FALSE; +#ifndef XSERVER_LIBPCIACCESS /* Find the PCI info for this screen */ pMga->PciInfo = xf86GetPciInfoForEntity(pMga->pEnt->index); pMga->PciTag = pciTag(pMga->PciInfo->bus, pMga->PciInfo->device, pMga->PciInfo->func); +#endif pMga->Primary = xf86IsPrimaryPci(pMga->PciInfo); @@ -1266,15 +1520,16 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) pMga->Chipset); } else { from = X_PROBED; - pMga->Chipset = pMga->PciInfo->chipType; + pMga->Chipset = DEVICE_ID(pMga->PciInfo); pScrn->chipset = (char *)xf86TokenToString(MGAChipsets, pMga->Chipset); } + if (pMga->device->chipRev >= 0) { pMga->ChipRev = pMga->device->chipRev; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", pMga->ChipRev); } else { - pMga->ChipRev = pMga->PciInfo->chipRev; + pMga->ChipRev = CHIP_REVISION(pMga->PciInfo); } /* @@ -1306,15 +1561,9 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) || (pMga->Chipset == PCI_CHIP_MGAG550); pMga->is_G200SE = (pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) || (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI); - pMga->is_HAL_chipset = ((pMga->Chipset == PCI_CHIP_MGAG200_PCI) || - (pMga->Chipset == PCI_CHIP_MGAG200) || - (pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) || - (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI) || - (pMga->Chipset == PCI_CHIP_MGAG400) || - (pMga->Chipset == PCI_CHIP_MGAG550)); #ifdef USEMGAHAL - if (HAL_CHIPSETS) { + if (pMga->chip_attribs->HAL_chipset) { Bool loadHal = TRUE; from = X_DEFAULT; @@ -1482,7 +1731,14 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) if (pMga->is_G200SE) { /* Disable MTRR support on PCIe systems */ +#ifdef XSERVER_LIBPCIACCESS + uint32_t temp; + + pci_device_cfg_read_u32(pMga->PciInfo, & temp, 0xDC); +#else CARD32 temp = pciReadLong(pMga->PciTag, 0xDC); +#endif + if ((temp & 0x0000FF00) != 0x0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Disabling MTRR support.\n"); pScrn->options = xf86ReplaceBoolOption(pScrn->options, "MTRR", FALSE); @@ -1491,12 +1747,9 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) #if !defined(__powerpc__) pMga->softbooted = FALSE; - if (pMga->Chipset >= PCI_CHIP_MGAG400 - && !pMga->Primary - && !pMga->SecondCrtc) - Default = TRUE; - else - Default = FALSE; + Default = (pMga->chip_attribs->dual_head_possible + && !pMga->Primary && !pMga->SecondCrtc); + if (xf86ReturnOptValBool(pMga->Options, OPTION_INT10, Default) && xf86LoadSubModule(pScrn, "int10")) { xf86Int10InfoPtr pInt; @@ -1743,83 +1996,68 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) /* ajv changes to reflect actual values. see sdk pp 3-2. */ /* these masks just get rid of the crap in the lower bits */ - /* - * For the 2064 and older rev 1064, base0 is the MMIO and base0 is - * the framebuffer is base1. Let the config file override these. + /* For the 2064 and older rev 1064, base0 is the MMIO and base1 is + * the framebuffer. */ - if (pMga->device->MemBase != 0) { - /* Require that the config file value matches one of the PCI values. */ - if (!xf86CheckPciMemBase(pMga->PciInfo, pMga->device->MemBase)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "MemBase 0x%08lX doesn't match any PCI base register.\n", - pMga->device->MemBase); - MGAFreeRec(pScrn); - return FALSE; - } - pMga->FbAddress = pMga->device->MemBase; - from = X_CONFIG; - } else { - /* details: mgabase2 sdk pp 4-12 */ - int i = ((pMga->Chipset == PCI_CHIP_MGA1064 && pMga->ChipRev < 3) || - pMga->Chipset == PCI_CHIP_MGA2064) ? 1 : 0; - pMga->FbBaseReg = i; - if (pMga->PciInfo->memBase[i] != 0) { - pMga->FbAddress = pMga->PciInfo->memBase[i] & 0xff800000; - from = X_PROBED; - } else { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "No valid FB address in PCI config space\n"); - MGAFreeRec(pScrn); - return FALSE; + + switch (pMga->chip_attribs->BARs) { + case old_BARs: + pMga->framebuffer_bar = 1; + pMga->io_bar = 0; + pMga->iload_bar = -1; + break; + case probe_BARs: + if (pMga->ChipRev < 3) { + pMga->framebuffer_bar = 1; + pMga->io_bar = 0; + pMga->iload_bar = 2; + break; } + /* FALLTHROUGH */ + case new_BARs: + pMga->framebuffer_bar = 0; + pMga->io_bar = 1; + pMga->iload_bar = 2; + break; } - xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", - (unsigned long)pMga->FbAddress); -#if !defined(__powerpc__) - if (pMga->device->IOBase != 0) { - /* Require that the config file value matches one of the PCI values. */ - if (!xf86CheckPciMemBase(pMga->PciInfo, pMga->device->IOBase)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "IOBase 0x%08lX doesn't match any PCI base register.\n", - pMga->device->IOBase); - MGAFreeRec(pScrn); - return FALSE; - } - pMga->IOAddress = pMga->device->IOBase; - from = X_CONFIG; - } else +#ifdef XSERVER_LIBPCIACCESS + pMga->FbAddress = pMga->PciInfo->regions[pMga->framebuffer_bar].base_addr; +#else + pMga->FbAddress = pMga->PciInfo->memBase[pMga->framebuffer_bar] & 0xff800000; #endif - { - /* details: mgabase1 sdk pp 4-11 */ - int i = ((pMga->Chipset == PCI_CHIP_MGA1064 && pMga->ChipRev < 3) || - pMga->Chipset == PCI_CHIP_MGA2064) ? 0 : 1; - if (pMga->PciInfo->memBase[i] != 0) { - pMga->IOAddress = pMga->PciInfo->memBase[i] & 0xffffc000; - from = X_PROBED; - } else { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "No valid MMIO address in PCI config space\n"); - MGAFreeRec(pScrn); - return FALSE; - } - } + + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n", + (unsigned long)pMga->FbAddress); + +#ifdef XSERVER_LIBPCIACCESS + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "MMIO registers at 0x%lX\n", + (unsigned long) pMga->PciInfo->regions[pMga->io_bar].base_addr); +#else + pMga->IOAddress = pMga->PciInfo->memBase[pMga->io_bar] & 0xffffc000; + xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n", (unsigned long)pMga->IOAddress); +#endif - - pMga->ILOADAddress = 0; - if ( pMga->Chipset != PCI_CHIP_MGA2064 ) { - if (pMga->PciInfo->memBase[2] != 0) { - pMga->ILOADAddress = pMga->PciInfo->memBase[2] & 0xffffc000; - xf86DrvMsg(pScrn->scrnIndex, X_PROBED, - "Pseudo-DMA transfer window at 0x%lX\n", - (unsigned long)pMga->ILOADAddress); - } + if (pMga->iload_bar != -1) { +#ifdef XSERVER_LIBPCIACCESS + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Pseudo-DMA transfer window at 0x%lX\n", + (unsigned long) pMga->PciInfo->regions[pMga->iload_bar].base_addr); +#else + if (pMga->PciInfo->memBase[2] != 0) { + pMga->ILOADAddress = pMga->PciInfo->memBase[2] & 0xffffc000; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Pseudo-DMA transfer window at 0x%lX\n", + (unsigned long)pMga->ILOADAddress); + } +#endif } +#ifndef XSERVER_LIBPCIACCESS /* * Find the BIOS base. Get it from the PCI config if possible. Otherwise * use the VGA default. Allow the config file to override this. @@ -1844,6 +2082,8 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, pMga->BiosFrom, "BIOS at 0x%lX\n", (unsigned long)pMga->BiosAddress); } +#endif + if (xf86RegisterResources(pMga->pEnt->index, NULL, ResExclusive)) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, @@ -1856,7 +2096,7 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) * Read the BIOS data struct */ -#if defined(__alpha__) +#if defined(__alpha__) && !defined(XSERVER_LIBPCIACCESS) /* * Some old Digital-OEMed Matrox Millennium I cards have a VGA * disable switch. If the disable is on, we can't read the BIOS, @@ -1913,6 +2153,12 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) pScrn->videoRam = MGACountRam(pScrn); } + if (pScrn->videoRam == 0) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Unable to detect video RAM.\n"); + return FALSE; + } + if (pMga->DualHeadEnabled) { /* This takes gives either half or 8 meg to the second head * whichever is less. */ @@ -2256,29 +2502,26 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) ); /* MGA_HAL */ #endif - if (pMga->HasSDRAM) { /* don't bother checking */ } - else if ((pMga->PciInfo->subsysCard == PCI_CARD_MILL_G200_SD) || - (pMga->PciInfo->subsysCard == PCI_CARD_MARV_G200_SD) || - (pMga->PciInfo->subsysCard == PCI_CARD_MYST_G200_SD) || - (pMga->PciInfo->subsysCard == PCI_CARD_PROD_G100_SD)) { - pMga->HasSDRAM = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Has SDRAM\n"); - } - /* - * Can we trust HALlib to set the memory configuration - * registers correctly? + /* If the Device section explicitly set HasSDRAM, don't bother checking. */ - else if ((pMga->softbooted || pMga->Primary -#ifdef USEMGAHAL - /*|| pMga->HALLoaded*/ -#endif - ) && - (pMga->Chipset != PCI_CHIP_MGA2064) && - (pMga->Chipset != PCI_CHIP_MGA2164) && - (pMga->Chipset != PCI_CHIP_MGA2164_AGP)) { - CARD32 option_reg = pciReadLong(pMga->PciTag, PCI_OPTION_REG); - if(!(option_reg & (1 << 14))) { - pMga->HasSDRAM = TRUE; + if (!pMga->HasSDRAM) { + if ((pMga->softbooted || pMga->Primary) + && pMga->chip_attribs->probe_for_sdram) { + uint32_t option_reg; + +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u32(pMga->PciInfo, & option_reg, + PCI_OPTION_REG); +#else + option_reg = pciReadLong(pMga->PciTag, PCI_OPTION_REG); +#endif + pMga->HasSDRAM = ((option_reg & (1 << 14)) == 0); + } + else { + pMga->HasSDRAM = pMga->chip_attribs->has_sdram; + } + + if (pMga->HasSDRAM) { xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Has SDRAM\n"); } } @@ -2315,23 +2558,19 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) */ pMga->YDstOrg = 0; - if (((pMga->Chipset == PCI_CHIP_MGA2064) || - (pMga->Chipset == PCI_CHIP_MGA2164) || - (pMga->Chipset == PCI_CHIP_MGA2164_AGP)) && - (pScrn->virtualX * pScrn->virtualY * bytesPerPixel > 4*1024*1024)) - { - int offset, offset_modulo, ydstorg_modulo; + if (pMga->chip_attribs->fb_4mb_quirk && + (pScrn->virtualX * pScrn->virtualY * bytesPerPixel > 4*1024*1024)) { + int offset; + int offset_modulo = (pScrn->bitsPerPixel == 24) ? 12 : 4; + int ydstorg_modulo = 64; - offset = (4*1024*1024) % (pScrn->displayWidth * bytesPerPixel); - offset_modulo = 4; - ydstorg_modulo = 64; - if (pScrn->bitsPerPixel == 24) - offset_modulo *= 3; - if (pMga->Interleave) - { + + if (pMga->Interleave) { offset_modulo <<= 1; ydstorg_modulo <<= 1; } + + offset = (4*1024*1024) % (pScrn->displayWidth * bytesPerPixel); pMga->YDstOrg = offset / bytesPerPixel; /* @@ -2533,76 +2772,96 @@ MGAPreInit(ScrnInfoPtr pScrn, int flags) static Bool MGAMapMem(ScrnInfoPtr pScrn) { - MGAPtr pMga; - - pMga = MGAPTR(pScrn); - - /* - * Map IO registers to virtual address space - */ - /* - * For Alpha, we need to map SPARSE memory, since we need - * byte/short access. This is taken care of automatically by the - * os-support layer. - */ - pMga->IOBase = xf86MapPciMem(pScrn->scrnIndex, - VIDMEM_MMIO | VIDMEM_READSIDEEFFECT, - pMga->PciTag, pMga->IOAddress, 0x4000); - if (pMga->IOBase == NULL) - return FALSE; - - pMga->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, - pMga->PciTag, pMga->FbAddress, - pMga->FbMapSize); - if (pMga->FbBase == NULL) - return FALSE; + MGAPtr pMga = MGAPTR(pScrn); +#ifdef XSERVER_LIBPCIACCESS + struct pci_device *const dev = pMga->PciInfo; + int err; +#endif - pMga->FbStart = pMga->FbBase + pMga->YDstOrg * (pScrn->bitsPerPixel / 8); - /* Map the ILOAD transfer window if there is one. We only make - DWORD access on DWORD boundaries to this window */ - if (pMga->ILOADAddress) { - pMga->ILOADBase = xf86MapPciMem(pScrn->scrnIndex, - VIDMEM_MMIO | VIDMEM_MMIO_32BIT | - VIDMEM_READSIDEEFFECT, - pMga->PciTag, pMga->ILOADAddress, 0x800000); - } else - pMga->ILOADBase = NULL; + if (!pMga->FBDev) { +#ifdef XSERVER_LIBPCIACCESS + err = pci_device_map_region(dev, 0, TRUE); + if (err) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Unable to map BAR 0. %s (%d)\n", + strerror(err), err); + return FALSE; + } - return TRUE; -} + err = pci_device_map_region(dev, 1, TRUE); + if (err) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Unable to map BAR 1. %s (%d)\n", + strerror(err), err); + return FALSE; + } -static Bool -MGAMapMemFBDev(ScrnInfoPtr pScrn) -{ - MGAPtr pMga; + pMga->IOBase = dev->regions[ pMga->io_bar ].memory; + pMga->FbBase = dev->regions[ pMga->framebuffer_bar ].memory; +#else + /* + * For Alpha, we need to map SPARSE memory, since we need + * byte/short access. This is taken care of automatically by the + * os-support layer. + */ + pMga->IOBase = xf86MapPciMem(pScrn->scrnIndex, + VIDMEM_MMIO | VIDMEM_READSIDEEFFECT, + pMga->PciTag, pMga->IOAddress, 0x4000); + if (pMga->IOBase == NULL) + return FALSE; - pMga = MGAPTR(pScrn); + pMga->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, + pMga->PciTag, pMga->FbAddress, + pMga->FbMapSize); + if (pMga->FbBase == NULL) + return FALSE; +#endif + } + else { + pMga->FbBase = fbdevHWMapVidmem(pScrn); + if (pMga->FbBase == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Unable to map framebuffer.\n"); + return FALSE; + } - pMga->FbBase = fbdevHWMapVidmem(pScrn); - if (pMga->FbBase == NULL) - return FALSE; + pMga->IOBase = fbdevHWMapMMIO(pScrn); + if (pMga->IOBase == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unable to map MMIO.\n"); + return FALSE; + } + } - pMga->IOBase = fbdevHWMapMMIO(pScrn); - if (pMga->IOBase == NULL) - return FALSE; pMga->FbStart = pMga->FbBase + pMga->YDstOrg * (pScrn->bitsPerPixel / 8); -#if 1 /* can't ask matroxfb for a mapping of the iload window */ + pMga->ILOADBase = NULL; + if (pMga->iload_bar != -1) { +#ifdef XSERVER_LIBPCIACCESS + err = pci_device_map_region(dev, pMga->iload_bar, TRUE); + if (err) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Unable to map BAR 2 (ILOAD region). %s (%d)\n", + strerror(err), err); + return FALSE; + } - /* Map the ILOAD transfer window if there is one. We only make - DWORD access on DWORD boundaries to this window */ - if(pMga->ILOADAddress) - pMga->ILOADBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, - pMga->PciTag, pMga->ILOADAddress, 0x800000); - else pMga->ILOADBase = NULL; + pMga->ILOADBase = dev->regions[pMga->iload_bar].memory; +#else + pMga->ILOADBase = xf86MapPciMem(pScrn->scrnIndex, + VIDMEM_MMIO | VIDMEM_MMIO_32BIT | + VIDMEM_READSIDEEFFECT, + pMga->PciTag, pMga->ILOADAddress, + 0x800000); #endif + } + + return TRUE; } - /* * Unmap the framebuffer and MMIO memory. */ @@ -2610,44 +2869,49 @@ MGAMapMemFBDev(ScrnInfoPtr pScrn) static Bool MGAUnmapMem(ScrnInfoPtr pScrn) { - MGAPtr pMga; + MGAPtr pMga = MGAPTR(pScrn); +#ifdef XSERVER_LIBPCIACCESS + struct pci_device * const dev = pMga->PciInfo; +#endif - pMga = MGAPTR(pScrn); + + if (!pMga->FBDev) { +#ifdef XSERVER_LIBPCIACCESS + pci_device_unmap_region(dev, 0); + pci_device_unmap_region(dev, 1); +#else + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->IOBase, 0x4000); + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->FbBase, pMga->FbMapSize); +#endif + } + else { + fbdevHWUnmapVidmem(pScrn); + fbdevHWUnmapMMIO(pScrn); + } - /* - * Unmap IO registers to virtual address space - */ - xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->IOBase, 0x4000); - pMga->IOBase = NULL; + if ((pMga->iload_bar != -1) +#ifdef XSERVER_LIBPCIACCESS + && (dev->regions[pMga->iload_bar].memory != NULL) +#else + && (pMga->ILOADBase != NULL) +#endif + ) { +#ifdef XSERVER_LIBPCIACCESS + pci_device_unmap_region(dev, pMga->iload_bar); +#else + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->ILOADBase, 0x800000); +#endif + } - xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->FbBase, pMga->FbMapSize); + pMga->IOBase = NULL; pMga->FbBase = NULL; pMga->FbStart = NULL; - - if(pMga->ILOADBase) - xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pMga->ILOADBase, 0x800000); pMga->ILOADBase = NULL; - return TRUE; -} - -static Bool -MGAUnmapMemFBDev(ScrnInfoPtr pScrn) -{ - MGAPtr pMga; - pMga = MGAPTR(pScrn); - fbdevHWUnmapVidmem(pScrn); - pMga->FbBase = NULL; - pMga->FbStart = NULL; - fbdevHWUnmapMMIO(pScrn); - pMga->IOBase = NULL; - /* XXX ILOADBase */ return TRUE; } - - /* * This function saves the video state. */ @@ -2917,16 +3181,7 @@ MGA_HAL( /* getting around bugs in the HAL lib. MATROX: hint, hint. */ MGA_HAL( - switch (pMga->Chipset) { - case PCI_CHIP_MGA1064: - case PCI_CHIP_MGAG100: - case PCI_CHIP_MGAG100_PCI: - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - case PCI_CHIP_MGAG200_SE_A_PCI: - case PCI_CHIP_MGAG200_SE_B_PCI: - case PCI_CHIP_MGAG400: - case PCI_CHIP_MGAG550: + if (pMga->chip_attribs->hwcursor_1064) { if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) { outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW, pMga->FbCursorOffset >> 10); @@ -2941,9 +3196,6 @@ MGA_HAL( outMGAdac(MGA1064_COL_KEY_MSK_MSB,0xFF); outMGAdac(MGA1064_COL_KEY_MSB,0xFF); } - break; - default: - break; } ); /* MGA_HAL */ #endif @@ -3139,6 +3391,7 @@ MGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) #ifdef XF86DRI MessageType driFrom = X_DEFAULT; #endif + DPMSSetProcPtr mga_dpms_set_proc = NULL; /* * First get the ScrnInfoRec @@ -3156,15 +3409,31 @@ MGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) pMga->FbMapSize = pScrn->videoRam * 1024; } + /* Map the MGA memory and MMIO areas */ - if (pMga->FBDev) { - if (!MGAMapMemFBDev(pScrn)) - return FALSE; - } else { - if (!MGAMapMem(pScrn)) - return FALSE; + if (!MGAMapMem(pScrn)) + return FALSE; + + + /* Select functions that vary based on the CRTC configureation of the + * screen. + */ + if (!pMga->MergedFB) { + if (pMga->SecondCrtc) { + mga_dpms_set_proc = MGADisplayPowerManagementSetCrtc2; + pScreen->SaveScreen = MGASaveScreenCrtc2; + } + else { + mga_dpms_set_proc = MGADisplayPowerManagementSet; + pScreen->SaveScreen = MGASaveScreen; + } } - + else { + pScreen->SaveScreen = MGASaveScreenMerged; + mga_dpms_set_proc = MGADisplayPowerManagementSetMerged; + } + + if ((pMga->Chipset == PCI_CHIP_MGAG100) || (pMga->Chipset == PCI_CHIP_MGAG100_PCI)) MGAG100BlackMagic(pScrn); @@ -3242,7 +3511,7 @@ MGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) /* There is a problem in the HALlib: set soft reset bit */ /* MATROX: hint, hint. */ if (!pMga->Primary && !pMga->FBDev && - (pMga->PciInfo->subsysCard == PCI_CARD_MILL_G200_SG) ) { + (SUBSYS_ID(pMga->PciInfo) == PCI_CARD_MILL_G200_SG)) { OUTREG(MGAREG_Reset, 1); usleep(200); OUTREG(MGAREG_Reset, 0); @@ -3255,57 +3524,46 @@ MGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) vgaHWGetIOBase(hwp); /* Map the VGA memory when the primary video */ - if (pMga->Primary && !pMga->FBDev) { - hwp->MapSize = 0x10000; - if (!vgaHWMapMem(pScrn)) + if (!pMga->FBDev) { + if (pMga->Primary) { + hwp->MapSize = 0x10000; + if (!vgaHWMapMem(pScrn)) + return FALSE; + } + + /* Save the current state */ + MGASave(pScrn); + /* Initialise the first mode */ + if (!MGAModeInit(pScrn, pScrn->currentMode)) return FALSE; } - - if (pMga->FBDev) { + else { fbdevHWSave(pScrn); /* Disable VGA core, and leave memory access on */ +#ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_write_bits(pMga->PciInfo, 0x00000100, 0x00000000, + PCI_OPTION_REG); +#else pciSetBitsLong(pMga->PciTag, PCI_OPTION_REG, 0x100, 0x000); +#endif if (!fbdevHWModeInit(pScrn, pScrn->currentMode)) return FALSE; - if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) { - switch (pMga->Chipset) { - case PCI_CHIP_MGA1064: - case PCI_CHIP_MGAG100: - case PCI_CHIP_MGAG100_PCI: - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - case PCI_CHIP_MGAG200_SE_A_PCI: - case PCI_CHIP_MGAG200_SE_B_PCI: - case PCI_CHIP_MGAG400: - case PCI_CHIP_MGAG550: - outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW, pMga->FbCursorOffset >> 10); - outMGAdac(MGA1064_CURSOR_BASE_ADR_HI, pMga->FbCursorOffset >> 18); - break; - default: - break; - } + + if (!pMga->SecondCrtc && pMga->HWCursor + && pMga->chip_attribs->hwcursor_1064) { + outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW, pMga->FbCursorOffset >> 10); + outMGAdac(MGA1064_CURSOR_BASE_ADR_HI, pMga->FbCursorOffset >> 18); } MGAStormEngineInit(pScrn); - } else { - /* Save the current state */ - MGASave(pScrn); - /* Initialise the first mode */ - if (!MGAModeInit(pScrn, pScrn->currentMode)) - return FALSE; - } - /* Darken the screen for aesthetic reasons and set the viewport */ - if (pMga->SecondCrtc == TRUE && !pMga->MergedFB) { - MGASaveScreenCrtc2(pScreen, SCREEN_SAVER_ON); - } - if (pMga->SecondCrtc == FALSE && !pMga->MergedFB) { - MGASaveScreen(pScreen, SCREEN_SAVER_ON); - } - if( pMga->MergedFB ) { - MGASaveScreenMerged( pScreen, SCREEN_SAVER_ON ); } + + /* Darken the screen for aesthetic reasons and set the viewport + */ + (*pScreen->SaveScreen)(pScreen, SCREEN_SAVER_ON); pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + /* * The next step is to setup the screen's visuals, and initialise the * framebuffer code. In cases where the framebuffer's default @@ -3541,29 +3799,11 @@ MGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) ShadowFBInit(pScreen, refreshArea); } - if(pMga->SecondCrtc == TRUE && !pMga->MergedFB) { - xf86DPMSInit(pScreen, MGADisplayPowerManagementSetCrtc2, 0); - } - if(pMga->SecondCrtc == FALSE && !pMga->MergedFB) { - xf86DPMSInit(pScreen, MGADisplayPowerManagementSet, 0); - } - if(pMga->MergedFB) { - xf86DPMSInit(pScreen, MGADisplayPowerManagementSetMerged, 0); - } - + xf86DPMSInit(pScreen, mga_dpms_set_proc, 0); + pScrn->memPhysBase = pMga->FbAddress; pScrn->fbOffset = pMga->YDstOrg * (pScrn->bitsPerPixel / 8); - if(!pMga->MergedFB) { - if(pMga->SecondCrtc == TRUE) { - pScreen->SaveScreen = MGASaveScreenCrtc2; - } else { - pScreen->SaveScreen = MGASaveScreen; - } - } else { /* Merged FB */ - pScreen->SaveScreen = MGASaveScreenMerged; - } - MGAInitVideo(pScreen); #ifdef XF86DRI @@ -3742,8 +3982,10 @@ MGAAdjustFrame(int scrnIndex, int x, int y, int flags) (3 - pMga->BppShifts[(pLayout->bitsPerPixel >> 3) - 1]); if (pLayout->bitsPerPixel == 24) { - if (pMga->Chipset == PCI_CHIP_MGAG400 || pMga->Chipset == PCI_CHIP_MGAG550) - Base &= ~1; /*1 Not sure why */ + if (pMga->Chipset == PCI_CHIP_MGAG400 + || pMga->Chipset == PCI_CHIP_MGAG550) + Base &= ~1; /*1 Not sure why */ + Base *= 3; } @@ -3924,7 +4166,7 @@ MGACloseScreen(int scrnIndex, ScreenPtr pScreen) if (pScrn->vtSema) { if (pMga->FBDev) { fbdevHWRestore(pScrn); - MGAUnmapMemFBDev(pScrn); + MGAUnmapMem(pScrn); } else { MGARestore(pScrn); vgaHWLock(hwp); diff --git a/src/mga_macros.h b/src/mga_macros.h index 8a3221d..69dc8e3 100644 --- a/src/mga_macros.h +++ b/src/mga_macros.h @@ -3,6 +3,20 @@ #ifndef _MGA_MACROS_H_ #define _MGA_MACROS_H_ +#ifdef XSERVER_LIBPCIACCESS +#define MGA_IO_ADDRESS(p) (p)->PciInfo->regions[(p)->io_bar].base_addr +#define VENDOR_ID(p) (p)->vendor_id +#define DEVICE_ID(p) (p)->device_id +#define SUBSYS_ID(p) (p)->subdevice_id +#define CHIP_REVISION(p) (p)->revision +#else +#define MGA_IO_ADDRESS(p) (p)->IOAddress +#define VENDOR_ID(p) (p)->vendor +#define DEVICE_ID(p) (p)->chipType +#define SUBSYS_ID(p) (p)->subsysCard +#define CHIP_REVISION(p) (p)->chipRev +#endif + #define RGBEQUAL(c) (!((((c) >> 8) ^ (c)) & 0xffff)) #ifdef XF86DRI @@ -63,15 +77,13 @@ while(INREG(MGAREG_DWGSYNC) != MGA_SYNC_XTAG) ; \ #endif #ifdef USEMGAHAL -#define HAL_CHIPSETS (pMga->is_HAL_chipset) - #define MGA_HAL(x) { \ MGAPtr pMga = MGAPTR(pScrn); \ - if (pMga->HALLoaded && HAL_CHIPSETS) { x; } \ + if (pMga->HALLoaded && pMga->chip_attribs->HAL_chipset) { x; } \ } #define MGA_NOT_HAL(x) { \ MGAPtr pMga = MGAPTR(pScrn); \ - if (!pMga->HALLoaded || !HAL_CHIPSETS) { x; } \ + if (!pMga->HALLoaded || !pMga->chip_attribs->HAL_chipset) { x; } \ } #else #define MGA_NOT_HAL(x) { x; } diff --git a/src/mga_merge.c b/src/mga_merge.c index aa14dbe..359cdcf 100644 --- a/src/mga_merge.c +++ b/src/mga_merge.c @@ -272,8 +272,9 @@ MGAPreInitMergedFB(ScrnInfoPtr pScrn1, int flags) return TRUE; } +#ifndef XSERVER_LIBPCIACCESS pMga->PciTag = pMga1->PciTag; - +#endif pMga->Primary = pMga1->Primary; /* Set pScrn->monitor */ @@ -370,12 +371,13 @@ MGAPreInitMergedFB(ScrnInfoPtr pScrn1, int flags) } pMga->FbAddress = pMga1->FbAddress; - pMga->FbBaseReg = pMga1->FbBaseReg; pMga->PciInfo = pMga1->PciInfo; +#ifndef XSERVER_LIBPCIACCESS pMga->IOAddress = pMga1->IOAddress; pMga->ILOADAddress = pMga1->ILOADAddress; pMga->BiosFrom = pMga1->BiosFrom; pMga->BiosAddress = pMga1->BiosAddress; +#endif /* * Read the BIOS data struct diff --git a/src/mga_storm.c b/src/mga_storm.c index 67338d9..dfdebeb 100644 --- a/src/mga_storm.c +++ b/src/mga_storm.c @@ -613,37 +613,10 @@ Bool mgaAccelInit( ScreenPtr pScreen ) pMga->MaxFastBlitY = 0; pMga->MaxBlitDWORDS = 0x40000 >> 5; - switch (pMga->Chipset) { - case PCI_CHIP_MGA2064: - pMga->AccelFlags = BLK_OPAQUE_EXPANSION | FASTBLT_BUG; - break; - case PCI_CHIP_MGA2164: - case PCI_CHIP_MGA2164_AGP: - pMga->AccelFlags = BLK_OPAQUE_EXPANSION | - TRANSC_SOLID_FILL | - USE_RECTS_FOR_LINES; - break; - case PCI_CHIP_MGAG200_SE_A_PCI: - case PCI_CHIP_MGAG200_SE_B_PCI: - case PCI_CHIP_MGAG400: - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - pMga->AccelFlags = TRANSC_SOLID_FILL | - TWO_PASS_COLOR_EXPAND; - break; - case PCI_CHIP_MGA1064: - pMga->AccelFlags = 0; - break; - case PCI_CHIP_MGAG100: - case PCI_CHIP_MGAG100_PCI: - default: - pMga->AccelFlags = MGA_NO_PLANEMASK; - break; - } - /* all should be able to use this now with the bug fixes */ - pMga->AccelFlags |= USE_LINEAR_EXPANSION; + /* Set initial acceleration flags. + */ + pMga->AccelFlags = pMga->chip_attribs->accel_flags; if ((pMga->FbMapSize > 8*1024*1024) && (pScrn->depth == 8)) { pMga->AccelFlags |= LARGE_ADDRESSES; diff --git a/src/mga_vga.c b/src/mga_vga.c index 8dfc08f..9f00b3d 100644 --- a/src/mga_vga.c +++ b/src/mga_vga.c @@ -1,3 +1,7 @@ +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + #include "misc.h" #include "xf86.h" #include "xf86_OSproc.h" |