Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-mga into pci-rework

11 files changed, 153 insertions, 163 deletions

diff --git a/Makefile.am b/Makefile.am
index d05c5ca..59e0db2 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -27,6 +27,6 @@ EXTRA_DIST = README_HALLIB mga_PInS.txt ChangeLog
 .PHONY: ChangeLog
 
 ChangeLog:
-	git-log > ChangeLog
+	(GIT_DIR=$(top_srcdir)/.git git-log > .changelog.tmp && mv .changelog.tmp ChangeLog; rm -f .changelog.tmp) || (touch ChangeLog; echo 'git directory not found: installing possibly empty changelog.' >&2)
 
 dist-hook: ChangeLog
diff --git a/configure.ac b/configure.ac
index 702d9ce..85908a2 100644
--- a/configure.ac
+++ b/configure.ac
@@ -24,10 +24,12 @@ AC_PREREQ(2.57)
 
 # When the version number is modified here, also modify it in src/mga.h.
 AC_INIT([xf86-video-mga],
-        1.4.4,
+        1.4.5,
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
         xf86-video-mga)
 
+XORG_RELEASE_VERSION
+
 AC_CONFIG_SRCDIR([Makefile.am])
 AM_CONFIG_HEADER([config.h])
 AC_CONFIG_AUX_DIR(.)
@@ -55,7 +57,7 @@ AC_ARG_ENABLE(dri, AC_HELP_STRING([--disable-dri],
               [DRI=auto])
 AC_ARG_ENABLE(exa,
               AC_HELP_STRING([--disable-exa],
-                             [Disable EXA support [[default enabled]]]),
+                             [Disable EXA support [[default=enabled]]]),
               [EXA="$enableval"],
               [EXA=yes])
 
diff --git a/src/mga.h b/src/mga.h
index a1179f9..4be0fbb 100644
--- a/src/mga.h
+++ b/src/mga.h
@@ -155,9 +155,6 @@ void MGAdbg_outreg32(ScrnInfoPtr, int,int, char*);
 #define MGA_C_NAME MGA
 #define MGA_MODULE_DATA mgaModuleData
 #define MGA_DRIVER_NAME "mga"
-#define MGA_MAJOR_VERSION 1
-#define MGA_MINOR_VERSION 4
-#define MGA_PATCHLEVEL 4
 
 typedef struct {
     unsigned char	ExtVga[6];
diff --git a/src/mga_dacG.c b/src/mga_dacG.c
index c67490a..cd68cb1 100644
--- a/src/mga_dacG.c
+++ b/src/mga_dacG.c
@@ -326,7 +326,8 @@ MGAGInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 		break;
 	case PCI_CHIP_MGAG100:
 	case PCI_CHIP_MGAG100_PCI:
-		pReg->DacRegs[ MGAGDAC_XVREFCTRL ] = 0x03;
+                pReg->DacRegs[MGA1064_VREF_CTL] = 0x03;
+
 		if(pMga->HasSDRAM) {
 		    if(pMga->OverclockMem) {
                         /* 220 Mhz */
@@ -407,8 +408,14 @@ MGAGInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 		MGA_HAL(break;);
 #endif
         pReg->DacRegs[ MGA1064_VREF_CTL ] = 0x03;
-        pReg->DacRegs[ MGA1064_PIX_CLK_CTL ] = 0x01;
-        pReg->DacRegs[ MGA1064_MISC_CTL ] = 0x19;
+                pReg->DacRegs[MGA1064_PIX_CLK_CTL] =
+                    MGA1064_PIX_CLK_CTL_SEL_PLL;
+
+                pReg->DacRegs[MGA1064_MISC_CTL] =
+                    MGA1064_MISC_CTL_DAC_EN |
+                    MGA1064_MISC_CTL_VGA8 |
+                    MGA1064_MISC_CTL_DAC_RAM_CS;
+
 		if(pMga->HasSDRAM)
 		    pReg->Option = 0x40499121;
 		else
@@ -559,7 +566,11 @@ MGAGInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	MGA_NOT_HAL(pReg->DacRegs[MGA1064_CURSOR_BASE_ADR_HI] = pMga->FbCursorOffset >> 18);
 	
 	if (pMga->SyncOnGreen) {
-	    MGA_NOT_HAL(pReg->DacRegs[MGA1064_GEN_CTL] &= ~0x20);
+	    MGA_NOT_HAL(
+                pReg->DacRegs[MGA1064_GEN_CTL] &=
+                    ~MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS;
+            );
+
 	    pReg->ExtVga[3] |= 0x40;
 	}
 
@@ -795,7 +806,7 @@ MGA_NOT_HAL(
 #endif
 	   /* restore CRTCEXT regs */
            for (i = 0; i < 6; i++)
-	      OUTREG16(0x1FDE, (mgaReg->ExtVga[i] << 8) | i);
+	      OUTREG16(MGAREG_CRTCEXT_INDEX, (mgaReg->ExtVga[i] << 8) | i);
 
 	   /* This handles restoring the generic VGA registers. */
 	   if (pMga->is_G200SE) {
@@ -811,7 +822,7 @@ MGA_NOT_HAL(
 	   /*
 	    * this is needed to properly restore start address
 	    */
-	   OUTREG16(0x1FDE, (mgaReg->ExtVga[0] << 8) | 0);
+	   OUTREG16(MGAREG_CRTCEXT_INDEX, (mgaReg->ExtVga[0] << 8) | 0);
 	} else {
 	   /* Second Crtc */
 	   xMODEINFO ModeInfo;
@@ -892,7 +903,7 @@ MGAGSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 	/*
 	 * Code is needed to get back to bank zero.
 	 */
-	OUTREG16(0x1FDE, 0x0004);
+	OUTREG16(MGAREG_CRTCEXT_INDEX, 0x0004);
 	
 	/*
 	 * This function will handle creating the data structure and filling
@@ -951,8 +962,8 @@ MGAGSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, MGARegPtr mgaReg,
 
 	for (i = 0; i < 6; i++)
 	{
-		OUTREG8(0x1FDE, i);
-		mgaReg->ExtVga[i] = INREG8(0x1FDF);
+		OUTREG8(MGAREG_CRTCEXT_INDEX, i);
+		mgaReg->ExtVga[i] = INREG8(MGAREG_CRTCEXT_DATA);
 	}
 #ifdef DEBUG		
 	ErrorF("Saved values:\nDAC:");
diff --git a/src/mga_dh.c b/src/mga_dh.c
index 0bf89e9..be063e1 100644
--- a/src/mga_dh.c
+++ b/src/mga_dh.c
@@ -26,36 +26,6 @@
 #define CLKSEL_MGA     0x0c
 #define PLLLOCK        0x40
 
-/* CRTC2 control field*/
-#define C2_EN_A                     0
-#define C2_EN_M                     (1 << C2_EN_A)
-#define C2_HIPRILVL_A               4
-#define C2_HIPRILVL_M               (7 << C2_HIPRILVL_A)
-#define C2_MAXHIPRI_A               8
-#define C2_MAXHIPRI_M               (7 << C2_MAXHIPRI_A)
-                                    
-#define C2CTL_PIXCLKSEL_SHIFT       1L
-#define C2CTL_PIXCLKSEL_MASK        (3L << C2CTL_PIXCLKSEL_SHIFT)
-#define C2CTL_PIXCLKSELH_SHIFT      14L
-#define C2CTL_PIXCLKSELH_MASK       (1L << C2CTL_PIXCLKSELH_SHIFT)
-#define C2CTL_PIXCLKSEL_PCICLK      0L
-#define C2CTL_PIXCLKSEL_VDOCLK      (1L << C2CTL_PIXCLKSEL_SHIFT)
-#define C2CTL_PIXCLKSEL_PIXELPLL    (2L << C2CTL_PIXCLKSEL_SHIFT)
-#define C2CTL_PIXCLKSEL_VIDEOPLL    (3L << C2CTL_PIXCLKSEL_SHIFT)
-#define C2CTL_PIXCLKSEL_VDCLK       (1L << C2CTL_PIXCLKSELH_SHIFT)
-
-#define C2CTL_PIXCLKSEL_CRISTAL     (1L << C2CTL_PIXCLKSEL_SHIFT) | (1L << C2CTL_PIXCLKSELH_SHIFT)
-#define C2CTL_PIXCLKSEL_SYSTEMPLL   (2L << C2CTL_PIXCLKSEL_SHIFT) | (1L << C2CTL_PIXCLKSELH_SHIFT)
-
-#define C2CTL_PIXCLKDIS_SHIFT       3L
-#define C2CTL_PIXCLKDIS_MASK        (1L << C2CTL_PIXCLKDIS_SHIFT)
-#define C2CTL_PIXCLKDIS_DISABLE     (1L << C2CTL_PIXCLKDIS_SHIFT)
-
-#define C2CTL_CRTCDACSEL_SHIFT      20L
-#define C2CTL_CRTCDACSEL_MASK       (1L << C2CTL_CRTCDACSEL_SHIFT)
-#define C2CTL_CRTCDACSEL_CRTC1       0
-#define C2CTL_CRTCDACSEL_CRTC2      (1L << C2CTL_CRTCDACSEL_SHIFT)
-
 /* Misc field*/
 #define IOADDSEL        0x01
 #define RAMMAPEN        0x02
@@ -101,39 +71,6 @@
 #define XSYNCCTRL_DAC2VSOFF_OFF                     (1 << XSYNCCTRL_DAC2VSOFF_SHIFT)
 #define XSYNCCTRL_DAC2VSOFF_ON                      0
 
-
-/* XDISPCTRL field */
-#define XDISPCTRL_DAC1OUTSEL_SHIFT                  0L
-#define XDISPCTRL_DAC1OUTSEL_MASK                   1L
-#define XDISPCTRL_DAC1OUTSEL_DIS                    0L
-#define XDISPCTRL_DAC1OUTSEL_EN                     1L
-#define XDISPCTRL_DAC2OUTSEL_SHIFT                  2L
-#define XDISPCTRL_DAC2OUTSEL_MASK                   (3L << XDISPCTRL_DAC2OUTSEL_SHIFT)
-#define XDISPCTRL_DAC2OUTSEL_DIS                    0L
-#define XDISPCTRL_DAC2OUTSEL_CRTC1                  (1L << XDISPCTRL_DAC2OUTSEL_SHIFT)
-#define XDISPCTRL_DAC2OUTSEL_CRTC2                  (2L << XDISPCTRL_DAC2OUTSEL_SHIFT)
-#define XDISPCTRL_DAC2OUTSEL_TVE                    (3L << XDISPCTRL_DAC2OUTSEL_SHIFT)
-#define XDISPCTRL_PANOUTSEL_SHIFT                   5L
-#define XDISPCTRL_PANOUTSEL_MASK                    (3L << XDISPCTRL_PANOUTSEL_SHIFT)
-#define XDISPCTRL_PANOUTSEL_DIS                     0L
-#define XDISPCTRL_PANOUTSEL_CRTC1                   (1L << XDISPCTRL_PANOUTSEL_SHIFT)
-#define XDISPCTRL_PANOUTSEL_CRTC2RGB                (2L << XDISPCTRL_PANOUTSEL_SHIFT)
-#define XDISPCTRL_PANOUTSEL_CRTC2656                (3L << XDISPCTRL_PANOUTSEL_SHIFT)
-
-/* XPWRCTRL field*/
-#define XPWRCTRL_DAC2PDN_SHIFT                      0
-#define XPWRCTRL_DAC2PDN_MASK                       (1 << XPWRCTRL_DAC2PDN_SHIFT)
-#define XPWRCTRL_VIDPLLPDN_SHIFT                    1
-#define XPWRCTRL_VIDPLLPDN_MASK                     (1 << XPWRCTRL_VIDPLLPDN_SHIFT)
-#define XPWRCTRL_PANPDN_SHIFT                       2
-#define XPWRCTRL_PANPDN_MASK                        (1 << XPWRCTRL_PANPDN_SHIFT)
-#define XPWRCTRL_RFIFOPDN_SHIFT                     3
-#define XPWRCTRL_RFIFOPDN_MASK                      (1 << XPWRCTRL_RFIFOPDN_SHIFT)
-#define XPWRCTRL_CFIFOPDN_SHIFT                     4
-#define XPWRCTRL_CFIFOPDN_MASK                      (1 << XPWRCTRL_CFIFOPDN_SHIFT)
-
-
-
 #define POS_HSYNC                  0x00000004
 #define POS_VSYNC                  0x00000008
 
@@ -295,20 +232,23 @@ void MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo)
     ulC2CTL = INREG( MGAREG_C2CTL);
 
     /*--- Disable Pixel clock oscillations On Crtc1 */
-    OUTREG( MGAREG_C2CTL, ulC2CTL | C2CTL_PIXCLKDIS_MASK);
+    OUTREG( MGAREG_C2CTL, ulC2CTL | MGAREG_C2CTL_PIXCLKDIS_MASK);
     /*--- Have to wait minimum time (2 acces will be ok) */
     (void) INREG( MGAREG_Status);
     (void) INREG( MGAREG_Status);
     
     
-    ulC2CTL &= ~(C2CTL_PIXCLKSEL_MASK | C2CTL_PIXCLKSELH_MASK);
+    ulC2CTL &= ~MGAREG_C2CTL_PIXCLKSEL_MASK;
+    ulC2CTL &= ~MGAREG_C2CTL_PIXCLKSELH_MASK;
     
-    ulC2CTL |= C2CTL_PIXCLKSEL_VIDEOPLL; 
+    ulC2CTL |= MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL;
 
     
     OUTREG( MGAREG_C2CTL, ulC2CTL);
+
     /*--- Enable Pixel clock oscillations on CRTC2*/
-    OUTREG( MGAREG_C2CTL, ulC2CTL & ~C2CTL_PIXCLKDIS_MASK);
+    ulC2CTL &= ~MGAREG_C2CTL_PIXCLKDIS_MASK;
+    OUTREG( MGAREG_C2CTL, ulC2CTL);
     
     
     /* We don't use MISC synch pol, must be 0*/
@@ -336,24 +276,21 @@ void MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo)
     ulC2CTL = INREG(MGAREG_C2CTL);
     ucXDispCtrl = inMGAdac(MGA1064_DISP_CTL);
 
-    ucXDispCtrl &= ~XDISPCTRL_DAC2OUTSEL_MASK;
-    ucXDispCtrl |=  XDISPCTRL_DAC2OUTSEL_CRTC2;
+    ucXDispCtrl &= ~MGA1064_DISP_CTL_DAC2OUTSEL_MASK;
 
     if (!pMga->SecondOutput) {
         /* Route Crtc2 on Output1 */
-        ucXDispCtrl &= ~XDISPCTRL_DAC2OUTSEL_MASK;
-        ucXDispCtrl |=  XDISPCTRL_DAC2OUTSEL_CRTC1;
-        ulC2CTL     |=  C2CTL_CRTCDACSEL_CRTC2; 
+        ucXDispCtrl |=  MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1;
+        ulC2CTL |= MGAREG_C2CTL_CRTCDACSEL_CRTC2;
     }
     else {
         /* Route Crtc2 on Output2*/
-        ucXDispCtrl &= ~XDISPCTRL_DAC2OUTSEL_MASK;
-        ucXDispCtrl |=  XDISPCTRL_DAC2OUTSEL_CRTC2;
-        ulC2CTL     &= ~C2CTL_CRTCDACSEL_MASK;
+        ucXDispCtrl |=  MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2;
+        ulC2CTL &= ~MGAREG_C2CTL_CRTCDACSEL_MASK;
     }
     
     /* Enable CRTC2*/
-    ulC2CTL |= C2_EN_M;
+    ulC2CTL |= MGAREG_C2CTL_C2_EN;
 
     pReg->dac2[ MGA1064_DISP_CTL - 0x80] =  ucXDispCtrl; 
 
@@ -377,15 +314,14 @@ void MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo)
     ucByte &= ~(XSYNCCTRL_DAC2HSOFF_MASK | XSYNCCTRL_DAC2VSOFF_MASK);
     pReg->dac2[ MGA1064_SYNC_CTL - 0x80] = ucByte;
 
-   /* Powerup DAC2*/
-    ucByte = inMGAdac( MGA1064_PWR_CTL);
-    pReg->dac2[ MGA1064_PWR_CTL - 0x80] = /*  0x0b; */ (ucByte | XPWRCTRL_DAC2PDN_MASK);
-               
-
-
-   /* Power up Fifo*/
-    ucByte = inMGAdac( MGA1064_PWR_CTL);
-    pReg->dac2[ MGA1064_PWR_CTL - 0x80] =   0x1b; /*   (ucByte | XPWRCTRL_CFIFOPDN_MASK) */;
+   /* Power up DAC2, Fifo.
+    * The TMDS is powered down here, which is likely wrong.
+    */
+    pReg->dac2[MGA1064_PWR_CTL - 0x80] =
+        MGA1064_PWR_CTL_DAC2_EN |
+        MGA1064_PWR_CTL_VID_PLL_EN |
+        MGA1064_PWR_CTL_RFIFO_EN |
+        MGA1064_PWR_CTL_CFIFO_EN;
 
     
 #ifdef DEBUG
diff --git a/src/mga_dri.c b/src/mga_dri.c
index e8cd828..dd0c2fd 100644
--- a/src/mga_dri.c
+++ b/src/mga_dri.c
@@ -974,9 +974,9 @@ Bool MGADRIScreenInit( ScreenPtr pScreen )
 					    pMga->PciInfo->dev,
 					    pMga->PciInfo->func );
    }
-   pDRIInfo->ddxDriverMajorVersion = MGA_MAJOR_VERSION;
-   pDRIInfo->ddxDriverMinorVersion = MGA_MINOR_VERSION;
-   pDRIInfo->ddxDriverPatchVersion = MGA_PATCHLEVEL;
+   pDRIInfo->ddxDriverMajorVersion = PACKAGE_VERSION_MAJOR;
+   pDRIInfo->ddxDriverMinorVersion = PACKAGE_VERSION_MINOR;
+   pDRIInfo->ddxDriverPatchVersion = PACKAGE_VERSION_PATCHLEVEL;
    pDRIInfo->frameBufferPhysicalAddress = (void *) pMga->FbAddress;
    pDRIInfo->frameBufferSize = pMga->FbMapSize;
    pDRIInfo->frameBufferStride = pScrn->displayWidth*(pScrn->bitsPerPixel/8);
diff --git a/src/mga_driver.c b/src/mga_driver.c
index 8fa36ff..48dee81 100644
--- a/src/mga_driver.c
+++ b/src/mga_driver.c
@@ -500,7 +500,7 @@ static XF86ModuleVersionInfo mgaVersRec =
 	MODINFOSTRING1,
 	MODINFOSTRING2,
 	XORG_VERSION_CURRENT,
-	MGA_MAJOR_VERSION, MGA_MINOR_VERSION, MGA_PATCHLEVEL,
+    PACKAGE_VERSION_MAJOR, PACKAGE_VERSION_MINOR, PACKAGE_VERSION_PATCHLEVEL,
 	ABI_CLASS_VIDEODRV,			/* This is a video driver */
 	ABI_VIDEODRV_VERSION,
 	MOD_CLASS_VIDEODRV,
@@ -2840,8 +2840,8 @@ void MGARestoreSecondCrtc(ScrnInfoPtr pScrn)
              */
             CARD8 ucXDispCtrl = inMGAdac(MGA1064_DISP_CTL);
             
-            ucXDispCtrl &= ~0x0c;   /* dac2outsel mask */
-            ucXDispCtrl |=  0x04;   /* dac2 -> crtc1   */
+            ucXDispCtrl &= ~MGA1064_DISP_CTL_DAC2OUTSEL_MASK;
+            ucXDispCtrl |= MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1;
                 
             outMGAdac(MGA1064_DISP_CTL, ucXDispCtrl);
             
@@ -2849,9 +2849,13 @@ void MGARestoreSecondCrtc(ScrnInfoPtr pScrn)
             CARD8 ucXDispCtrl = inMGAdac(MGA1064_DISP_CTL);
             CARD32 ulC2CTL = INREG(MGAREG_C2CTL);
                 
-            ucXDispCtrl &= ~0x0c;   /* dac2outsel mask */
-            ucXDispCtrl |= 0x5;     /* dac1outsel -> crtcdacsel, dac2 -> crtc1 */
-            ulC2CTL &= ~0x00100000; /* crtcdacsel -> crtc1 */
+            ucXDispCtrl &= ~MGA1064_DISP_CTL_DAC2OUTSEL_MASK;
+            ucXDispCtrl |= MGA1064_DISP_CTL_DAC1OUTSEL_EN;
+            ucXDispCtrl |= MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1;
+
+            /* crtcdacsel -> crtc1 */
+            ulC2CTL &= ~MGAREG_C2CTL_CRTCDACSEL_CRTC2;
+            ulC2CTL |= MGAREG_C2CTL_CRTCDACSEL_CRTC1;
                 
             outMGAdac(MGA1064_DISP_CTL, ucXDispCtrl);
             OUTREG(MGAREG_C2CTL, ulC2CTL);
@@ -2861,12 +2865,10 @@ void MGARestoreSecondCrtc(ScrnInfoPtr pScrn)
         /* Force to close second crtc */
         CARD32 ulC2CTL = INREG(MGAREG_C2CTL);
         
-        ulC2CTL &= ~0x1;            /* crtc2 disabled */
+        ulC2CTL &= ~MGAREG_C2CTL_C2_EN;
 
         OUTREG(MGAREG_C2CTL, ulC2CTL);
     }
-
-    return;
 }
 
 /*
@@ -3578,8 +3580,6 @@ MGAAdjustFrame(int scrnIndex, int x, int y, int flags)
 
 }
 
-#define C2STARTADD0 0x3C28
-
 void
 MGAAdjustFrameCrtc2(int scrnIndex, int x, int y, int flags)
 {
@@ -3609,7 +3609,7 @@ MGAAdjustFrameCrtc2(int scrnIndex, int x, int y, int flags)
         Base = (y * pLayout->displayWidth + x) * pLayout->bitsPerPixel >> 3;
         Base += pMga->DstOrg;
         Base &= 0x01ffffc0;
-        OUTREG(C2STARTADD0, Base);
+        OUTREG(MGAREG_C2STARTADD0, Base);
     );
 }
 
@@ -3965,8 +3965,8 @@ MGADisplayPowerManagementSetCrtc2(ScrnInfoPtr pScrn, int PowerManagementMode,
 
 	if (PowerManagementMode==DPMSModeOn) {
 		/* Enable CRTC2 */
-		val |= 0x1;
-		val &= ~(0x8);
+		val |= MGAREG_C2CTL_C2_EN;
+		val &= ~MGAREG_C2CTL_PIXCLKDIS_DISABLE;
 		OUTREG(MGAREG_C2CTL, val);
 		/* Restore normal MAVEN values */
 		if (pMga->Maven) {
@@ -3994,8 +3994,8 @@ MGADisplayPowerManagementSetCrtc2(ScrnInfoPtr pScrn, int PowerManagementMode,
 	}
 	else {
 		/* Disable CRTC2 video */
-		val |= 0x8;
-		val &= ~(0x1);
+		val |= MGAREG_C2CTL_PIXCLKDIS_DISABLE;
+		val &= ~MGAREG_C2CTL_C2_EN;
 		OUTREG(MGAREG_C2CTL, val);
 
 		/* Disable MAVEN display */
diff --git a/src/mga_exa.c b/src/mga_exa.c
index 3242ea8..17618f5 100644
--- a/src/mga_exa.c
+++ b/src/mga_exa.c
@@ -797,7 +797,8 @@ mgaExaInit(ScreenPtr pScreen)
     pExa->Copy = mgaCopy;
     pExa->DoneCopy = mgaNoopDone;
 
-    if (pMga->Chipset == PCI_CHIP_MGAG400) {
+    if (pMga->Chipset == PCI_CHIP_MGAG400 ||
+        pMga->Chipset == PCI_CHIP_MGAG550) {
         pExa->CheckComposite = mgaCheckComposite;
         pExa->PrepareComposite = mgaPrepareComposite;
         pExa->Composite = mgaComposite;
diff --git a/src/mga_merge.c b/src/mga_merge.c
index 53b81be..73b085a 100644
--- a/src/mga_merge.c
+++ b/src/mga_merge.c
@@ -940,23 +940,28 @@ MGASaveScreenMerged(ScreenPtr pScreen, int mode)
     
     if (on) {
 /*        SetTimdeSinceLastInputEvent();*/
-       
+
         /* power on Dac1 */
-        reg = inMGAdac(0x1E);
-	outMGAdac(0x1E, reg | 1);
+        reg = inMGAdac(MGA1064_MISC_CTL);
+        reg |= MGA1064_MISC_CTL_DAC_EN;
+        outMGAdac(MGA1064_MISC_CTL, reg);
+
         /* power on Dac2 */
-        reg = inMGAdac(0xA0);
-	outMGAdac(0xA0, reg | 1);
-        
+        reg = inMGAdac(MGA1064_PWR_CTL);
+        reg |= MGA1064_PWR_CTL_DAC2_EN;
+        outMGAdac(MGA1064_PWR_CTL, reg);
     } else {
         /* power off Dac1 */
-        reg = inMGAdac(0x1E);
-	outMGAdac(0x1E, reg & ~1);
-        /* power off Dac2 */
-        reg = inMGAdac(0xA0);
-	outMGAdac(0xA0, reg & ~1);
+        reg = inMGAdac(MGA1064_MISC_CTL);
+        reg &= ~MGA1064_MISC_CTL_DAC_EN;
+        outMGAdac(MGA1064_MISC_CTL, reg);
 
+        /* power off Dac2 */
+        reg = inMGAdac(MGA1064_PWR_CTL);
+        reg &= ~MGA1064_PWR_CTL_DAC2_EN;
+        outMGAdac(MGA1064_PWR_CTL, reg);
     }
+
     return TRUE;
 }
 
diff --git a/src/mga_reg.h b/src/mga_reg.h
index 874c4ed..93421d1 100644
--- a/src/mga_reg.h
+++ b/src/mga_reg.h
@@ -355,7 +355,6 @@
 #define MGA1064_MUL_CTL_G16V16bits		0x06
 #define MGA1064_MUL_CTL_32_24bits		0x07
 
-#define MGAGDAC_XVREFCTRL		0x18
 #define MGA1064_PIX_CLK_CTL		0x1a
 #define MGA1064_PIX_CLK_CTL_CLK_DIS   		( 0x01 << 2 )
 #define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN   	( 0x01 << 3 )
@@ -365,8 +364,9 @@
 #define MGA1064_PIX_CLK_CTL_SEL_MSK   		( 0x03 << 0 )
 
 #define MGA1064_GEN_CTL		0x1d
+#define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS      (0x01 << 5)
 #define MGA1064_MISC_CTL	0x1e
-#define MGA1064_MISC_CTL_DAC_POW_DN   		( 0x01 << 0 )
+#define MGA1064_MISC_CTL_DAC_EN                ( 0x01 << 0 )
 #define MGA1064_MISC_CTL_VGA   		( 0x01 << 1 )
 #define MGA1064_MISC_CTL_DIS_CON   		( 0x03 << 1 )
 #define MGA1064_MISC_CTL_MAFC   		( 0x02 << 1 )
@@ -402,18 +402,35 @@
 #define MGA1064_PIX_PLL_STAT	0x4f
 
 /*Added for G450 dual head*/
-/* Supported PLL*/
-#define __PIXEL_PLL                 1
-#define __SYSTEM_PLL                2
-#define __VIDEO_PLL                 3
 
 #define MGA1064_VID_PLL_P       0x8D
 #define MGA1064_VID_PLL_M       0x8E
 #define MGA1064_VID_PLL_N       0x8F
 
 #define MGA1064_DISP_CTL        0x8a
+#define MGA1064_DISP_CTL_DAC1OUTSEL_MASK       0x01
+#define MGA1064_DISP_CTL_DAC1OUTSEL_DIS        0x00
+#define MGA1064_DISP_CTL_DAC1OUTSEL_EN         0x01
+#define MGA1064_DISP_CTL_DAC2OUTSEL_MASK       (0x03 << 2)
+#define MGA1064_DISP_CTL_DAC2OUTSEL_DIS        0x00
+#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1      (0x01 << 2)
+#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2      (0x02 << 2)
+#define MGA1064_DISP_CTL_DAC2OUTSEL_TVE        (0x03 << 2)
+#define MGA1064_DISP_CTL_PANOUTSEL_MASK        (0x03 << 5)
+#define MGA1064_DISP_CTL_PANOUTSEL_DIS         0x00
+#define MGA1064_DISP_CTL_PANOUTSEL_CRTC1       (0x01 << 5)
+#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB    (0x02 << 5)
+#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656    (0x03 << 5)
+
 #define MGA1064_SYNC_CTL        0x8b
+
 #define MGA1064_PWR_CTL         0xa0
+#define MGA1064_PWR_CTL_DAC2_EN                (0x01 << 0)
+#define MGA1064_PWR_CTL_VID_PLL_EN             (0x01 << 1)
+#define MGA1064_PWR_CTL_PANEL_EN               (0x01 << 2)
+#define MGA1064_PWR_CTL_RFIFO_EN               (0x01 << 3)
+#define MGA1064_PWR_CTL_CFIFO_EN               (0x01 << 4)
+
 #define MGA1064_PAN_CTL         0xa2
 
 /* Using crtc2 */
@@ -428,6 +445,29 @@
 #define MGAREG2_C2DATACTL        0x4c
 
 #define MGAREG_C2CTL            0x3c10
+#define MGAREG_C2CTL_C2_EN                     0x01
+
+#define MGAREG_C2_HIPRILVL_M                   (0x07 << 4)
+#define MGAREG_C2_MAXHIPRI_M                   (0x07 << 8)
+
+#define MGAREG_C2CTL_PIXCLKSEL_MASK            (0x03 << 1)
+#define MGAREG_C2CTL_PIXCLKSELH_MASK           (0x01 << 14)
+#define MGAREG_C2CTL_PIXCLKSEL_PCICLK          0x00
+#define MGAREG_C2CTL_PIXCLKSEL_VDOCLK          (0x01 << 1)
+#define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL        (0x02 << 1)
+#define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL        (0x03 << 1)
+#define MGAREG_C2CTL_PIXCLKSEL_VDCLK           (0x01 << 14)
+
+#define MGAREG_C2CTL_PIXCLKSEL_CRISTAL         (0x01 << 1) | (0x01 << 14)
+#define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL       (0x02 << 1) | (0x01 << 14)
+
+#define MGAREG_C2CTL_PIXCLKDIS_MASK            (0x01 << 3)
+#define MGAREG_C2CTL_PIXCLKDIS_DISABLE         (0x01 << 3)
+
+#define MGAREG_C2CTL_CRTCDACSEL_MASK           (0x01 << 20)
+#define MGAREG_C2CTL_CRTCDACSEL_CRTC1          0x00
+#define MGAREG_C2CTL_CRTCDACSEL_CRTC2          (0x01 << 20)
+
 #define MGAREG_C2HPARAM         0x3c14
 #define MGAREG_C2HSYNC          0x3c18
 #define MGAREG_C2VPARAM         0x3c1c
@@ -437,10 +477,6 @@
 #define MGAREG_C2OFFSET         0x3c40
 #define MGAREG_C2DATACTL        0x3c4c
 
-#define MGA1064_DISP_CTL        0x8a
-#define MGA1064_SYNC_CTL        0x8b
-#define MGA1064_PWR_CTL         0xa0
-
 /* video register */
 
 #define MGAREG_BESA1C3ORG	0x3d60
diff --git a/src/mga_storm.c b/src/mga_storm.c
index 7fb66c9..23801ac 100644
--- a/src/mga_storm.c
+++ b/src/mga_storm.c
@@ -141,7 +141,7 @@ static void mgaSubsequentDashedTwoPointLine( ScrnInfoPtr pScrn,
     int x1, int y1, int x2, int y2, int flags, int phase );
 #endif
 
-void mgaRestoreAccelState( ScrnInfoPtr pScrn );
+static void mgaRestoreAccelState( ScrnInfoPtr pScrn );
 
 #ifdef XF86DRI
 void mgaDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index);
@@ -149,21 +149,21 @@ void mgaDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
     RegionPtr prgnSrc, CARD32 index);
 #endif
 
-extern void MGASetClippingRectangle(ScrnInfoPtr pScrn, int x1, int y1,
+static void MGASetClippingRectangle(ScrnInfoPtr pScrn, int x1, int y1,
 				int x2, int y2);
-extern void MGADisableClipping(ScrnInfoPtr pScrn);
-extern void MGAFillSolidRectsDMA(ScrnInfoPtr pScrn, int fg, int rop,
+static void MGADisableClipping(ScrnInfoPtr pScrn);
+static void MGAFillSolidRectsDMA(ScrnInfoPtr pScrn, int fg, int rop,
 				unsigned int planemask, int nBox, BoxPtr pBox);
-extern void MGAFillSolidSpansDMA(ScrnInfoPtr pScrn, int fg, int rop,
+static void MGAFillSolidSpansDMA(ScrnInfoPtr pScrn, int fg, int rop,
 				unsigned int planemask, int n, DDXPointPtr ppt,
  				int *pwidth, int fSorted);
-extern void MGAFillMono8x8PatternRectsTwoPass(ScrnInfoPtr pScrn, int fg, int bg,
+static void MGAFillMono8x8PatternRectsTwoPass(ScrnInfoPtr pScrn, int fg, int bg,
  				int rop, unsigned int planemask, int nBox,
  				BoxPtr pBox, int pattern0, int pattern1,
 				int xorigin, int yorigin);
-extern void MGAValidatePolyArc(GCPtr, unsigned long, DrawablePtr);
-extern void MGAValidatePolyPoint(GCPtr, unsigned long, DrawablePtr);
-extern void MGAFillCacheBltRects(ScrnInfoPtr, int, unsigned int, int, BoxPtr,
+static void MGAValidatePolyArc(GCPtr, unsigned long, DrawablePtr);
+static void MGAValidatePolyPoint(GCPtr, unsigned long, DrawablePtr);
+static void MGAFillCacheBltRects(ScrnInfoPtr, int, unsigned int, int, BoxPtr,
 				int, int, XAACacheInfoPtr);
 
 
@@ -220,8 +220,8 @@ static void MGASubsequentCPUToScreenTexture(ScrnInfoPtr pScrn, int dstx,
 #include "mipict.h"
 #include "dixstruct.h"
 
-CARD32 MGAAlphaTextureFormats[2] = {PICT_a8, 0};
-CARD32 MGATextureFormats[2] = {PICT_a8r8g8b8, 0};
+static CARD32 MGAAlphaTextureFormats[2] = {PICT_a8, 0};
+static CARD32 MGATextureFormats[2] = {PICT_a8r8g8b8, 0};
 
 static void
 RemoveLinear (FBLinearPtr linear)
@@ -980,7 +980,7 @@ Bool mgaAccelInit( ScreenPtr pScreen )
 
 
 /* Support for multiscreen */
-void mgaRestoreAccelState(ScrnInfoPtr pScrn)
+static void mgaRestoreAccelState(ScrnInfoPtr pScrn)
 {
    MGAPtr pMga = MGAPTR(pScrn);
    MGAFBLayout *pLayout = &pMga->CurrentLayout;
@@ -1062,8 +1062,8 @@ MGAStormSync(ScrnInfoPtr pScrn)
 
     CHECK_DMA_QUIESCENT(pMga, pScrn);
 
-    /* MGAISBUSY() reportedly causes a freeze for Mystique revision 2 and older */
-    if (!(pMga->Chipset == PCI_CHIP_MGA1064 && (pMga->ChipRev >= 0 && pMga->ChipRev <= 2)))
+    /* MGAISBUSY() reportedly causes a freeze for Mystique revisions 0 and 1 */
+    if (!(pMga->Chipset == PCI_CHIP_MGA1064 && (pMga->ChipRev >= 0 && pMga->ChipRev <= 1)))
 	while(MGAISBUSY());
     /* flush cache before a read (mga-1064g 5.1.6) */
     OUTREG8(MGAREG_CRTC_INDEX, 0);
@@ -1164,7 +1164,8 @@ void MGAStormEngineInit( ScrnInfoPtr pScrn )
 }
 
 
-void MGASetClippingRectangle(
+static void
+MGASetClippingRectangle(
    ScrnInfoPtr pScrn,
    int x1, int y1, int x2, int y2
 ){
@@ -1179,7 +1180,8 @@ void MGASetClippingRectangle(
     pMga->AccelFlags |= CLIPPER_ON;
 }
 
-void MGADisableClipping(ScrnInfoPtr pScrn)
+static void
+MGADisableClipping(ScrnInfoPtr pScrn)
 {
     MGAPtr pMga = MGAPTR(pScrn);
 
@@ -2185,7 +2187,7 @@ void mgaSubsequentScreenToScreenColorExpandFill( ScrnInfoPtr pScrn,
 }
 
 
-void
+static void
 MGAFillSolidRectsDMA(
     ScrnInfoPtr pScrn,
     int	fg, int rop,
@@ -2226,7 +2228,7 @@ MGAFillSolidRectsDMA(
     OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT);
 }
 
-void
+static void
 MGAFillSolidSpansDMA(
    ScrnInfoPtr pScrn,
    int fg, int rop,
@@ -2285,7 +2287,7 @@ MGAFillSolidSpansDMA(
 }
 
 
-void
+static void
 MGAFillMono8x8PatternRectsTwoPass(
     ScrnInfoPtr pScrn,
     int	fg, int bg, int rop,
@@ -2338,7 +2340,7 @@ SECOND_PASS:
 }
 
 
-void
+static void
 MGAValidatePolyArc(
    GCPtr 	pGC,
    unsigned long changes,
@@ -2425,7 +2427,7 @@ MGAPolyPoint (
 }
 
 
-void
+static void
 MGAValidatePolyPoint(
    GCPtr 	pGC,
    unsigned long changes,
@@ -2449,7 +2451,7 @@ MGAValidatePolyPoint(
 }
 
 
-void
+static void
 MGAFillCacheBltRects(
    ScrnInfoPtr pScrn,
    int rop,