diff options
| author | Yannick Heneault <yheneaul@matrox.com> | 2009-03-11 16:31:43 -0400 |
|---|---|---|
| committer | Yannick Heneault <yheneaul@matrox.com> | 2009-03-11 16:31:43 -0400 |
| commit | 36ae47b82310d96f158694765105fc010911702f (patch) | |
| tree | 66e78bc4f5ca14c6d534b7b178a84b3bccfa847d /src/mga_dh.c | |
| parent | 669acb55023bce505f4a912bed6f1e9f3efa2856 (diff) | |
Fixed bad access issues and ddc1 implementation for IP core.
Fixed a bug in PLL programming sequence for G200eW/G200eV where a register IO offset was used instead of
a memory offset.
Removed clock selection toggling in PLL programming sequence for G200eW.
Fixed ddc1 protocol to support correct I/O lines according to chip attribute.
Fixed a bug in CRTC2 programming seqence where a register IO offset was used instead of a memory offset.
Diffstat (limited to 'src/mga_dh.c')
| -rw-r--r-- | src/mga_dh.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mga_dh.c b/src/mga_dh.c index 6ba2945..d9c0d34 100644 --- a/src/mga_dh.c +++ b/src/mga_dh.c @@ -251,9 +251,9 @@ void MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo) /* We don't use MISC synch pol, must be 0*/ - ucByte = inMGAdreg( MGAREG_MISC_READ); + ucByte = INREG8( MGAREG_MEM_MISC_READ); - OUTREG8(MGAREG_MISC_WRITE, (CARD8)(ucByte & ~(HSYNCPOL| VSYNCPOL) )); + OUTREG8(MGAREG_MEM_MISC_WRITE, (CARD8)(ucByte & ~(HSYNCPOL| VSYNCPOL) )); |