diff options
Diffstat (limited to 'src/mga_reg.h')
| -rw-r--r-- | src/mga_reg.h | 56 |
1 files changed, 46 insertions, 10 deletions
diff --git a/src/mga_reg.h b/src/mga_reg.h index 874c4ed..93421d1 100644 --- a/src/mga_reg.h +++ b/src/mga_reg.h @@ -355,7 +355,6 @@ #define MGA1064_MUL_CTL_G16V16bits 0x06 #define MGA1064_MUL_CTL_32_24bits 0x07 -#define MGAGDAC_XVREFCTRL 0x18 #define MGA1064_PIX_CLK_CTL 0x1a #define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 ) #define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 ) @@ -365,8 +364,9 @@ #define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 ) #define MGA1064_GEN_CTL 0x1d +#define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS (0x01 << 5) #define MGA1064_MISC_CTL 0x1e -#define MGA1064_MISC_CTL_DAC_POW_DN ( 0x01 << 0 ) +#define MGA1064_MISC_CTL_DAC_EN ( 0x01 << 0 ) #define MGA1064_MISC_CTL_VGA ( 0x01 << 1 ) #define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 ) #define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 ) @@ -402,18 +402,35 @@ #define MGA1064_PIX_PLL_STAT 0x4f /*Added for G450 dual head*/ -/* Supported PLL*/ -#define __PIXEL_PLL 1 -#define __SYSTEM_PLL 2 -#define __VIDEO_PLL 3 #define MGA1064_VID_PLL_P 0x8D #define MGA1064_VID_PLL_M 0x8E #define MGA1064_VID_PLL_N 0x8F #define MGA1064_DISP_CTL 0x8a +#define MGA1064_DISP_CTL_DAC1OUTSEL_MASK 0x01 +#define MGA1064_DISP_CTL_DAC1OUTSEL_DIS 0x00 +#define MGA1064_DISP_CTL_DAC1OUTSEL_EN 0x01 +#define MGA1064_DISP_CTL_DAC2OUTSEL_MASK (0x03 << 2) +#define MGA1064_DISP_CTL_DAC2OUTSEL_DIS 0x00 +#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1 (0x01 << 2) +#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2 (0x02 << 2) +#define MGA1064_DISP_CTL_DAC2OUTSEL_TVE (0x03 << 2) +#define MGA1064_DISP_CTL_PANOUTSEL_MASK (0x03 << 5) +#define MGA1064_DISP_CTL_PANOUTSEL_DIS 0x00 +#define MGA1064_DISP_CTL_PANOUTSEL_CRTC1 (0x01 << 5) +#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB (0x02 << 5) +#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656 (0x03 << 5) + #define MGA1064_SYNC_CTL 0x8b + #define MGA1064_PWR_CTL 0xa0 +#define MGA1064_PWR_CTL_DAC2_EN (0x01 << 0) +#define MGA1064_PWR_CTL_VID_PLL_EN (0x01 << 1) +#define MGA1064_PWR_CTL_PANEL_EN (0x01 << 2) +#define MGA1064_PWR_CTL_RFIFO_EN (0x01 << 3) +#define MGA1064_PWR_CTL_CFIFO_EN (0x01 << 4) + #define MGA1064_PAN_CTL 0xa2 /* Using crtc2 */ @@ -428,6 +445,29 @@ #define MGAREG2_C2DATACTL 0x4c #define MGAREG_C2CTL 0x3c10 +#define MGAREG_C2CTL_C2_EN 0x01 + +#define MGAREG_C2_HIPRILVL_M (0x07 << 4) +#define MGAREG_C2_MAXHIPRI_M (0x07 << 8) + +#define MGAREG_C2CTL_PIXCLKSEL_MASK (0x03 << 1) +#define MGAREG_C2CTL_PIXCLKSELH_MASK (0x01 << 14) +#define MGAREG_C2CTL_PIXCLKSEL_PCICLK 0x00 +#define MGAREG_C2CTL_PIXCLKSEL_VDOCLK (0x01 << 1) +#define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL (0x02 << 1) +#define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL (0x03 << 1) +#define MGAREG_C2CTL_PIXCLKSEL_VDCLK (0x01 << 14) + +#define MGAREG_C2CTL_PIXCLKSEL_CRISTAL (0x01 << 1) | (0x01 << 14) +#define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL (0x02 << 1) | (0x01 << 14) + +#define MGAREG_C2CTL_PIXCLKDIS_MASK (0x01 << 3) +#define MGAREG_C2CTL_PIXCLKDIS_DISABLE (0x01 << 3) + +#define MGAREG_C2CTL_CRTCDACSEL_MASK (0x01 << 20) +#define MGAREG_C2CTL_CRTCDACSEL_CRTC1 0x00 +#define MGAREG_C2CTL_CRTCDACSEL_CRTC2 (0x01 << 20) + #define MGAREG_C2HPARAM 0x3c14 #define MGAREG_C2HSYNC 0x3c18 #define MGAREG_C2VPARAM 0x3c1c @@ -437,10 +477,6 @@ #define MGAREG_C2OFFSET 0x3c40 #define MGAREG_C2DATACTL 0x3c4c -#define MGA1064_DISP_CTL 0x8a -#define MGA1064_SYNC_CTL 0x8b -#define MGA1064_PWR_CTL 0xa0 - /* video register */ #define MGAREG_BESA1C3ORG 0x3d60 |