Jan. 2005 nv chipset update from Mark Vojkovich Bug #2380

    <https://bugs.freedesktop.org/show_bug.cgi?id=2380> Patch #1752
    <https://bugs.freedesktop.org/attachment.cgi?id=1752>

2 files changed, 69 insertions, 12 deletions

diff --git a/src/nv_driver.c b/src/nv_driver.c
index ba665bc..7ff68e4 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -1,3 +1,4 @@
+/* $XdotOrg: $ */
 /* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
 /*
  * Copyright 1996-1997  David J. McKay
@@ -24,7 +25,7 @@
 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
    <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.130 2004/12/09 00:21:04 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.131 2005/01/20 01:01:00 mvojkovi Exp $ */
 
 #include "nv_include.h"
 
@@ -85,25 +86,33 @@ DriverRec NV = {
 static SymTabRec NVKnownChipsets[] =
 {
   { 0x12D20018, "RIVA 128" },
+
   { 0x10DE0020, "RIVA TNT" },
+
   { 0x10DE0028, "RIVA TNT2" },
   { 0x10DE002A, "Unknown TNT2" },
   { 0x10DE002C, "Vanta" },
   { 0x10DE0029, "RIVA TNT2 Ultra" },
   { 0x10DE002D, "RIVA TNT2 Model 64" },
+
   { 0x10DE00A0, "Aladdin TNT2" },
+
   { 0x10DE0100, "GeForce 256" },
   { 0x10DE0101, "GeForce DDR" },
   { 0x10DE0103, "Quadro" },
+
   { 0x10DE0110, "GeForce2 MX/MX 400" },
   { 0x10DE0111, "GeForce2 MX 100/200" },
   { 0x10DE0112, "GeForce2 Go" },
   { 0x10DE0113, "Quadro2 MXR/EX/Go" },
+
   { 0x10DE01A0, "GeForce2 Integrated GPU" },
+
   { 0x10DE0150, "GeForce2 GTS" },
   { 0x10DE0151, "GeForce2 Ti" },
   { 0x10DE0152, "GeForce2 Ultra" },
   { 0x10DE0153, "Quadro2 Pro" },
+
   { 0x10DE0170, "GeForce4 MX 460" },
   { 0x10DE0171, "GeForce4 MX 440" },
   { 0x10DE0172, "GeForce4 MX 420" },
@@ -121,6 +130,7 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE017A, "Quadro4 NVS" },
   { 0x10DE017C, "Quadro4 500 GoGL" },
   { 0x10DE017D, "GeForce4 410 Go 16M" },
+
   { 0x10DE0181, "GeForce4 MX 440 with AGP8X" },
   { 0x10DE0182, "GeForce4 MX 440SE with AGP8X" },
   { 0x10DE0183, "GeForce4 MX 420 with AGP8X" },
@@ -135,11 +145,14 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE018B, "Quadro4 380 XGL" },
   { 0x10DE018C, "Quadro NVS 50 PCI" },
   { 0x10DE018D, "GeForce4 448 Go" },
+
   { 0x10DE01F0, "GeForce4 MX Integrated GPU" },
+
   { 0x10DE0200, "GeForce3" },
   { 0x10DE0201, "GeForce3 Ti 200" },
   { 0x10DE0202, "GeForce3 Ti 500" },
   { 0x10DE0203, "Quadro DCC" },
+
   { 0x10DE0250, "GeForce4 Ti 4600" },
   { 0x10DE0251, "GeForce4 Ti 4400" },
   { 0x10DE0252, "0x0252" },
@@ -147,6 +160,7 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE0258, "Quadro4 900 XGL" },
   { 0x10DE0259, "Quadro4 750 XGL" },
   { 0x10DE025B, "Quadro4 700 XGL" },
+
   { 0x10DE0280, "GeForce4 Ti 4800" },
   { 0x10DE0281, "GeForce4 Ti 4200 with AGP8X" },
   { 0x10DE0282, "GeForce4 Ti 4800 SE" },
@@ -154,10 +168,12 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE028C, "Quadro4 700 GoGL" },
   { 0x10DE0288, "Quadro4 980 XGL" },
   { 0x10DE0289, "Quadro4 780 XGL" },
+
   { 0x10DE0301, "GeForce FX 5800 Ultra" },
   { 0x10DE0302, "GeForce FX 5800" },
   { 0x10DE0308, "Quadro FX 2000" },
   { 0x10DE0309, "Quadro FX 1000" },
+
   { 0x10DE0311, "GeForce FX 5600 Ultra" },
   { 0x10DE0312, "GeForce FX 5600" },
   { 0x10DE0313, "0x0313"},
@@ -170,6 +186,7 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE031D, "0x031D" },
   { 0x10DE031E, "0x031E" },
   { 0x10DE031F, "0x031F" },
+
   { 0x10DE0320, "GeForce FX 5200" },
   { 0x10DE0321, "GeForce FX 5200 Ultra" },
   { 0x10DE0322, "GeForce FX 5200" },
@@ -189,6 +206,7 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE032C, "GeForce FX Go53xx Series" },
   { 0x10DE032D, "GeForce FX Go5100" },
   { 0x10DE032F, "0x032F" },
+
   { 0x10DE0330, "GeForce FX 5900 Ultra" },
   { 0x10DE0331, "GeForce FX 5900" },
   { 0x10DE0332, "GeForce FX 5900XT" },
@@ -196,6 +214,7 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE033F, "Quadro FX 700" },
   { 0x10DE0334, "GeForce FX 5900ZT" },
   { 0x10DE0338, "Quadro FX 3000" },
+
   { 0x10DE0341, "GeForce FX 5700 Ultra" },
   { 0x10DE0342, "GeForce FX 5700" },
   { 0x10DE0343, "GeForce FX 5700LE" },
@@ -208,6 +227,7 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE034C, "Quadro FX Go1000" },
   { 0x10DE034E, "Quadro FX 1100" },
   { 0x10DE034F, "0x034F" },
+
   { 0x10DE0040, "GeForce 6800 Ultra" },
   { 0x10DE0041, "GeForce 6800" },
   { 0x10DE0042, "GeForce 6800 LE" },
@@ -215,14 +235,16 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE0045, "GeForce 6800 GT" },
   { 0x10DE0049, "0x0049" },
   { 0x10DE004E, "Quadro FX 4000" },
-  { 0x10DE004D, "Quadro FX 4400" },
+
   { 0x10DE00C0, "0x00C0" },
-  { 0x10DE00C1, "0x00C1" },
+  { 0x10DE00C1, "GeForce 6800" },
   { 0x10DE00C2, "GeForce 6800 LE" },
-  { 0x10DE00C8, "0x00C8" },
-  { 0x10DE00C9, "0x00C9" },
-  { 0x10DE00CC, "0x00CC" },
-  { 0x10DE00CE, "0x00CE" },
+  { 0x10DE00C8, "GeForce Go 6800" },
+  { 0x10DE00C9, "GeForce Go 6800 Ultra" },
+  { 0x10DE00CC, "Quadro FX Go1400" },
+  { 0x10DE00CD, "0x00CD" },
+  { 0x10DE00CE, "Quadro FX 1400" },
+
   { 0x10DE0140, "GeForce 6600 GT" },
   { 0x10DE0141, "GeForce 6600" },
   { 0x10DE0142, "0x0142" },
@@ -238,12 +260,32 @@ static SymTabRec NVKnownChipsets[] =
   { 0x10DE014D, "0x014D" },
   { 0x10DE014E, "Quadro FX 540" },
   { 0x10DE014F, "GeForce 6200" },
+
   { 0x10DE0160, "0x0160" },
-  { 0x10DE0166, "0x0166" },
+  { 0x10DE0161, "GeForce 6200 TurboCache(TM)" },
+  { 0x10DE0162, "0x0162" },
+  { 0x10DE0163, "0x0163" },
+  { 0x10DE0164, "GeForce Go 6200" },
+  { 0x10DE0165, "0x0163" },
+  { 0x10DE0166, "GeForce Go 6250" },
+  { 0x10DE0167, "GeForce Go 6200" },
+  { 0x10DE0168, "GeForce Go 6250" },
+  { 0x10DE0169, "0x0169" },
+  { 0x10DE016B, "0x016B" },
+  { 0x10DE016C, "0x016C" },
+  { 0x10DE016D, "0x016D" },
+  { 0x10DE016E, "0x016E" },
+
   { 0x10DE0210, "0x0210" },
-  { 0x10DE0211, "0x0211" },
-  { 0x10DE021D, "0x021D" },
-  { 0x10DE021E, "0x021E" },
+  { 0x10DE0211, "GeForce 6800" },
+  { 0x10DE0212, "GeForce 6800 LE" },
+  { 0x10DE0215, "GeForce 6800 GT" },
+
+  { 0x10DE0220, "0x0220" },
+  { 0x10DE0221, "0x0221" },
+  { 0x10DE0222, "0x0222" },
+  { 0x10DE0228, "0x0228" },
+
   {-1, NULL}
 };
 
@@ -639,6 +681,8 @@ NVProbe(DriverPtr drv, int flags)
                case 0x01D0:
                case 0x0090:
                case 0x0210:
+               case 0x0220:
+               case 0x0230:
                    NVChipsets[numUsed].token = pciid;
                    NVChipsets[numUsed].name = "Unknown NVIDIA chip";
                    NVPciChipsets[numUsed].numChipset = pciid;
@@ -1327,6 +1371,8 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
     case 0x01D0:
     case 0x0090:
     case 0x0210:
+    case 0x0220:
+    case 0x0230:
          pNv->Architecture =  NV_ARCH_40;
          break;
     default:
diff --git a/src/nv_hw.c b/src/nv_hw.c
index 7499d97..88eca47 100644
--- a/src/nv_hw.c
+++ b/src/nv_hw.c
@@ -36,7 +36,7 @@
 |*     those rights set forth herein.                                        *|
 |*                                                                           *|
  \***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.13 2004/12/09 00:21:04 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.14 2005/01/20 01:01:00 mvojkovi Exp $ */
 
 #include "nv_local.h"
 #include "compiler.h"
@@ -1173,6 +1173,7 @@ void NVLoadStateExt (
 
               switch(pNv->Chipset & 0xfff0) {
               case 0x0040:
+              case 0x0210:
                  pNv->PGRAPH[0x09b8/4] = 0x0078e366;
                  pNv->PGRAPH[0x09bc/4] = 0x0000014c;
                  pNv->PFB[0x033C/4] &= 0xffff7fff;
@@ -1182,6 +1183,7 @@ void NVLoadStateExt (
                  pNv->PGRAPH[0x082C/4] = 0x00000108;
                  break;
               case 0x0160:
+              case 0x01D0:
                  pNv->PMC[0x1700/4] = pNv->PFB[0x020C/4];
                  pNv->PMC[0x1704/4] = 0;
                  pNv->PMC[0x1708/4] = 0;
@@ -1194,6 +1196,15 @@ void NVLoadStateExt (
                  pNv->PGRAPH[0x0828/4] = 0x0072cb77;
                  pNv->PGRAPH[0x082C/4] = 0x00000108;
                  break;
+              case 0x0220:
+              case 0x0230:
+                 pNv->PGRAPH[0x0860/4] = 0;
+                 pNv->PGRAPH[0x0864/4] = 0;
+                 pNv->PRAMDAC[0x0608/4] |= 0x00100000;
+                 break;
+              case 0x0090:
+                 pNv->PRAMDAC[0x0608/4] |= 0x00100000;
+                 break;
               default:
                  break;
               };