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authorAaron Plattner <aplattner@nvidia.com>2008-01-24 18:47:52 -0800
committerAaron Plattner <aplattner@nvidia.com>2008-01-24 18:52:41 -0800
commit7d41b4ed1be49bbd6453d9f23b0adb5d8fd2d974 (patch)
tree27d92da371454de8c2b74577af96b3353dfbb962 /src/g80_display.c
parentf9f6460c1d461e9236cf8560964047d81b0899e9 (diff)
G80: Reduce load detection false positives.
(cherry picked from commit d483ecd851bb84014f1fa86f0ada4540b3ad801e) Conflicts: src/g80_dac.c
Diffstat (limited to 'src/g80_display.c')
-rw-r--r--src/g80_display.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/g80_display.c b/src/g80_display.c
index c33f2dd..45dadbf 100644
--- a/src/g80_display.c
+++ b/src/g80_display.c
@@ -36,6 +36,7 @@
#define DPMS_SERVER
#include <X11/extensions/dpms.h>
+#include <xf86_OSproc.h>
/*
* PLL calculation. pclk is in kHz.
@@ -193,6 +194,7 @@ Bool G80DispDetectLoad(ScrnInfoPtr pScrn, ORNum or)
{
G80Ptr pNv = G80PTR(pScrn);
const int dacOff = 2048 * or;
+ int sigstate;
CARD32 load, tmp;
pNv->reg[(0x0061A010+dacOff)/4] = 0x00000001;
@@ -200,7 +202,9 @@ Bool G80DispDetectLoad(ScrnInfoPtr pScrn, ORNum or)
while(pNv->reg[(0x0061A004+dacOff)/4] & 0x80000000);
tmp = pNv->architecture == 0x50 ? 420 : 340;
pNv->reg[(0x0061A00C+dacOff)/4] = tmp | 0x100000;
- usleep(4500);
+ sigstate = xf86BlockSIGIO();
+ usleep(45000);
+ xf86UnblockSIGIO(sigstate);
load = pNv->reg[(0x0061A00C+dacOff)/4];
pNv->reg[(0x0061A00C+dacOff)/4] = 0;
pNv->reg[(0x0061A004+dacOff)/4] = 0x80550000;