diff options
| author | Aaron Plattner <aplattner@nvidia.com> | 2007-06-04 22:38:14 -0700 |
|---|---|---|
| committer | Aaron Plattner <aplattner@nvidia.com> | 2007-06-05 17:01:46 -0700 |
| commit | 70b304cd0df0af515ce8414559f28a7ca7825517 (patch) | |
| tree | 7fa9c253d1425026eec1fc412e1a78dfa3645333 /src/g80_sor.c | |
| parent | 402b1d1526f0dacd2e3a2564cc89958c32d3100e (diff) | |
G80: Rearrange HW video timing computations.
Compute the HW parameters in G80CrtcModeFixup and stash them in adjusted_mode.
Move some register writes into G80CreateSor.
Diffstat (limited to 'src/g80_sor.c')
| -rw-r--r-- | src/g80_sor.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/g80_sor.c b/src/g80_sor.c index 90119f0..ea7e015 100644 --- a/src/g80_sor.c +++ b/src/g80_sor.c @@ -129,13 +129,20 @@ static const xf86OutputFuncsRec G80SorOutputFuncs = { xf86OutputPtr G80CreateSor(ScrnInfoPtr pScrn, ORNum or) { + G80Ptr pNv = G80PTR(pScrn); G80OutputPrivPtr pPriv = xnfcalloc(sizeof(*pPriv), 1); + const int off = 0x800 * or; xf86OutputPtr output; char orName[5]; if(!pPriv) return FALSE; + pNv->reg[(0x61C00C+off)/4] = 0x03010700; + pNv->reg[(0x61C010+off)/4] = 0x0000152f; + pNv->reg[(0x61C014+off)/4] = 0x00000000; + pNv->reg[(0x61C018+off)/4] = 0x00245af8; + snprintf(orName, 5, "DVI%i", or); output = xf86OutputCreate(pScrn, &G80SorOutputFuncs, orName); |