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authorAaron Plattner <aplattner@nvidia.com>2006-01-23 00:04:41 +0000
committerAaron Plattner <aplattner@nvidia.com>2006-01-23 00:04:41 +0000
commit5064f8a903923ca4b819bdf345f8f4c9254bdf3b (patch)
treeca6b5b7c09b0d396858bc989e7c2e0d3ea6ad5d5 /src/nv_hw.c
parente8fd45625f2e09830136bde6bc70d51f25892450 (diff)
New chip support from Mark Vojkovich's 2006-01-20 and 2006-01-21 XFree86
CVS updates.
Diffstat (limited to 'src/nv_hw.c')
-rw-r--r--src/nv_hw.c36
1 files changed, 26 insertions, 10 deletions
diff --git a/src/nv_hw.c b/src/nv_hw.c
index 4fcdc79..dd4a8f8 100644
--- a/src/nv_hw.c
+++ b/src/nv_hw.c
@@ -36,7 +36,7 @@
|* those rights set forth herein. *|
|* *|
\***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.17 2005/09/22 20:34:42 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.20 2006/01/21 01:17:59 mvojkovi Exp $ */
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -144,16 +144,23 @@ static void nvGetClocks(NVPtr pNv, unsigned int *MClk, unsigned int *NVClk)
if(pNv->Architecture >= NV_ARCH_40) {
pll = pNv->PMC[0x4020/4];
- P = (pll >> 16) & 0x03;
+ P = (pll >> 16) & 0x07;
pll = pNv->PMC[0x4024/4];
M = pll & 0xFF;
N = (pll >> 8) & 0xFF;
- MB = (pll >> 16) & 0xFF;
- NB = (pll >> 24) & 0xFF;
+ if(((pNv->Chipset & 0xfff0) == 0x0290) ||
+ ((pNv->Chipset & 0xfff0) == 0x0390))
+ {
+ MB = 1;
+ NB = 1;
+ } else {
+ MB = (pll >> 16) & 0xFF;
+ NB = (pll >> 24) & 0xFF;
+ }
*MClk = ((N * NB * pNv->CrystalFreqKHz) / (M * MB)) >> P;
pll = pNv->PMC[0x4000/4];
- P = (pll >> 16) & 0x03;
+ P = (pll >> 16) & 0x07;
pll = pNv->PMC[0x4004/4];
M = pll & 0xFF;
N = (pll >> 8) & 0xFF;
@@ -875,6 +882,10 @@ void NVCalcStateExt (
case NV_ARCH_20:
case NV_ARCH_30:
default:
+ if((pNv->Chipset & 0xfff0) == 0x0240) {
+ state->arbitration0 = 256;
+ state->arbitration1 = 0x0480;
+ } else
if(((pNv->Chipset & 0xffff) == 0x01A0) ||
((pNv->Chipset & 0xffff) == 0x01f0))
{
@@ -945,7 +956,8 @@ void NVLoadStateExt (
if(((pNv->Chipset & 0xfff0) == 0x0090) ||
((pNv->Chipset & 0xfff0) == 0x01D0) ||
- ((pNv->Chipset & 0xfff0) == 0x0290))
+ ((pNv->Chipset & 0xfff0) == 0x0290) ||
+ ((pNv->Chipset & 0xfff0) == 0x0390))
{
regions = 15;
}
@@ -1200,6 +1212,7 @@ void NVLoadStateExt (
break;
case 0x0160:
case 0x01D0:
+ case 0x0240:
pNv->PMC[0x1700/4] = pNv->PFB[0x020C/4];
pNv->PMC[0x1704/4] = 0;
pNv->PMC[0x1708/4] = 0;
@@ -1213,13 +1226,13 @@ void NVLoadStateExt (
pNv->PGRAPH[0x082C/4] = 0x00000108;
break;
case 0x0220:
- case 0x0230:
pNv->PGRAPH[0x0860/4] = 0;
pNv->PGRAPH[0x0864/4] = 0;
pNv->PRAMDAC[0x0608/4] |= 0x00100000;
break;
case 0x0090:
case 0x0290:
+ case 0x0390:
pNv->PRAMDAC[0x0608/4] |= 0x00100000;
pNv->PGRAPH[0x0828/4] = 0x07830610;
pNv->PGRAPH[0x082C/4] = 0x0000016A;
@@ -1277,7 +1290,8 @@ void NVLoadStateExt (
} else {
if(((pNv->Chipset & 0xfff0) == 0x0090) ||
((pNv->Chipset & 0xfff0) == 0x01D0) ||
- ((pNv->Chipset & 0xfff0) == 0x0290))
+ ((pNv->Chipset & 0xfff0) == 0x0290) ||
+ ((pNv->Chipset & 0xfff0) == 0x0390))
{
for(i = 0; i < 60; i++) {
pNv->PGRAPH[(0x0D00/4) + i] = pNv->PFB[(0x0600/4) + i];
@@ -1287,7 +1301,8 @@ void NVLoadStateExt (
for(i = 0; i < 48; i++) {
pNv->PGRAPH[(0x0900/4) + i] = pNv->PFB[(0x0600/4) + i];
if(((pNv->Chipset & 0xfff0) != 0x0160) &&
- ((pNv->Chipset & 0xfff0) != 0x0220))
+ ((pNv->Chipset & 0xfff0) != 0x0220) &&
+ ((pNv->Chipset & 0xfff0) != 0x0240))
{
pNv->PGRAPH[(0x6900/4) + i] = pNv->PFB[(0x0600/4) + i];
}
@@ -1309,7 +1324,8 @@ void NVLoadStateExt (
} else {
if(((pNv->Chipset & 0xfff0) == 0x0090) ||
((pNv->Chipset & 0xfff0) == 0x01D0) ||
- ((pNv->Chipset & 0xfff0) == 0x0290))
+ ((pNv->Chipset & 0xfff0) == 0x0290) ||
+ ((pNv->Chipset & 0xfff0) == 0x0390))
{
pNv->PGRAPH[0x0DF0/4] = pNv->PFB[0x0200/4];
pNv->PGRAPH[0x0DF4/4] = pNv->PFB[0x0204/4];