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authorKaleb Keithley <kaleb@freedesktop.org>2003-11-26 22:48:59 +0000
committerKaleb Keithley <kaleb@freedesktop.org>2003-11-26 22:48:59 +0000
commitb56dd6bacff59e17249b5a1427f99edf93657f30 (patch)
tree35b54cb736b90c40f13185173092c178038b7e8c /src
parent6962e55a393c6b1cddf6b23f9c39842234b4ef7d (diff)
merge latest (4.3.99.16) from XFree86 (vendor) branch
Diffstat (limited to 'src')
-rw-r--r--src/nv_const.h10
-rw-r--r--src/nv_cursor.c82
-rw-r--r--src/nv_dac.c211
-rw-r--r--src/nv_dga.c16
-rw-r--r--src/nv_driver.c664
-rw-r--r--src/nv_local.h43
-rw-r--r--src/nv_proto.h60
-rw-r--r--src/nv_setup.c815
-rw-r--r--src/nv_type.h149
-rw-r--r--src/nv_video.c641
-rw-r--r--src/nv_xaa.c976
-rw-r--r--src/riva_hw.c1251
-rw-r--r--src/riva_hw.h64
-rw-r--r--src/riva_tbl.h574
14 files changed, 2166 insertions, 3390 deletions
diff --git a/src/nv_const.h b/src/nv_const.h
index 14ba134..f4ab437 100644
--- a/src/nv_const.h
+++ b/src/nv_const.h
@@ -1,20 +1,14 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_const.h,v 1.6 2001/12/07 00:09:55 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_const.h,v 1.7 2003/07/31 20:24:29 mvojkovi Exp $ */
#ifndef __NV_CONST_H__
#define __NV_CONST_H__
-#define VERSION 4000
+#define NV_VERSION 4000
#define NV_NAME "NV"
#define NV_DRIVER_NAME "nv"
#define NV_MAJOR_VERSION 1
#define NV_MINOR_VERSION 0
#define NV_PATCHLEVEL 1
-#ifdef DEBUG_PRINT
-#define DEBUG(x) x
-#else
-#define DEBUG(x)
-#endif
-
#endif /* __NV_CONST_H__ */
diff --git a/src/nv_cursor.c b/src/nv_cursor.c
index 04107ee..85ac42a 100644
--- a/src/nv_cursor.c
+++ b/src/nv_cursor.c
@@ -1,30 +1,43 @@
-/* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
-/*
- * Copyright 1996-1997 David J. McKay
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/* Rewritten with reference from mga driver and 3.3.4 NVIDIA driver by
- Jarno Paananen <jpaana@s2.org> */
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c,v 1.11 2002/11/26 23:41:58 mvojkovi Exp $ */
+ /***************************************************************************\
+|* *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
+|* *|
+|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
+|* international laws. Users and possessors of this source code are *|
+|* hereby granted a nonexclusive, royalty-free copyright license to *|
+|* use this code in individual and commercial software. *|
+|* *|
+|* Any use of this source code must include, in the user documenta- *|
+|* tion and internal comments to the code, notices to the end user *|
+|* as follows: *|
+|* *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
+|* *|
+|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
+|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
+|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
+|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
+|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
+|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
+|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
+|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
+|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
+|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
+|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
+|* *|
+|* U.S. Government End Users. This source code is a "commercial *|
+|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
+|* consisting of "commercial computer software" and "commercial *|
+|* computer software documentation," as such terms are used in *|
+|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
+|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
+|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
+|* all U.S. Government End Users acquire the source code with only *|
+|* those rights set forth herein. *|
+|* *|
+ \***************************************************************************/
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_cursor.c,v 1.12 2003/07/31 20:24:29 mvojkovi Exp $ */
#include "nv_include.h"
@@ -129,7 +142,7 @@ TransformCursor (NVPtr pNv)
}
for(i = 0; i < dwords; i++)
- pNv->riva.CURSOR[i] = tmp[i];
+ pNv->CURSOR[i] = tmp[i];
DEALLOCATE_LOCAL(tmp);
}
@@ -150,7 +163,7 @@ NVSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
{
NVPtr pNv = NVPTR(pScrn);
- pNv->riva.PRAMDAC[0x0000300/4] = (x & 0xFFFF) | (y << 16);
+ pNv->PRAMDAC[0x0000300/4] = (x & 0xFFFF) | (y << 16);
}
static void
@@ -193,7 +206,7 @@ NVShowCursor(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
/* Enable cursor - X-Windows mode */
- pNv->riva.ShowHideCursor(&pNv->riva, 1);
+ NVShowHideCursor(pNv, 1);
}
static void
@@ -201,7 +214,7 @@ NVHideCursor(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
/* Disable cursor */
- pNv->riva.ShowHideCursor(&pNv->riva, 0);
+ NVShowHideCursor(pNv, 0);
}
static Bool
@@ -225,7 +238,7 @@ NVLoadCursorARGB(ScrnInfoPtr pScrn, CursorPtr pCurs)
{
NVPtr pNv = NVPTR(pScrn);
CARD32 *image = pCurs->bits->argb;
- CARD32 *dst = (CARD32*)pNv->riva.CURSOR;
+ CARD32 *dst = (CARD32*)pNv->CURSOR;
int x, y, w, h;
w = pCurs->bits->width;
@@ -266,8 +279,6 @@ NVCursorInit(ScreenPtr pScreen)
NVPtr pNv = NVPTR(pScrn);
xf86CursorInfoPtr infoPtr;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVCursorInit\n"));
-
infoPtr = xf86CreateCursorInfoRec();
if(!infoPtr) return FALSE;
@@ -289,8 +300,7 @@ NVCursorInit(ScreenPtr pScreen)
#ifdef ARGB_CURSOR
if(pNv->alphaCursor &&
- (((pNv->Chipset & 0x0ff0) != 0x0110) ||
- !(pNv->riva.flatPanel & FP_DITHER)))
+ (((pNv->Chipset & 0x0ff0) != 0x0110) || !pNv->FPDither))
{
infoPtr->UseHWCursorARGB = NVUseHWCursorARGB;
infoPtr->LoadCursorARGB = NVLoadCursorARGB;
diff --git a/src/nv_dac.c b/src/nv_dac.c
index 90d75da..c1e093e 100644
--- a/src/nv_dac.c
+++ b/src/nv_dac.c
@@ -1,30 +1,43 @@
-/* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
-/*
- * Copyright 1996-1997 David J. McKay
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
- <jpaana@s2.org> */
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c,v 1.31 2003/01/02 20:44:56 mvojkovi Exp $ */
+ /***************************************************************************\
+|* *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
+|* *|
+|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
+|* international laws. Users and possessors of this source code are *|
+|* hereby granted a nonexclusive, royalty-free copyright license to *|
+|* use this code in individual and commercial software. *|
+|* *|
+|* Any use of this source code must include, in the user documenta- *|
+|* tion and internal comments to the code, notices to the end user *|
+|* as follows: *|
+|* *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
+|* *|
+|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
+|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
+|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
+|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
+|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
+|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
+|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
+|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
+|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
+|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
+|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
+|* *|
+|* U.S. Government End Users. This source code is a "commercial *|
+|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
+|* consisting of "commercial computer software" and "commercial *|
+|* computer software documentation," as such terms are used in *|
+|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
+|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
+|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
+|* all U.S. Government End Users acquire the source code with only *|
+|* those rights set forth herein. *|
+|* *|
+ \***************************************************************************/
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dac.c,v 1.37 2003/09/08 20:00:27 mvojkovi Exp $ */
#include "nv_include.h"
@@ -51,8 +64,6 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
NVFBLayout *pLayout = &pNv->CurrentLayout;
vgaRegPtr pVga;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVDACInit\n"));
-
/*
* This will initialize all of the generic VGA registers.
*/
@@ -72,7 +83,7 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
vertStart = vertTotal - 3;
vertEnd = vertTotal - 2;
vertBlankStart = vertStart;
- horizStart = horizTotal - 3;
+ horizStart = horizTotal - 5;
horizEnd = horizTotal - 2;
horizBlankEnd = horizTotal + 4;
}
@@ -106,6 +117,9 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
pVga->Attribute[0x10] = 0x01;
+ if(pNv->Television)
+ pVga->Attribute[0x11] = 0x00;
+
nvReg->screen = SetBitField(horizBlankEnd,6:6,4:4)
| SetBitField(vertBlankStart,10:10,3:3)
| SetBitField(vertStart,10:10,2:2)
@@ -152,37 +166,49 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
i = pLayout->depth;
else i = 32;
- if(pNv->riva.Architecture >= NV_ARCH_10)
- pNv->riva.CURSOR = (U032 *)(pNv->FbStart + pNv->riva.CursorStart);
+ if(pNv->Architecture >= NV_ARCH_10)
+ pNv->CURSOR = (U032 *)(pNv->FbStart + pNv->CursorStart);
- pNv->riva.LockUnlock(&pNv->riva, 0);
+ NVCalcStateExt(pNv,
+ nvReg,
+ i,
+ pLayout->displayWidth,
+ mode->CrtcHDisplay,
+ pScrn->virtualY,
+ mode->Clock,
+ mode->Flags);
- pNv->riva.CalcStateExt(&pNv->riva,
- nvReg,
- i,
- pLayout->displayWidth,
- mode->CrtcHDisplay,
- pScrn->virtualY,
- mode->Clock,
- mode->Flags);
-
- nvReg->scale = pNv->riva.PRAMDAC[0x00000848/4] & 0xfff000ff;
+ nvReg->scale = pNv->PRAMDAC[0x00000848/4] & 0xfff000ff;
if(pNv->FlatPanel == 1) {
nvReg->pixel |= (1 << 7);
- nvReg->scale |= (1 << 8) ;
+ if(!pNv->fpScaler || (pNv->fpWidth <= mode->HDisplay)
+ || (pNv->fpHeight <= mode->VDisplay))
+ {
+ nvReg->scale |= (1 << 8) ;
+ }
}
- if(pNv->SecondCRTC) {
- nvReg->head = pNv->riva.PCRTC0[0x00000860/4] & ~0x00001000;
- nvReg->head2 = pNv->riva.PCRTC0[0x00002860/4] | 0x00001000;
+
+ nvReg->vpll = nvReg->pll;
+ nvReg->vpll2 = nvReg->pll;
+ nvReg->vpllB = nvReg->pllB;
+ nvReg->vpll2B = nvReg->pllB;
+
+ if(pNv->CRTCnumber) {
+ nvReg->head = pNv->PCRTC0[0x00000860/4] & ~0x00001000;
+ nvReg->head2 = pNv->PCRTC0[0x00002860/4] | 0x00001000;
nvReg->crtcOwner = 3;
nvReg->pllsel |= 0x20000800;
- nvReg->vpll2 = nvReg->vpll;
+ nvReg->vpll = pNv->PRAMDAC0[0x0508/4];
+ if(pNv->twoStagePLL)
+ nvReg->vpllB = pNv->PRAMDAC0[0x0578/4];
} else
- if(pNv->riva.twoHeads) {
- nvReg->head = pNv->riva.PCRTC0[0x00000860/4] | 0x00001000;
- nvReg->head2 = pNv->riva.PCRTC0[0x00002860/4] & ~0x00001000;
+ if(pNv->twoHeads) {
+ nvReg->head = pNv->PCRTC0[0x00000860/4] | 0x00001000;
+ nvReg->head2 = pNv->PCRTC0[0x00002860/4] & ~0x00001000;
nvReg->crtcOwner = 0;
- nvReg->vpll2 = pNv->riva.PRAMDAC0[0x00000520/4];
+ nvReg->vpll2 = pNv->PRAMDAC0[0x0520/4];
+ if(pNv->twoStagePLL)
+ nvReg->vpll2B = pNv->PRAMDAC0[0x057C/4];
}
nvReg->cursorConfig = 0x00000100;
@@ -193,16 +219,16 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
nvReg->general |= (1 << 29);
if((pNv->Chipset & 0x0ff0) == 0x0110) {
- nvReg->dither = pNv->riva.PRAMDAC[0x0528/4] & ~0x00010000;
- if(pNv->riva.flatPanel & FP_DITHER)
+ nvReg->dither = pNv->PRAMDAC[0x0528/4] & ~0x00010000;
+ if(pNv->FPDither)
nvReg->dither |= 0x00010000;
else
nvReg->cursorConfig |= (1 << 28);
} else
- if((pNv->riva.Chipset & 0x0ff0) >= 0x0170) {
- nvReg->dither = pNv->riva.PRAMDAC[0x083C/4] & ~1;
+ if((pNv->Chipset & 0x0ff0) >= 0x0170) {
+ nvReg->dither = pNv->PRAMDAC[0x083C/4] & ~1;
nvReg->cursorConfig |= (1 << 28);
- if(pNv->riva.flatPanel & FP_DITHER)
+ if(pNv->FPDither)
nvReg->dither |= 1;
} else {
nvReg->cursorConfig |= (1 << 28);
@@ -210,9 +236,6 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
} else
nvReg->cursorConfig |= 0x02000000;
- nvReg->vpllB = 0;
- nvReg->vpll2B = 0;
-
return (TRUE);
}
@@ -223,12 +246,10 @@ NVDACRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, NVRegPtr nvReg,
NVPtr pNv = NVPTR(pScrn);
int restore = VGA_SR_MODE;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVDACRestore\n"));
-
if(primary) restore |= VGA_SR_CMAP | VGA_SR_FONTS;
else if((pNv->Chipset & 0xffff) == 0x0018)
restore |= VGA_SR_CMAP;
- pNv->riva.LoadStateExt(&pNv->riva, nvReg);
+ NVLoadStateExt(pNv, nvReg);
#if defined(__powerpc__)
restore &= ~VGA_SR_FONTS;
#endif
@@ -245,16 +266,18 @@ NVDACSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, NVRegPtr nvReg,
Bool saveFonts)
{
NVPtr pNv = NVPTR(pScrn);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVDACSave\n"));
#if defined(__powerpc__)
saveFonts = FALSE;
#endif
+ NVLockUnlock(pNv, 0);
+
vgaHWSave(pScrn, vgaReg, VGA_SR_CMAP | VGA_SR_MODE |
(saveFonts? VGA_SR_FONTS : 0));
- pNv->riva.UnloadStateExt(&pNv->riva, nvReg);
+ NVUnloadStateExt(pNv, nvReg);
+ /* can't read this reliably on NV11 */
if((pNv->Chipset & 0x0ff0) == 0x0110)
nvReg->crtcOwner = ((pNv->Chipset & 0x0fff) == 0x0112) ? 3 : 0;
}
@@ -272,12 +295,6 @@ NVDACLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors,
pVga = &VGAHWPTR(pScrn)->ModeReg;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVDACLoadPalette\n"));
-
- if((pNv->riva.Architecture == NV_ARCH_03) &&
- (pNv->CurrentLayout.depth != 8))
- return;
-
switch(pNv->CurrentLayout.depth) {
case 15:
for(i = 0; i < numColors; i++) {
@@ -318,24 +335,6 @@ NVDACLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors,
#define DDC_SDA_WRITE_MASK (1 << 4)
#define DDC_SCL_WRITE_MASK (1 << 5)
-static unsigned int
-NV_ddc1Read(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- unsigned char val;
-
- /* wait for Vsync */
- while(VGA_RD08(pNv->riva.PCIO, 0x3da) & 0x08);
- while(!(VGA_RD08(pNv->riva.PCIO, 0x3da) & 0x08));
-
- /* Get the result */
- VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase);
- val = VGA_RD08(pNv->riva.PCIO, 0x3d5);
- DEBUG(ErrorF("NV_ddc1Read(%p,...) returns %d\n",
- pScrn, val));
- return (val & DDC_SDA_READ_MASK) != 0;
-}
-
static void
NV_I2CGetBits(I2CBusPtr b, int *clock, int *data)
{
@@ -343,13 +342,11 @@ NV_I2CGetBits(I2CBusPtr b, int *clock, int *data)
unsigned char val;
/* Get the result. */
- VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase);
- val = VGA_RD08(pNv->riva.PCIO, 0x3d5);
+ VGA_WR08(pNv->PCIO, 0x3d4, pNv->DDCBase);
+ val = VGA_RD08(pNv->PCIO, 0x3d5);
*clock = (val & DDC_SCL_READ_MASK) != 0;
*data = (val & DDC_SDA_READ_MASK) != 0;
- DEBUG(ErrorF("NV_I2CGetBits(%p,...) val=0x%x, returns clock %d, data %d\n",
- b, val, *clock, *data));
}
static void
@@ -358,8 +355,8 @@ NV_I2CPutBits(I2CBusPtr b, int clock, int data)
NVPtr pNv = NVPTR(xf86Screens[b->scrnIndex]);
unsigned char val;
- VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase + 1);
- val = VGA_RD08(pNv->riva.PCIO, 0x3d5) & 0xf0;
+ VGA_WR08(pNv->PCIO, 0x3d4, pNv->DDCBase + 1);
+ val = VGA_RD08(pNv->PCIO, 0x3d5) & 0xf0;
if (clock)
val |= DDC_SCL_WRITE_MASK;
else
@@ -370,14 +367,12 @@ NV_I2CPutBits(I2CBusPtr b, int clock, int data)
else
val &= ~DDC_SDA_WRITE_MASK;
- VGA_WR08(pNv->riva.PCIO, 0x3d4, pNv->DDCBase + 1);
- VGA_WR08(pNv->riva.PCIO, 0x3d5, val | 0x1);
-
- DEBUG(ErrorF("NV_I2CPutBits(%p, %d, %d) val=0x%x\n", b, clock, data, val));
+ VGA_WR08(pNv->PCIO, 0x3d4, pNv->DDCBase + 1);
+ VGA_WR08(pNv->PCIO, 0x3d5, val | 0x1);
}
-static Bool
-NV_i2cInit(ScrnInfoPtr pScrn)
+Bool
+NVDACi2cInit(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
I2CBusPtr I2CPtr;
@@ -399,17 +394,3 @@ NV_i2cInit(ScrnInfoPtr pScrn)
return TRUE;
}
-/*
- * NVRamdacInit
- */
-void
-NVRamdacInit(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVRamdacInit\n"));
- pNv->ddc1Read = NV_ddc1Read;
- /* vgaHWddc1SetSpeed will only work if the card is in VGA mode */
- pNv->DDC1SetSpeed = vgaHWddc1SetSpeed;
- pNv->i2cInit = NV_i2cInit;
-}
-
diff --git a/src/nv_dga.c b/src/nv_dga.c
index 714467a..d4bf3ff 100644
--- a/src/nv_dga.c
+++ b/src/nv_dga.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dga.c,v 1.11 2002/01/25 21:56:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_dga.c,v 1.12 2003/07/31 20:24:29 mvojkovi Exp $ */
#include "nv_local.h"
#include "nv_include.h"
@@ -62,7 +62,7 @@ SECOND_PASS:
size = pitch * Bpp * pMode->VDisplay;
if((!secondPitch || (pitch != secondPitch)) &&
- (size <= pNv->FbUsableSize)) {
+ (size <= pNv->ScratchBufferStart)) {
if(secondPitch)
pitch = secondPitch;
@@ -100,7 +100,8 @@ SECOND_PASS:
mode->address = pNv->FbStart;
mode->bytesPerScanline = pitch * Bpp;
mode->imageWidth = pitch;
- mode->imageHeight = pNv->FbUsableSize / mode->bytesPerScanline;
+ mode->imageHeight = pNv->ScratchBufferStart /
+ mode->bytesPerScanline;
mode->pixmapWidth = mode->imageWidth;
mode->pixmapHeight = mode->imageHeight;
mode->maxViewportX = mode->imageWidth - mode->viewportWidth;
@@ -143,8 +144,7 @@ NVDGAInit(ScreenPtr pScreen)
0x7c00, 0x03e0, 0x001f, TrueColor);
/* 16 */
- if(pNv->riva.Architecture != 3)
- modes = NVSetupDGAMode (pScrn, modes, &num, 16, 16,
+ modes = NVSetupDGAMode (pScrn, modes, &num, 16, 16,
(pScrn->bitsPerPixel == 16),
(pScrn->depth != 16) ? 0 : pScrn->displayWidth,
0xf800, 0x07e0, 0x001f, TrueColor);
@@ -234,8 +234,8 @@ NV_SetViewport(
NVAdjustFrame(pScrn->pScreen->myNum, x, y, flags);
- while(VGA_RD08(pNv->riva.PCIO, 0x3da) & 0x08);
- while(!(VGA_RD08(pNv->riva.PCIO, 0x3da) & 0x08));
+ while(VGA_RD08(pNv->PCIO, 0x3da) & 0x08);
+ while(!(VGA_RD08(pNv->PCIO, 0x3da) & 0x08));
pNv->DGAViewportStatus = 0;
}
@@ -287,7 +287,7 @@ NV_BlitTransRect(
int dstx, int dsty,
unsigned long color
){
- /* not implemented... yet */
+ /* not implemented */
}
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 92d4599..c8c2278 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -24,12 +24,15 @@
/* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
<jpaana@s2.org> */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.101 2003/02/10 23:42:51 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.119 2003/11/07 23:56:28 mvojkovi Exp $ */
#include "nv_include.h"
#include "xf86int10.h"
+const OptionInfoRec * RivaAvailableOptions(int chipid, int busid);
+Bool RivaGetScrnInfoRec(PciChipsets *chips, int chip);
+
/*
* Forward definitions for the functions that make up the driver.
*/
@@ -48,8 +51,8 @@ static Bool NVSaveScreen(ScreenPtr pScreen, int mode);
/* Optional functions */
static void NVFreeScreen(int scrnIndex, int flags);
-static int NVValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose,
- int flags);
+static ModeStatus NVValidMode(int scrnIndex, DisplayModePtr mode,
+ Bool verbose, int flags);
/* Internally used functions */
@@ -70,7 +73,7 @@ static Bool NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
*/
DriverRec NV = {
- VERSION,
+ NV_VERSION,
NV_DRIVER_NAME,
NVIdentify,
NVProbe,
@@ -84,6 +87,7 @@ static SymTabRec NVKnownChipsets[] =
{ 0x12D20018, "RIVA 128" },
{ 0x10DE0020, "RIVA TNT" },
{ 0x10DE0028, "RIVA TNT2" },
+ { 0x10DE002A, "Unknown TNT2" },
{ 0x10DE002C, "Vanta" },
{ 0x10DE0029, "RIVA TNT2 Ultra" },
{ 0x10DE002D, "RIVA TNT2 Model 64" },
@@ -108,7 +112,11 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE0175, "GeForce4 420 Go" },
{ 0x10DE0176, "GeForce4 420 Go 32M" },
{ 0x10DE0177, "GeForce4 460 Go" },
+#if defined(__powerpc__)
+ { 0x10DE0179, "GeForce4 MX (Mac)" },
+#else
{ 0x10DE0179, "GeForce4 440 Go 64M" },
+#endif
{ 0x10DE017D, "GeForce4 410 Go 16M" },
{ 0x10DE017C, "Quadro4 500 GoGL" },
{ 0x10DE0178, "Quadro4 550 XGL" },
@@ -119,6 +127,9 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE0186, "GeForce4 448 Go" },
{ 0x10DE0187, "GeForce4 488 Go" },
{ 0x10DE0188, "Quadro4 580 XGL" },
+#if defined(__powerpc__)
+ { 0x10DE0189, "GeForce4 MX with AGP8X (Mac)" },
+#endif
{ 0x10DE018A, "Quadro4 280 NVS" },
{ 0x10DE018B, "Quadro4 380 XGL" },
{ 0x10DE01F0, "GeForce4 MX Integrated GPU" },
@@ -140,30 +151,54 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE028C, "Quadro4 700 GoGL" },
{ 0x10DE0288, "Quadro4 980 XGL" },
{ 0x10DE0289, "Quadro4 780 XGL" },
- { 0x10DE0300, "0x0300" },
{ 0x10DE0301, "GeForce FX 5800 Ultra" },
{ 0x10DE0302, "GeForce FX 5800" },
{ 0x10DE0308, "Quadro FX 2000" },
{ 0x10DE0309, "Quadro FX 1000" },
- { 0x10DE0311, "0x0311" },
- { 0x10DE0312, "0x0312" },
+ { 0x10DE0311, "GeForce FX 5600 Ultra" },
+ { 0x10DE0312, "GeForce FX 5600" },
+ { 0x10DE0313, "0x0313"},
+ { 0x10DE0314, "GeForce FX 5600SE" },
{ 0x10DE0316, "0x0316" },
{ 0x10DE0317, "0x0317" },
- { 0x10DE0318, "0x0318" },
- { 0x10DE0319, "0x0319" },
- { 0x10DE031A, "0x031A" },
- { 0x10DE031B, "0x031B" },
- { 0x10DE031C, "0x031C" },
+ { 0x10DE031A, "GeForce FX Go5600" },
+ { 0x10DE031B, "GeForce FX Go5650" },
+ { 0x10DE031C, "Quadro FX Go700" },
{ 0x10DE031D, "0x031D" },
{ 0x10DE031E, "0x031E" },
{ 0x10DE031F, "0x031F" },
- { 0x10DE0321, "0x0321" },
- { 0x10DE0322, "0x0322" },
- { 0x10DE0323, "0x0323" },
- { 0x10DE0326, "0x0326" },
- { 0x10DE032A, "0x032A" },
- { 0x10DE032B, "0x032B" },
- { 0x10DE032E, "0x032E" },
+ { 0x10DE0321, "GeForce FX 5200 Ultra" },
+ { 0x10DE0322, "GeForce FX 5200" },
+ { 0x10DE0323, "GeForce FX 5200SE" },
+ { 0x10DE0324, "GeForce FX Go5200" },
+ { 0x10DE0325, "GeForce FX Go5250" },
+ { 0x10DE0328, "GeForce FX Go5200 32M/64M" },
+#if defined(__powerpc__)
+ { 0x10DE0329, "GeForce FX 5200 (Mac)" },
+#else
+ { 0x10DE0329, "0x0329" },
+#endif
+ { 0x10DE032A, "Quadro NVS 280 PCI" },
+ { 0x10DE032B, "Quadro FX 500" },
+ { 0x10DE032C, "GeForce FX Go5300" },
+ { 0x10DE032D, "GeForce FX Go5100" },
+ { 0x10DE032F, "0x032F" },
+ { 0x10DE0330, "GeForce FX 5900 Ultra" },
+ { 0x10DE0331, "GeForce FX 5900" },
+ { 0x10DE0332, "GeForce FX 5900XT" },
+ { 0x10DE0333, "GeForce FX 5950 Ultra" },
+ { 0x10DE0334, "0x0334" },
+ { 0x10DE0338, "Quadro FX 3000" },
+ { 0x10DE0341, "GeForce FX 5700 Ultra" },
+ { 0x10DE0342, "GeForce FX 5700" },
+ { 0x10DE0343, "0x0343" },
+ { 0x10DE0347, "0x0347" },
+ { 0x10DE0348, "0x0348" },
+ { 0x10DE0349, "0x0349" },
+ { 0x10DE034B, "0x034B" },
+ { 0x10DE034C, "0x034C" },
+ { 0x10DE034E, "Quadro FX 1100" },
+ { 0x10DE034F, "0x034F" },
{-1, NULL}
};
@@ -178,6 +213,7 @@ static SymTabRec NVKnownChipsets[] =
*/
static const char *vgahwSymbols[] = {
+ "vgaHWUnmapMem",
"vgaHWDPMSSet",
"vgaHWFreeHWRec",
"vgaHWGetHWRec",
@@ -188,7 +224,6 @@ static const char *vgahwSymbols[] = {
"vgaHWRestore",
"vgaHWSave",
"vgaHWSaveScreen",
- "vgaHWddc1SetSpeed",
NULL
};
@@ -215,24 +250,21 @@ static const char *ramdacSymbols[] = {
NULL
};
-#define NVuseI2C 1
-
static const char *ddcSymbols[] = {
"xf86PrintEDID",
- "xf86DoEDID_DDC1",
-#if NVuseI2C
"xf86DoEDID_DDC2",
-#endif
"xf86SetDDCproperties",
NULL
};
+#ifdef XFree86LOADER
static const char *vbeSymbols[] = {
"VBEInit",
- "vbeDoEDID",
"vbeFree",
+ "vbeDoEDID",
NULL
};
+#endif
static const char *i2cSymbols[] = {
"xf86CreateI2CBusRec",
@@ -275,6 +307,12 @@ static const char *int10Symbols[] = {
NULL
};
+static const char *rivaSymbols[] = {
+ "RivaGetScrnInfoRec",
+ "RivaAvailableOptions",
+ NULL
+};
+
#ifdef XFree86LOADER
@@ -302,7 +340,6 @@ typedef enum {
OPTION_SW_CURSOR,
OPTION_HW_CURSOR,
OPTION_NOACCEL,
- OPTION_SHOWCACHE,
OPTION_SHADOW_FB,
OPTION_FBDEV,
OPTION_ROTATE,
@@ -317,7 +354,6 @@ static const OptionInfoRec NVOptions[] = {
{ OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_FBDEV, "UseFBDev", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE },
@@ -334,20 +370,10 @@ static const OptionInfoRec NVOptions[] = {
*/
static int pix24bpp = 0;
-/*
- * ramdac info structure initialization
- */
-static NVRamdacRec DacInit = {
- FALSE, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL,
- 0, NULL, NULL, NULL, NULL
-};
-
-
static Bool
NVGetRec(ScrnInfoPtr pScrn)
{
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVGetRec\n"));
/*
* Allocate an NVRec, and hook it into pScrn->driverPrivate.
* pScrn->driverPrivate is initialised to NULL, so we can check if
@@ -359,15 +385,12 @@ NVGetRec(ScrnInfoPtr pScrn)
pScrn->driverPrivate = xnfcalloc(sizeof(NVRec), 1);
/* Initialise it */
- NVPTR(pScrn)->Dac = DacInit;
return TRUE;
}
static void
NVFreeRec(ScrnInfoPtr pScrn)
{
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVFreeRec\n"));
-
if (pScrn->driverPrivate == NULL)
return;
xfree(pScrn->driverPrivate);
@@ -398,7 +421,7 @@ nvSetup(pointer module, pointer opts, int *errmaj, int *errmin)
* might refer to.
*/
LoaderRefSymLists(vgahwSymbols, xaaSymbols, fbSymbols,
- ramdacSymbols, shadowSymbols,
+ ramdacSymbols, shadowSymbols, rivaSymbols,
i2cSymbols, ddcSymbols, vbeSymbols,
fbdevHWSymbols, int10Symbols, NULL);
@@ -419,6 +442,13 @@ nvSetup(pointer module, pointer opts, int *errmaj, int *errmin)
static const OptionInfoRec *
NVAvailableOptions(int chipid, int busid)
{
+ if(chipid == 0x12D20018) {
+ if (!xf86LoadOneModule("riva128", NULL)) {
+ return NULL;
+ } else
+ return RivaAvailableOptions(chipid, busid);
+ }
+
return NVOptions;
}
@@ -430,6 +460,34 @@ NVIdentify(int flags)
}
+static Bool
+NVGetScrnInfoRec(PciChipsets *chips, int chip)
+{
+ ScrnInfoPtr pScrn;
+
+ pScrn = xf86ConfigPciEntity(NULL, 0, chip,
+ chips, NULL, NULL, NULL,
+ NULL, NULL);
+
+ if(!pScrn) return FALSE;
+
+ pScrn->driverVersion = NV_VERSION;
+ pScrn->driverName = NV_DRIVER_NAME;
+ pScrn->name = NV_NAME;
+
+ pScrn->Probe = NVProbe;
+ pScrn->PreInit = NVPreInit;
+ pScrn->ScreenInit = NVScreenInit;
+ pScrn->SwitchMode = NVSwitchMode;
+ pScrn->AdjustFrame = NVAdjustFrame;
+ pScrn->EnterVT = NVEnterVT;
+ pScrn->LeaveVT = NVLeaveVT;
+ pScrn->FreeScreen = NVFreeScreen;
+ pScrn->ValidMode = NVValidMode;
+
+ return TRUE;
+}
+
#define MAX_CHIPS MAXSCREENS
/* Mandatory */
@@ -520,27 +578,19 @@ NVProbe(DriverPtr drv, int flags)
if (flags & PROBE_DETECT)
foundScreen = TRUE;
else for (i = 0; i < numUsed; i++) {
- ScrnInfoPtr pScrn = NULL;
-
- /* Allocate a ScrnInfoRec and claim the slot */
- if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i],
- NVPciChipsets, NULL, NULL, NULL,
- NULL, NULL))) {
-
- /* Fill in what we can of the ScrnInfoRec */
- pScrn->driverVersion = VERSION;
- pScrn->driverName = NV_DRIVER_NAME;
- pScrn->name = NV_NAME;
- pScrn->Probe = NVProbe;
- pScrn->PreInit = NVPreInit;
- pScrn->ScreenInit = NVScreenInit;
- pScrn->SwitchMode = NVSwitchMode;
- pScrn->AdjustFrame = NVAdjustFrame;
- pScrn->EnterVT = NVEnterVT;
- pScrn->LeaveVT = NVLeaveVT;
- pScrn->FreeScreen = NVFreeScreen;
- pScrn->ValidMode = NVValidMode;
- foundScreen = TRUE;
+ pciVideoPtr pPci;
+
+ pPci = xf86GetPciInfoForEntity(usedChips[i]);
+ if(pPci->vendor == PCI_VENDOR_NVIDIA_SGS) {
+ if (!xf86LoadDrvSubModule(drv, "riva128")) {
+ continue;
+ }
+ xf86LoaderReqSymLists(rivaSymbols, NULL);
+ if(RivaGetScrnInfoRec(NVPciChipsets, usedChips[i]))
+ foundScreen = TRUE;
+ } else {
+ if(NVGetScrnInfoRec(NVPciChipsets, usedChips[i]))
+ foundScreen = TRUE;
}
}
@@ -554,7 +604,6 @@ NVProbe(DriverPtr drv, int flags)
Bool
NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
{
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVSwitchMode\n"));
return NVModeInit(xf86Screens[scrnIndex], mode);
}
@@ -571,13 +620,8 @@ NVAdjustFrame(int scrnIndex, int x, int y, int flags)
NVPtr pNv = NVPTR(pScrn);
NVFBLayout *pLayout = &pNv->CurrentLayout;
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVAdjustFrame\n"));
-
- if(pNv->ShowCache && y && pScrn->vtSema)
- y += pScrn->virtualY - 1;
-
startAddr = (((y*pLayout->displayWidth)+x)*(pLayout->bitsPerPixel/8));
- pNv->riva.SetStartAddress(&pNv->riva, startAddr);
+ NVSetStartAddress(pNv, startAddr);
}
@@ -595,8 +639,6 @@ NVEnterVT(int scrnIndex, int flags)
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
NVPtr pNv = NVPTR(pScrn);
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVEnterVT\n"));
-
if (!NVModeInit(pScrn, pScrn->currentMode))
return FALSE;
NVAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
@@ -609,8 +651,6 @@ NVEnterVT(int scrnIndex, int flags)
static Bool
NVEnterVTFBDev(int scrnIndex, int flags)
{
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVEnterVTFBDev\n"));
-
fbdevHWEnterVT(scrnIndex,flags);
return TRUE;
}
@@ -629,10 +669,9 @@ NVLeaveVT(int scrnIndex, int flags)
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
NVPtr pNv = NVPTR(pScrn);
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVLeaveVT\n"));
-
+ NVSync(pScrn);
NVRestore(pScrn);
- pNv->riva.LockUnlock(&pNv->riva, 1);
+ NVLockUnlock(pNv, 1);
}
@@ -648,6 +687,9 @@ NVBlockHandler (
ScreenPtr pScreen = screenInfo.screens[i];
ScrnInfoPtr pScrnInfo = xf86Screens[i];
NVPtr pNv = NVPTR(pScrnInfo);
+
+ if (pNv->DMAKickoffCallback)
+ (*pNv->DMAKickoffCallback)(pScrnInfo);
pScreen->BlockHandler = pNv->BlockHandler;
(*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
@@ -673,11 +715,10 @@ NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
NVPtr pNv = NVPTR(pScrn);
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVCloseScreen\n"));
-
if (pScrn->vtSema) {
+ NVSync(pScrn);
NVRestore(pScrn);
- pNv->riva.LockUnlock(&pNv->riva, 1);
+ NVLockUnlock(pNv, 1);
}
NVUnmapMem(pScrn);
@@ -690,10 +731,10 @@ NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
xfree(pNv->ShadowPtr);
if (pNv->DGAModes)
xfree(pNv->DGAModes);
- if ( pNv->expandBuffer )
- xfree(pNv->expandBuffer);
if (pNv->overlayAdaptor)
xfree(pNv->overlayAdaptor);
+ if (pNv->blitAdaptor)
+ xfree(pNv->blitAdaptor);
pScrn->vtSema = FALSE;
pScreen->CloseScreen = pNv->CloseScreen;
@@ -707,7 +748,6 @@ NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
static void
NVFreeScreen(int scrnIndex, int flags)
{
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVFreeScreen\n"));
/*
* This only gets called when a screen is being deleted. It does not
* get called routinely at the end of a server generation.
@@ -721,137 +761,43 @@ NVFreeScreen(int scrnIndex, int flags)
/* Checks if a mode is suitable for the selected chipset. */
/* Optional */
-static int
+static ModeStatus
NVValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
{
- DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "NVValidMode\n"));
- /* HACK HACK HACK */
return (MODE_OK);
}
-static xf86MonPtr
-nvDoDDC2(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- xf86MonPtr MonInfo = NULL;
-
- if (!pNv->i2cInit) return NULL;
-
- /* - DDC can use I2C bus */
- /* Load I2C if we have the code to use it */
- if ( xf86LoadSubModule(pScrn, "i2c") ) {
- xf86LoaderReqSymLists(i2cSymbols,NULL);
- if (pNv->i2cInit(pScrn)) {
- DEBUG(ErrorF("I2C initialized on %p\n",pNv->I2C));
- if ((MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex,pNv->I2C))) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n",
- MonInfo);
- xf86PrintEDID( MonInfo );
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor "
- "info\n\n");
- xf86SetDDCproperties(pScrn,MonInfo);
- }
- }
- }
- return MonInfo;
-}
-
-#if 0
-static xf86MonPtr
-nvDoDDC1(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- xf86MonPtr MonInfo = NULL;
-
- if (!pNv->ddc1Read || !pNv->DDC1SetSpeed) return NULL;
- if (!pNv->Primary
- && (pNv->DDC1SetSpeed == vgaHWddc1SetSpeed)) return NULL;
-
- if ((MonInfo = xf86DoEDID_DDC1(pScrn->scrnIndex, pNv->DDC1SetSpeed,
- pNv->ddc1Read ))) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n",
- MonInfo);
- xf86PrintEDID( MonInfo );
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n\n");
- xf86SetDDCproperties(pScrn,MonInfo);
- }
- return MonInfo;
-}
-#endif
-
-/*
-static xf86MonPtr
-nvDoDDCVBE(ScrnInfoPtr pScrn)
+static void
+nvProbeDDC(ScrnInfoPtr pScrn, int index)
{
- NVPtr pNv = NVPTR(pScrn);
- xf86MonPtr MonInfo = NULL;
vbeInfoPtr pVbe;
if (xf86LoadSubModule(pScrn, "vbe")) {
- xf86LoaderReqSymLists(vbeSymbols,NULL);
- pVbe = VBEInit(pNv->pInt,pNv->pEnt->index);
- if (pVbe) {
- if ((MonInfo = vbeDoEDID(pVbe,NULL))) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n",
- MonInfo);
- xf86PrintEDID( MonInfo );
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n\n");
- xf86SetDDCproperties(pScrn,MonInfo);
- }
- vbeFree(pVbe);
- }
- }
- return MonInfo;
+ pVbe = VBEInit(NULL,index);
+ ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
+ vbeFree(pVbe);
+ }
}
-*/
-
-/* Internally used */
-xf86MonPtr
-NVdoDDC(ScrnInfoPtr pScrn)
-{
- NVPtr pNv;
- NVRamdacPtr NVdac;
- xf86MonPtr MonInfo = NULL;
- pNv = NVPTR(pScrn);
- NVdac = &pNv->Dac;
-
- /* Load DDC if we have the code to use it */
-
- if (!xf86LoadSubModule(pScrn, "ddc")) return NULL;
-
- xf86LoaderReqSymLists(ddcSymbols, NULL);
- /* if ((MonInfo = nvDoDDCVBE(pScrn))) return MonInfo; */
+Bool NVI2CInit(ScrnInfoPtr pScrn)
+{
+ char *mod = "i2c";
- /* Enable access to extended registers */
- pNv->riva.LockUnlock(&pNv->riva, 0);
- /* Save the current state */
- NVSave(pScrn);
+ if (xf86LoadSubModule(pScrn, mod)) {
+ xf86LoaderReqSymLists(i2cSymbols,NULL);
- if ((MonInfo = nvDoDDC2(pScrn))) goto done;
-#if 0 /* disable for now - causes problems on AXP */
- if ((MonInfo = nvDoDDC1(pScrn))) goto done;
-#endif
+ mod = "ddc";
+ if(xf86LoadSubModule(pScrn, mod)) {
+ xf86LoaderReqSymLists(ddcSymbols, NULL);
+ return NVDACi2cInit(pScrn);
+ }
+ }
- done:
- /* Restore previous state */
- NVRestore(pScrn);
- pNv->riva.LockUnlock(&pNv->riva, 1);
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Couldn't load %s module. DDC probing can't be done\n", mod);
- return MonInfo;
-}
-
-static void
-nvProbeDDC(ScrnInfoPtr pScrn, int index)
-{
- vbeInfoPtr pVbe;
-
- if (xf86LoadSubModule(pScrn, "vbe")) {
- pVbe = VBEInit(NULL,index);
- ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
- vbeFree(pVbe);
- }
+ return FALSE;
}
/* Mandatory */
@@ -860,8 +806,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
{
NVPtr pNv;
MessageType from;
- int i;
- int bytesPerPixel;
+ int i, max_width, max_height;
ClockRangePtr clockRanges;
const char *s;
@@ -870,8 +815,6 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
return TRUE;
}
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVPreInit\n"));
/*
* Note: This function is only called once at server startup, and
* not at the start of each server generation. This means that
@@ -975,10 +918,9 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
/*
* The first thing we should figure out is the depth, bpp, etc.
- * Our default depth is 8, so pass it to the helper function.
*/
- if (!xf86SetDepthBpp(pScrn, 8, 8, 8, Support32bppFb)) {
+ if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) {
xf86FreeInt10(pNv->pInt);
return FALSE;
} else {
@@ -986,17 +928,10 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
switch (pScrn->depth) {
case 8:
case 15:
+ case 16:
case 24:
/* OK */
break;
- case 16:
- if((pNv->Chipset & 0xffff) == 0x0018) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "The Riva 128 chipset does not support depth 16. "
- "Using depth 15 instead\n");
- pScrn->depth = 15;
- }
- break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Given depth (%d) is not supported by this driver\n",
@@ -1039,8 +974,6 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
}
}
- bytesPerPixel = pScrn->bitsPerPixel / 8;
-
/* The vgahw module should be loaded here when needed */
if (!xf86LoadSubModule(pScrn, "vgahw")) {
xf86FreeInt10(pNv->pInt);
@@ -1093,10 +1026,6 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
pNv->NoAccel = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
}
- if (xf86ReturnOptValBool(pNv->Options, OPTION_SHOWCACHE, FALSE)) {
- pNv->ShowCache = TRUE;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShowCache enabled\n");
- }
if (xf86ReturnOptValBool(pNv->Options, OPTION_SHADOW_FB, FALSE)) {
pNv->ShadowFB = TRUE;
pNv->NoAccel = TRUE;
@@ -1170,15 +1099,17 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
if (xf86GetOptValBool(pNv->Options, OPTION_FP_DITHER, &(pNv->FPDither)))
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "enabling flat panel dither\n");
- if (xf86GetOptValInteger(pNv->Options, OPTION_CRTC_NUMBER,
- &pNv->forceCRTC))
+ if (xf86GetOptValInteger(pNv->Options, OPTION_CRTC_NUMBER,
+ &pNv->CRTCnumber))
{
- if((pNv->forceCRTC < 0) || (pNv->forceCRTC > 1)) {
- pNv->forceCRTC = -1;
+ if((pNv->CRTCnumber < 0) || (pNv->CRTCnumber > 1)) {
+ pNv->CRTCnumber = -1;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Invalid CRTC number. Must be 0 or 1\n");
}
- } else pNv->forceCRTC = -1;
+ } else {
+ pNv->CRTCnumber = -1; /* autodetect later */
+ }
if (pNv->pEnt->device->MemBase != 0) {
@@ -1194,10 +1125,8 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
pNv->FbAddress = pNv->pEnt->device->MemBase;
from = X_CONFIG;
} else {
- int i = 1;
- pNv->FbBaseReg = i;
- if (pNv->PciInfo->memBase[i] != 0) {
- pNv->FbAddress = pNv->PciInfo->memBase[i] & 0xff800000;
+ if (pNv->PciInfo->memBase[1] != 0) {
+ pNv->FbAddress = pNv->PciInfo->memBase[1] & 0xff800000;
from = X_PROBED;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1223,9 +1152,8 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
pNv->IOAddress = pNv->pEnt->device->IOBase;
from = X_CONFIG;
} else {
- int i = 0;
- if (pNv->PciInfo->memBase[i] != 0) {
- pNv->IOAddress = pNv->PciInfo->memBase[i] & 0xffffc000;
+ if (pNv->PciInfo->memBase[0] != 0) {
+ pNv->IOAddress = pNv->PciInfo->memBase[0] & 0xffffc000;
from = X_PROBED;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1248,34 +1176,12 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
pNv->alphaCursor = ((pNv->Chipset & 0x0ff0) >= 0x0110);
- switch (pNv->Chipset & 0x0ff0) {
- case 0x0010:
- NV3Setup(pScrn);
- break;
- case 0x0020:
- case 0x00A0:
- NV4Setup(pScrn);
- break;
- case 0x0100:
- case 0x0110:
- case 0x0150:
- case 0x0170:
- case 0x0180:
- case 0x01A0:
- case 0x01F0:
- NV10Setup(pScrn);
- break;
- case 0x0200:
- case 0x0250:
- case 0x0280:
- case 0x0300:
- case 0x0310:
- case 0x0320:
- case 0x0330:
- case 0x0340:
- NV20Setup(pScrn);
- break;
- }
+ pNv->Architecture = (pNv->Chipset & 0x0f00) >> 4;
+
+ if(pNv->Architecture < NV_ARCH_10)
+ pNv->Architecture = NV_ARCH_04;
+
+ NVCommonSetup(pScrn);
/*
* If the user has specified the amount of memory in the XF86Config
@@ -1288,7 +1194,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
if (pNv->FBDev) {
pScrn->videoRam = fbdevHWGetVidmem(pScrn)/1024;
} else {
- pScrn->videoRam = pNv->riva.RamAmountKBytes;
+ pScrn->videoRam = pNv->RamAmountKBytes;
}
from = X_PROBED;
}
@@ -1311,41 +1217,30 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
}
}
- pNv->FbUsableSize = pNv->FbMapSize;
-
- /* Remove reserved memory from end of buffer */
- switch( pNv->riva.Architecture ) {
- case NV_ARCH_03:
- pNv->FbUsableSize -= 32 * 1024;
- break;
- case NV_ARCH_04:
- case NV_ARCH_10:
- case NV_ARCH_20:
- default:
- pNv->FbUsableSize -= 128 * 1024;
- break;
- }
-
+ pNv->FbUsableSize = pNv->FbMapSize - (128 * 1024);
+ pNv->ScratchBufferSize = (pNv->Architecture < NV_ARCH_10) ? 8192 : 16384;
+ pNv->ScratchBufferStart = pNv->FbUsableSize - pNv->ScratchBufferSize;
/*
* Setup the ClockRanges, which describe what clock ranges are available,
* and what sort of modes they can be used for.
*/
- pNv->MinClock = 12000;
- pNv->MaxClock = pNv->riva.MaxVClockFreqKHz;
-
clockRanges = xnfcalloc(sizeof(ClockRange), 1);
clockRanges->next = NULL;
- clockRanges->minClock = pNv->MinClock;
- clockRanges->maxClock = pNv->MaxClock;
+ clockRanges->minClock = pNv->MinVClockFreqKHz;
+ clockRanges->maxClock = pNv->MaxVClockFreqKHz;
clockRanges->clockIndex = -1; /* programmable */
if(((pNv->Chipset & 0x0ff0) <= 0x0100) ||
- ((pNv->Chipset & 0x0ff0) == 0x0150))
+ ((pNv->Chipset & 0x0ff0) == 0x0150) ||
+ ((pNv->Chipset & 0x0ff0) >= 0x0300))
{
clockRanges->interlaceAllowed = TRUE;
- } else /* Chips after NV15 (including NV11) do not support interlaced */
+ } else {
+ /* No NV2x chips support interlaced modes and the only
+ NV1x chips that do are NV10 and NV15 */
clockRanges->interlaceAllowed = FALSE;
+ }
clockRanges->doubleScanAllowed = TRUE;
if(pNv->FlatPanel == 1) {
@@ -1353,6 +1248,14 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
clockRanges->doubleScanAllowed = FALSE;
}
+ if(pNv->Architecture < NV_ARCH_10) {
+ max_width = (pScrn->bitsPerPixel > 16) ? 2032 : 2048;
+ max_height = 2048;
+ } else {
+ max_width = (pScrn->bitsPerPixel > 16) ? 4080 : 4096;
+ max_height = 4096;
+ }
+
/*
* xf86ValidateModes will check that the mode HTotal and VTotal values
* don't exceed the chipset's limit if pScrn->maxHValue and
@@ -1361,11 +1264,11 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
*/
i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
pScrn->display->modes, clockRanges,
- NULL, 256, 2048,
- 32 * pScrn->bitsPerPixel, 128, 2048,
+ NULL, 256, max_width,
+ 512, 128, max_height,
pScrn->display->virtualX,
pScrn->display->virtualY,
- pNv->FbUsableSize,
+ pNv->ScratchBufferStart,
LOOKUP_BEST_REFRESH);
if (i < 1 && pNv->FBDev) {
@@ -1476,18 +1379,8 @@ NVMapMem(ScrnInfoPtr pScrn)
{
NVPtr pNv;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVMapMem\n"));
pNv = NVPTR(pScrn);
- /*
- * Map IO registers to virtual address space
- */
- pNv->IOBase = xf86MapPciMem(pScrn->scrnIndex,
- VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
- pNv->PciTag, pNv->IOAddress, 0x1000000);
- if (pNv->IOBase == NULL)
- return FALSE;
-
pNv->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pNv->PciTag, pNv->FbAddress,
pNv->FbMapSize);
@@ -1504,17 +1397,12 @@ NVMapMemFBDev(ScrnInfoPtr pScrn)
{
NVPtr pNv;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVMamMemFBDev\n"));
pNv = NVPTR(pScrn);
pNv->FbBase = fbdevHWMapVidmem(pScrn);
if (pNv->FbBase == NULL)
return FALSE;
- pNv->IOBase = fbdevHWMapMMIO(pScrn);
- if (pNv->IOBase == NULL)
- return FALSE;
-
pNv->FbStart = pNv->FbBase;
return TRUE;
@@ -1529,15 +1417,8 @@ NVUnmapMem(ScrnInfoPtr pScrn)
{
NVPtr pNv;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVUnmapMem\n"));
pNv = NVPTR(pScrn);
- /*
- * Unmap IO registers to virtual address space
- */
- xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pNv->IOBase, 0x1000000);
- pNv->IOBase = NULL;
-
xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pNv->FbBase, pNv->FbMapSize);
pNv->FbBase = NULL;
pNv->FbStart = NULL;
@@ -1558,32 +1439,38 @@ NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
NVPtr pNv = NVPTR(pScrn);
NVRegPtr nvReg;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVModeInit\n"));
-
/* Initialise the ModeReg values */
if (!vgaHWInit(pScrn, mode))
return FALSE;
pScrn->vtSema = TRUE;
- if(!(*pNv->ModeInit)(pScrn, mode))
+ vgaReg = &hwp->ModeReg;
+ nvReg = &pNv->ModeReg;
+
+ if(!NVDACInit(pScrn, mode))
return FALSE;
+ NVLockUnlock(pNv, 0);
+ if(pNv->twoHeads) {
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
+ VGA_WR08(pNv->PCIO, 0x03D5, nvReg->crtcOwner);
+ NVLockUnlock(pNv, 0);
+ }
+
/* Program the registers */
vgaHWProtect(pScrn, TRUE);
- vgaReg = &hwp->ModeReg;
- nvReg = &pNv->ModeReg;
- (*pNv->Restore)(pScrn, vgaReg, nvReg, FALSE);
+ NVDACRestore(pScrn, vgaReg, nvReg, FALSE);
#if X_BYTE_ORDER == X_BIG_ENDIAN
/* turn on LFB swapping */
{
unsigned char tmp;
- VGA_WR08(pNv->riva.PCIO, 0x3d4, 0x46);
- tmp = VGA_RD08(pNv->riva.PCIO, 0x3d5);
+ VGA_WR08(pNv->PCIO, 0x3d4, 0x46);
+ tmp = VGA_RD08(pNv->PCIO, 0x3d5);
tmp |= (1 << 7);
- VGA_WR08(pNv->riva.PCIO, 0x3d5, tmp);
+ VGA_WR08(pNv->PCIO, 0x3d5, tmp);
}
#endif
@@ -1607,13 +1494,64 @@ NVRestore(ScrnInfoPtr pScrn)
NVPtr pNv = NVPTR(pScrn);
NVRegPtr nvReg = &pNv->SavedReg;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVRestore\n"));
+ if(pNv->twoHeads) {
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
+ VGA_WR08(pNv->PCIO, 0x03D5, nvReg->crtcOwner);
+ NVLockUnlock(pNv, 0);
+ }
+
+ NVLockUnlock(pNv, 0);
+
/* Only restore text mode fonts/text for the primary card */
vgaHWProtect(pScrn, TRUE);
- (*pNv->Restore)(pScrn, vgaReg, nvReg, pNv->Primary);
+ NVDACRestore(pScrn, vgaReg, nvReg, pNv->Primary);
vgaHWProtect(pScrn, FALSE);
}
+static void NVBacklightEnable(NVPtr pNv, Bool on)
+{
+ /* This is done differently on each laptop. Here we
+ define the ones we know for sure. */
+
+#if defined(__powerpc__)
+ if((pNv->Chipset == 0x10DE0179) ||
+ (pNv->Chipset == 0x10DE0189) ||
+ (pNv->Chipset == 0x10DE0329))
+ {
+ /* NV17,18,34 Apple iMac, iBook, PowerBook */
+ CARD32 tmp;
+ tmp = pNv->PMC[0x10F0/4] & 0x7FFFFFFF;
+ pNv->PMC[0x10F0/4] = tmp;
+ tmp = pNv->PCRTC0[0x081C/4] & 0xFFFFFFFC;
+ if(on)
+ tmp |= 0x1;
+ pNv->PCRTC0[0x081C/4] = tmp;
+ }
+#endif
+}
+
+static void
+NVDPMSSetLCD(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
+{
+ NVPtr pNv = NVPTR(pScrn);
+
+ if (!pScrn->vtSema) return;
+
+ switch (PowerManagementMode) {
+ case DPMSModeStandby: /* HSync: Off, VSync: On */
+ case DPMSModeSuspend: /* HSync: On, VSync: Off */
+ case DPMSModeOff: /* HSync: Off, VSync: Off */
+ NVBacklightEnable(pNv, 0);
+ break;
+ case DPMSModeOn: /* HSync: On, VSync: On */
+ NVBacklightEnable(pNv, 1);
+ default:
+ break;
+ }
+ vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
+}
+
+
static void
NVDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
{
@@ -1639,6 +1577,9 @@ NVDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
break;
}
+ /* vgaHWDPMSSet will merely cut the dac output */
+ vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
+
hwp->writeCrtc(hwp, 0x1A, crtc1A);
}
@@ -1653,11 +1594,10 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
ScrnInfoPtr pScrn;
vgaHWPtr hwp;
NVPtr pNv;
- NVRamdacPtr NVdac;
int ret;
VisualPtr visual;
unsigned char *FBStart;
- int width, height, displayWidth;
+ int width, height, displayWidth, offscreenHeight;
BoxRec AvailFBArea;
/*
@@ -1665,29 +1605,26 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
*/
pScrn = xf86Screens[pScreen->myNum];
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVScreenInit\n"));
-
hwp = VGAHWPTR(pScrn);
pNv = NVPTR(pScrn);
- NVdac = &pNv->Dac;
/* Map the NV memory and MMIO areas */
if (pNv->FBDev) {
- if (!NVMapMemFBDev(pScrn))
- return FALSE;
+ if (!NVMapMemFBDev(pScrn)) {
+ return FALSE;
+ }
} else {
- if (!NVMapMem(pScrn))
- return FALSE;
+ if (!NVMapMem(pScrn)) {
+ return FALSE;
+ }
}
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Mem Mapped\n"));
-
+
/* Map the VGA memory when the primary video */
if (pNv->Primary && !pNv->FBDev) {
hwp->MapSize = 0x10000;
if (!vgaHWMapMem(pScrn))
return FALSE;
}
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- VGA Mapped\n"));
if (pNv->FBDev) {
fbdevHWSave(pScrn);
@@ -1695,21 +1632,16 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
return FALSE;
} else {
/* Save the current state */
- pNv->riva.LockUnlock(&pNv->riva, 0);
NVSave(pScrn);
/* Initialise the first mode */
if (!NVModeInit(pScrn, pScrn->currentMode))
return FALSE;
}
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- State saved\n"));
-
/* Darken the screen for aesthetic reasons and set the viewport */
NVSaveScreen(pScreen, SCREEN_SAVER_ON);
pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Blanked\n"));
-
/*
* The next step is to setup the screen's visuals, and initialise the
* framebuffer code. In cases where the framebuffer's default
@@ -1729,20 +1661,12 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
/* Setup the visuals we support. */
- if ((pScrn->bitsPerPixel > 8) && (pNv->riva.Architecture == NV_ARCH_03)) {
- if (!miSetVisualTypes(pScrn->depth, TrueColorMask, 8,
- pScrn->defaultVisual))
- return FALSE;
- } else {
- if (!miSetVisualTypes(pScrn->depth,
- miGetDefaultVisualMask(pScrn->depth), 8,
- pScrn->defaultVisual))
+ if (!miSetVisualTypes(pScrn->depth,
+ miGetDefaultVisualMask(pScrn->depth), 8,
+ pScrn->defaultVisual))
return FALSE;
- }
if (!miSetPixmapDepths ()) return FALSE;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Visuals set up\n"));
-
/*
* Call the framebuffer layer's ScreenInit function, and fill in other
* pScreen fields.
@@ -1786,8 +1710,6 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (!ret)
return FALSE;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- cfb set up\n"));
-
if (pScrn->bitsPerPixel > 8) {
/* Fixup RGB ordering */
visual = pScreen->visuals + pScreen->numVisuals;
@@ -1807,16 +1729,18 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
xf86SetBlackWhitePixels(pScreen);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- B & W\n"));
-
if(!pNv->ShadowFB) /* hardware cursor needs to wrap this layer */
NVDGAInit(pScreen);
+ offscreenHeight = pNv->ScratchBufferStart /
+ (pScrn->displayWidth * pScrn->bitsPerPixel >> 3);
+ if(offscreenHeight > 32767)
+ offscreenHeight = 32767;
+
AvailFBArea.x1 = 0;
AvailFBArea.y1 = 0;
AvailFBArea.x2 = pScrn->displayWidth;
- AvailFBArea.y2 = (min(pNv->FbUsableSize, 32*1024*1024)) /
- (pScrn->displayWidth * pScrn->bitsPerPixel / 8);
+ AvailFBArea.y2 = offscreenHeight;
xf86InitFBManager(pScreen, &AvailFBArea);
if (!pNv->NoAccel)
@@ -1826,14 +1750,10 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
xf86SetBackingStore(pScreen);
xf86SetSilkenMouse(pScreen);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Backing store set up\n"));
-
/* Initialize software cursor.
Must precede creation of the default colormap */
miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- SW cursor set up\n"));
-
/* Initialize HW cursor layer.
Must follow software cursor initialization*/
if (pNv->HWCursor) {
@@ -1846,17 +1766,13 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (!miCreateDefColormap(pScreen))
return FALSE;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Def Color map set up\n"));
-
/* Initialize colormap layer.
Must follow initialization of the default colormap */
if(!xf86HandleColormaps(pScreen, 256, 8,
- (pNv->FBDev ? fbdevHWLoadPalette : NVdac->LoadPalette),
+ (pNv->FBDev ? fbdevHWLoadPalette : NVDACLoadPalette),
NULL, CMAP_RELOAD_ON_MODE_SWITCH | CMAP_PALETTED_TRUECOLOR))
return FALSE;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Palette loaded\n"));
-
if(pNv->ShadowFB) {
RefreshAreaFuncPtr refreshArea = NVRefreshArea;
@@ -1874,21 +1790,16 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
ShadowFBInit(pScreen, refreshArea);
}
- /* Call the vgaHW DPMS function directly.
- XXX There must be a way to get all the DPMS modes. */
-#if 0
- xf86DPMSInit(pScreen, vgaHWDPMSSet, 0);
-#else
- xf86DPMSInit(pScreen, NVDPMSSet, 0);
-#endif
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- DPMS set up\n"));
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Color maps etc. set up\n"));
+ if(pNv->FlatPanel)
+ xf86DPMSInit(pScreen, NVDPMSSetLCD, 0);
+ else
+ xf86DPMSInit(pScreen, NVDPMSSet, 0);
pScrn->memPhysBase = pNv->FbAddress;
pScrn->fbOffset = 0;
- NVInitVideo(pScreen);
+ if(pNv->Rotate == 0)
+ NVInitVideo(pScreen);
pScreen->SaveScreen = NVSaveScreen;
@@ -1903,17 +1814,9 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (serverGeneration == 1) {
xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
}
- /* Done */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Done\n"));
return TRUE;
}
-/* Free up any persistent data structures */
-
-
-/* Do screen blanking */
-
-/* Mandatory */
static Bool
NVSaveScreen(ScreenPtr pScreen, int mode)
{
@@ -1928,7 +1831,6 @@ NVSave(ScrnInfoPtr pScrn)
vgaHWPtr pVga = VGAHWPTR(pScrn);
vgaRegPtr vgaReg = &pVga->SavedReg;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVSave\n"));
- (*pNv->Save)(pScrn, vgaReg, nvReg, pNv->Primary);
+ NVDACSave(pScrn, vgaReg, nvReg, pNv->Primary);
}
diff --git a/src/nv_local.h b/src/nv_local.h
index 50ec06a..f9a8668 100644
--- a/src/nv_local.h
+++ b/src/nv_local.h
@@ -1,6 +1,6 @@
/***************************************************************************\
|* *|
-|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
+|* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
|* *|
|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
|* international laws. Users and possessors of this source code are *|
@@ -36,7 +36,7 @@
|* those rights set forth herein. *|
|* *|
\***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_local.h,v 1.7 2002/01/25 21:56:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_local.h,v 1.9 2003/11/03 05:11:25 tsi Exp $ */
#ifndef __NV_LOCAL_H__
#define __NV_LOCAL_H__
@@ -60,15 +60,42 @@ typedef unsigned int U032;
/*
* HW access macros. These assume memory-mapped I/O, and not normal I/O space.
*/
-#define NV_WR08(p,i,d) MMIO_OUT8((volatile pointer)(p), (i), (d))
-#define NV_RD08(p,i) MMIO_IN8((volatile pointer)(p), (i))
-#define NV_WR16(p,i,d) MMIO_OUT16((volatile pointer)(p), (i), (d))
-#define NV_RD16(p,i) MMIO_IN16((volatile pointer)(p), (i))
-#define NV_WR32(p,i,d) MMIO_OUT32((volatile pointer)(p), (i), (d))
-#define NV_RD32(p,i) MMIO_IN32((volatile pointer)(p), (i))
+#define NV_WR08(p,i,d) MMIO_OUT8((pointer)(p), (i), (d))
+#define NV_RD08(p,i) MMIO_IN8((pointer)(p), (i))
+#define NV_WR16(p,i,d) MMIO_OUT16((pointer)(p), (i), (d))
+#define NV_RD16(p,i) MMIO_IN16((pointer)(p), (i))
+#define NV_WR32(p,i,d) MMIO_OUT32((pointer)(p), (i), (d))
+#define NV_RD32(p,i) MMIO_IN32((pointer)(p), (i))
/* VGA I/O is now always done through MMIO */
#define VGA_WR08(p,i,d) NV_WR08(p,i,d)
#define VGA_RD08(p,i) NV_RD08(p,i)
+#define NVDmaNext(pNv, data) \
+ (pNv)->dmaBase[(pNv)->dmaCurrent++] = (data)
+
+#define NVDmaStart(pNv, tag, size) { \
+ if((pNv)->dmaFree <= (size)) \
+ NVDmaWait(pNv, size); \
+ NVDmaNext(pNv, ((size) << 18) | (tag)); \
+ (pNv)->dmaFree -= ((size) + 1); \
+}
+
+#if defined(__i386__)
+#define _NV_FENCE() outb(0x3D0, 0);
+#else
+#define _NV_FENCE() mem_barrier();
+#endif
+
+#define WRITE_PUT(pNv, data) { \
+ volatile CARD8 scratch; \
+ _NV_FENCE() \
+ scratch = (pNv)->FbStart[0]; \
+ (pNv)->FIFO[0x0010] = (data) << 2; \
+ mem_barrier(); \
+}
+
+#define READ_GET(pNv) ((pNv)->FIFO[0x0011] >> 2)
+
+
#endif /* __NV_LOCAL_H__ */
diff --git a/src/nv_proto.h b/src/nv_proto.h
index 013f57a..f526a71 100644
--- a/src/nv_proto.h
+++ b/src/nv_proto.h
@@ -1,46 +1,60 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h,v 1.8 2002/11/26 23:41:59 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_proto.h,v 1.10 2003/07/31 20:24:29 mvojkovi Exp $ */
#ifndef __NV_PROTO_H__
#define __NV_PROTO_H__
/* in nv_driver.c */
-Bool NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
-void NVAdjustFrame(int scrnIndex, int x, int y, int flags);
-xf86MonPtr NVdoDDC(ScrnInfoPtr pScrn);
+Bool NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
+void NVAdjustFrame(int scrnIndex, int x, int y, int flags);
+Bool NVI2CInit(ScrnInfoPtr pScrn);
/* in nv_dac.c */
-void NVRamdacInit(ScrnInfoPtr pScrn);
-Bool NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
-void NVDACSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg,
- NVRegPtr nvReg, Bool saveFonts);
-void NVDACRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg,
- NVRegPtr nvReg, Bool restoreFonts);
-void NVDACLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
- LOCO *colors, VisualPtr pVisual );
+Bool NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void NVDACSave(ScrnInfoPtr pScrn, vgaRegPtr vgaReg,
+ NVRegPtr nvReg, Bool saveFonts);
+void NVDACRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg,
+ NVRegPtr nvReg, Bool restoreFonts);
+void NVDACLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
+ LOCO *colors, VisualPtr pVisual );
+Bool NVDACi2cInit(ScrnInfoPtr pScrn);
+
/* in nv_video.c */
void NVInitVideo(ScreenPtr);
void NVResetVideo (ScrnInfoPtr pScrnInfo);
/* in nv_setup.c */
-void RivaEnterLeave(ScrnInfoPtr pScrn, Bool enter);
-void NV1Setup(ScrnInfoPtr pScrn);
-void NV3Setup(ScrnInfoPtr pScrn);
-void NV4Setup(ScrnInfoPtr pScrn);
-void NV10Setup(ScrnInfoPtr pScrn);
-void NV20Setup(ScrnInfoPtr pScrn);
+void RivaEnterLeave(ScrnInfoPtr pScrn, Bool enter);
+void NVCommonSetup(ScrnInfoPtr pScrn);
/* in nv_cursor.c */
-Bool NVCursorInit(ScreenPtr pScreen);
+Bool NVCursorInit(ScreenPtr pScreen);
/* in nv_xaa.c */
-Bool NVAccelInit(ScreenPtr pScreen);
-void NVSync(ScrnInfoPtr pScrn);
-void NVResetGraphics(ScrnInfoPtr pScrn);
+Bool NVAccelInit(ScreenPtr pScreen);
+void NVSync(ScrnInfoPtr pScrn);
+void NVResetGraphics(ScrnInfoPtr pScrn);
+void NVDmaKickoff(NVPtr pNv);
+void NVDmaWait(NVPtr pNv, int size);
/* in nv_dga.c */
-Bool NVDGAInit(ScreenPtr pScreen);
+Bool NVDGAInit(ScreenPtr pScreen);
+
+/* in riva_hw.c */
+void NVCalcStateExt(NVPtr,struct _riva_hw_state *,int,int,int,int,int,int);
+void NVLoadStateExt(NVPtr,struct _riva_hw_state *);
+void NVUnloadStateExt(NVPtr,struct _riva_hw_state *);
+void NVSetStartAddress(NVPtr,CARD32);
+int NVShowHideCursor(NVPtr,int);
+void NVLockUnlock(NVPtr,int);
+
+/* in nv_shadow.c */
+void NVRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void NVRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void NVRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void NVRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
+void NVPointerMoved(int index, int x, int y);
#endif /* __NV_PROTO_H__ */
diff --git a/src/nv_setup.c b/src/nv_setup.c
index cdb0ade..8f84f8e 100644
--- a/src/nv_setup.c
+++ b/src/nv_setup.c
@@ -1,30 +1,43 @@
-/* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
-/*
- * Copyright 1996-1997 David J. McKay
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
- <jpaana@s2.org> */
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v 1.27.2.1 2003/05/09 02:17:49 dawes Exp $ */
+ /***************************************************************************\
+|* *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
+|* *|
+|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
+|* international laws. Users and possessors of this source code are *|
+|* hereby granted a nonexclusive, royalty-free copyright license to *|
+|* use this code in individual and commercial software. *|
+|* *|
+|* Any use of this source code must include, in the user documenta- *|
+|* tion and internal comments to the code, notices to the end user *|
+|* as follows: *|
+|* *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
+|* *|
+|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
+|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
+|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
+|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
+|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
+|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
+|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
+|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
+|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
+|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
+|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
+|* *|
+|* U.S. Government End Users. This source code is a "commercial *|
+|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
+|* consisting of "commercial computer software" and "commercial *|
+|* computer software documentation," as such terms are used in *|
+|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
+|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
+|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
+|* all U.S. Government End Users acquire the source code with only *|
+|* those rights set forth herein. *|
+|* *|
+ \***************************************************************************/
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v 1.39 2003/11/07 23:56:28 mvojkovi Exp $ */
#include "nv_include.h"
@@ -34,82 +47,82 @@
static void NVWriteCrtc(vgaHWPtr pVga, CARD8 index, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
- VGA_WR08(pNv->riva.PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET, value);
+ VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
+ VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET, value);
}
static CARD8 NVReadCrtc(vgaHWPtr pVga, CARD8 index)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
- return (VGA_RD08(pNv->riva.PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET));
+ VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
+ return (VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET));
}
static void NVWriteGr(vgaHWPtr pVga, CARD8 index, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PVIO, VGA_GRAPH_INDEX, index);
- VGA_WR08(pNv->riva.PVIO, VGA_GRAPH_DATA, value);
+ VGA_WR08(pNv->PVIO, VGA_GRAPH_INDEX, index);
+ VGA_WR08(pNv->PVIO, VGA_GRAPH_DATA, value);
}
static CARD8 NVReadGr(vgaHWPtr pVga, CARD8 index)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PVIO, VGA_GRAPH_INDEX, index);
- return (VGA_RD08(pNv->riva.PVIO, VGA_GRAPH_DATA));
+ VGA_WR08(pNv->PVIO, VGA_GRAPH_INDEX, index);
+ return (VGA_RD08(pNv->PVIO, VGA_GRAPH_DATA));
}
static void NVWriteSeq(vgaHWPtr pVga, CARD8 index, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PVIO, VGA_SEQ_INDEX, index);
- VGA_WR08(pNv->riva.PVIO, VGA_SEQ_DATA, value);
+ VGA_WR08(pNv->PVIO, VGA_SEQ_INDEX, index);
+ VGA_WR08(pNv->PVIO, VGA_SEQ_DATA, value);
}
static CARD8 NVReadSeq(vgaHWPtr pVga, CARD8 index)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PVIO, VGA_SEQ_INDEX, index);
- return (VGA_RD08(pNv->riva.PVIO, VGA_SEQ_DATA));
+ VGA_WR08(pNv->PVIO, VGA_SEQ_INDEX, index);
+ return (VGA_RD08(pNv->PVIO, VGA_SEQ_DATA));
}
static void NVWriteAttr(vgaHWPtr pVga, CARD8 index, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
volatile CARD8 tmp;
- tmp = VGA_RD08(pNv->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
+ tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
if (pVga->paletteEnabled)
index &= ~0x20;
else
index |= 0x20;
- VGA_WR08(pNv->riva.PCIO, VGA_ATTR_INDEX, index);
- VGA_WR08(pNv->riva.PCIO, VGA_ATTR_DATA_W, value);
+ VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, index);
+ VGA_WR08(pNv->PCIO, VGA_ATTR_DATA_W, value);
}
static CARD8 NVReadAttr(vgaHWPtr pVga, CARD8 index)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
volatile CARD8 tmp;
- tmp = VGA_RD08(pNv->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
+ tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
if (pVga->paletteEnabled)
index &= ~0x20;
else
index |= 0x20;
- VGA_WR08(pNv->riva.PCIO, VGA_ATTR_INDEX, index);
- return (VGA_RD08(pNv->riva.PCIO, VGA_ATTR_DATA_R));
+ VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, index);
+ return (VGA_RD08(pNv->PCIO, VGA_ATTR_DATA_R));
}
static void NVWriteMiscOut(vgaHWPtr pVga, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PVIO, VGA_MISC_OUT_W, value);
+ VGA_WR08(pNv->PVIO, VGA_MISC_OUT_W, value);
}
static CARD8 NVReadMiscOut(vgaHWPtr pVga)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- return (VGA_RD08(pNv->riva.PVIO, VGA_MISC_OUT_R));
+ return (VGA_RD08(pNv->PVIO, VGA_MISC_OUT_R));
}
static void NVEnablePalette(vgaHWPtr pVga)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
volatile CARD8 tmp;
- tmp = VGA_RD08(pNv->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
- VGA_WR08(pNv->riva.PCIO, VGA_ATTR_INDEX, 0x00);
+ tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
+ VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, 0x00);
pVga->paletteEnabled = TRUE;
}
static void NVDisablePalette(vgaHWPtr pVga)
@@ -117,50 +130,54 @@ static void NVDisablePalette(vgaHWPtr pVga)
NVPtr pNv = (NVPtr)pVga->MMIOBase;
volatile CARD8 tmp;
- tmp = VGA_RD08(pNv->riva.PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
- VGA_WR08(pNv->riva.PCIO, VGA_ATTR_INDEX, 0x20);
+ tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
+ VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, 0x20);
pVga->paletteEnabled = FALSE;
}
static void NVWriteDacMask(vgaHWPtr pVga, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PDIO, VGA_DAC_MASK, value);
+ VGA_WR08(pNv->PDIO, VGA_DAC_MASK, value);
}
static CARD8 NVReadDacMask(vgaHWPtr pVga)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- return (VGA_RD08(pNv->riva.PDIO, VGA_DAC_MASK));
+ return (VGA_RD08(pNv->PDIO, VGA_DAC_MASK));
}
static void NVWriteDacReadAddr(vgaHWPtr pVga, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PDIO, VGA_DAC_READ_ADDR, value);
+ VGA_WR08(pNv->PDIO, VGA_DAC_READ_ADDR, value);
}
static void NVWriteDacWriteAddr(vgaHWPtr pVga, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PDIO, VGA_DAC_WRITE_ADDR, value);
+ VGA_WR08(pNv->PDIO, VGA_DAC_WRITE_ADDR, value);
}
static void NVWriteDacData(vgaHWPtr pVga, CARD8 value)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- VGA_WR08(pNv->riva.PDIO, VGA_DAC_DATA, value);
+ VGA_WR08(pNv->PDIO, VGA_DAC_DATA, value);
}
static CARD8 NVReadDacData(vgaHWPtr pVga)
{
NVPtr pNv = (NVPtr)pVga->MMIOBase;
- return (VGA_RD08(pNv->riva.PDIO, VGA_DAC_DATA));
+ return (VGA_RD08(pNv->PDIO, VGA_DAC_DATA));
}
static Bool
-NVIsConnected (ScrnInfoPtr pScrn, Bool second)
+NVIsConnected (ScrnInfoPtr pScrn, int output)
{
NVPtr pNv = NVPTR(pScrn);
- volatile U032 *PRAMDAC = pNv->riva.PRAMDAC0;
+ volatile U032 *PRAMDAC = pNv->PRAMDAC0;
CARD32 reg52C, reg608;
Bool present;
- if(second) PRAMDAC += 0x800;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Probing for analog device on output %s...\n",
+ output ? "B" : "A");
+
+ if(output) PRAMDAC += 0x800;
reg52C = PRAMDAC[0x052C/4];
reg608 = PRAMDAC[0x0608/4];
@@ -171,14 +188,19 @@ NVIsConnected (ScrnInfoPtr pScrn, Bool second)
usleep(1000);
PRAMDAC[0x052C/4] |= 1;
- pNv->riva.PRAMDAC0[0x0610/4] = 0x94050140;
- pNv->riva.PRAMDAC0[0x0608/4] |= 0x00001000;
+ pNv->PRAMDAC0[0x0610/4] = 0x94050140;
+ pNv->PRAMDAC0[0x0608/4] |= 0x00001000;
usleep(1000);
present = (PRAMDAC[0x0608/4] & (1 << 28)) ? TRUE : FALSE;
- pNv->riva.PRAMDAC0[0x0608/4] &= 0x0000EFFF;
+ if(present)
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ...found one\n");
+ else
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ...can't find one\n");
+
+ pNv->PRAMDAC0[0x0608/4] &= 0x0000EFFF;
PRAMDAC[0x052C/4] = reg52C;
PRAMDAC[0x0608/4] = reg608;
@@ -187,94 +209,130 @@ NVIsConnected (ScrnInfoPtr pScrn, Bool second)
}
static void
-NVOverrideCRTC(ScrnInfoPtr pScrn)
+NVSelectHeadRegisters(ScrnInfoPtr pScrn, int head)
{
NVPtr pNv = NVPTR(pScrn);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Detected CRTC controller %i being used\n",
- pNv->SecondCRTC ? 1 : 0);
-
- if(pNv->forceCRTC != -1) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Forcing usage of CRTC %i\n", pNv->forceCRTC);
- pNv->SecondCRTC = pNv->forceCRTC;
+ if(head) {
+ pNv->PCIO = pNv->PCIO0 + 0x2000;
+ pNv->PCRTC = pNv->PCRTC0 + 0x800;
+ pNv->PRAMDAC = pNv->PRAMDAC0 + 0x800;
+ pNv->PDIO = pNv->PDIO0 + 0x2000;
+ } else {
+ pNv->PCIO = pNv->PCIO0;
+ pNv->PCRTC = pNv->PCRTC0;
+ pNv->PRAMDAC = pNv->PRAMDAC0;
+ pNv->PDIO = pNv->PDIO0;
}
}
-static void
-NVIsSecond (ScrnInfoPtr pScrn)
+static xf86MonPtr
+NVProbeDDC (ScrnInfoPtr pScrn, int bus)
{
NVPtr pNv = NVPTR(pScrn);
+ xf86MonPtr MonInfo = NULL;
- if(pNv->FlatPanel == 1) {
- switch(pNv->Chipset & 0xffff) {
- case 0x0174:
- case 0x0175:
- case 0x0176:
- case 0x0177:
- case 0x0179:
- case 0x017C:
- case 0x017D:
- case 0x0186:
- case 0x0187:
- /* this might not be a good default for the chips below */
- case 0x0286:
- case 0x028C:
- case 0x0316:
- case 0x0317:
- case 0x031A:
- case 0x031B:
- case 0x031C:
- case 0x031D:
- case 0x031E:
- case 0x031F:
- case 0x0326:
- case 0x032E:
- pNv->SecondCRTC = TRUE;
- break;
- default:
- pNv->SecondCRTC = FALSE;
- break;
- }
+ if(!pNv->I2C) return NULL;
+
+ pNv->DDCBase = bus ? 0x36 : 0x3e;
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Probing for EDID on I2C bus %s...\n", bus ? "B" : "A");
+
+ if ((MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex, pNv->I2C))) {
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "DDC detected a %s:\n", MonInfo->features.input_type ?
+ "DFP" : "CRT");
+ xf86PrintEDID( MonInfo );
} else {
- if(NVIsConnected(pScrn, 0)) {
- if(pNv->riva.PRAMDAC0[0x0000052C/4] & 0x100)
- pNv->SecondCRTC = TRUE;
- else
- pNv->SecondCRTC = FALSE;
- } else
- if (NVIsConnected(pScrn, 1)) {
- pNv->DDCBase = 0x36;
- if(pNv->riva.PRAMDAC0[0x0000252C/4] & 0x100)
- pNv->SecondCRTC = TRUE;
- else
- pNv->SecondCRTC = FALSE;
- } else /* default */
- pNv->SecondCRTC = FALSE;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ " ... none found\n");
}
- NVOverrideCRTC(pScrn);
+ return MonInfo;
}
-static void
-NVCommonSetup(ScrnInfoPtr pScrn)
+static void nv4GetConfig (NVPtr pNv)
{
- NVPtr pNv = NVPTR(pScrn);
- vgaHWPtr pVga = VGAHWPTR(pScrn);
- CARD32 regBase = pNv->IOAddress;
- int mmioFlags;
+ if (pNv->PFB[0x0000/4] & 0x00000100) {
+ pNv->RamAmountKBytes = ((pNv->PFB[0x0000/4] >> 12) & 0x0F) * 1024 * 2
+ + 1024 * 2;
+ } else {
+ switch (pNv->PFB[0x0000/4] & 0x00000003) {
+ case 0:
+ pNv->RamAmountKBytes = 1024 * 32;
+ break;
+ case 1:
+ pNv->RamAmountKBytes = 1024 * 4;
+ break;
+ case 2:
+ pNv->RamAmountKBytes = 1024 * 8;
+ break;
+ case 3:
+ default:
+ pNv->RamAmountKBytes = 1024 * 16;
+ break;
+ }
+ }
+ pNv->CrystalFreqKHz = (pNv->PEXTDEV[0x0000/4] & 0x00000040) ? 14318 : 13500;
+ pNv->CURSOR = &(pNv->PRAMIN[0x1E00]);
+ pNv->MinVClockFreqKHz = 12000;
+ pNv->MaxVClockFreqKHz = 350000;
+}
+
+static void nv10GetConfig (NVPtr pNv)
+{
+ CARD32 implementation = pNv->Chipset & 0x0ff0;
+
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ /* turn on big endian register access */
+ if(!(pNv->PMC[0x0004/4] & 0x01000001)) {
+ pNv->PMC[0x0004/4] = 0x01000001;
+ mem_barrier();
+ }
+#endif
+
+ if((pNv->Chipset && 0xffff) == 0x01a0) {
+ int amt = pciReadLong(pciTag(0, 0, 1), 0x7C);
+ pNv->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;
+ } else if((pNv->Chipset & 0xffff) == 0x01f0) {
+ int amt = pciReadLong(pciTag(0, 0, 1), 0x84);
+ pNv->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
+ } else {
+ pNv->RamAmountKBytes = (pNv->PFB[0x020C/4] & 0xFFF00000) >> 10;
+ }
+
+ pNv->CrystalFreqKHz = (pNv->PEXTDEV[0x0000/4] & (1 << 6)) ? 14318 : 13500;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVCommonSetup\n"));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Regbase %x\n", regBase));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- riva %x\n", &pNv->riva));
+ if((implementation == 0x0170) ||
+ (implementation == 0x0180) ||
+ (implementation == 0x01F0) ||
+ (implementation >= 0x0250))
+ {
+ if(pNv->PEXTDEV[0x0000/4] & (1 << 22))
+ pNv->CrystalFreqKHz = 27000;
+ }
- pNv->Save = NVDACSave;
- pNv->Restore = NVDACRestore;
- pNv->ModeInit = NVDACInit;
+ pNv->CursorStart = (pNv->RamAmountKBytes - 96) * 1024;
+ pNv->CURSOR = NULL; /* can't set this here */
+ pNv->MinVClockFreqKHz = 12000;
+ pNv->MaxVClockFreqKHz = pNv->twoStagePLL ? 400000 : 350000;
+}
- pNv->Dac.LoadPalette = NVDACLoadPalette;
+void
+NVCommonSetup(ScrnInfoPtr pScrn)
+{
+ NVPtr pNv = NVPTR(pScrn);
+ vgaHWPtr pVga = VGAHWPTR(pScrn);
+ CARD16 implementation = pNv->Chipset & 0x0ff0;
+ xf86MonPtr monitorA, monitorB;
+ Bool mobile = FALSE;
+ Bool tvA = FALSE;
+ Bool tvB = FALSE;
+ int FlatPanel = -1; /* really means the CRTC is slaved */
+ Bool Television = FALSE;
+
/*
* Override VGA I/O routines.
*/
@@ -303,249 +361,312 @@ NVCommonSetup(ScrnInfoPtr pScrn)
pVga->MMIOBase = (CARD8 *)pNv;
pVga->MMIOOffset = 0;
- /*
- * No IRQ in use.
- */
- pNv->riva.EnableIRQ = 0;
- /*
- * Map remaining registers. This MUST be done in the OS specific driver code.
- */
- pNv->riva.IO = VGA_IOBASE_COLOR;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- IO %x\n", pNv->riva.IO));
-
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
-
- pNv->riva.PRAMDAC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00680000, 0x00003000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PRAMDAC %x\n", pNv->riva.PRAMDAC0));
- pNv->riva.PFB = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00100000, 0x00001000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PFB %x\n", pNv->riva.PFB));
- pNv->riva.PFIFO = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00002000, 0x00002000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PFIFO %x\n", pNv->riva.PFIFO));
- pNv->riva.PGRAPH = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00400000, 0x00002000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PGRAPH %x\n", pNv->riva.PGRAPH));
- pNv->riva.PEXTDEV = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00101000, 0x00001000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PEXTDEV %x\n", pNv->riva.PEXTDEV));
- pNv->riva.PTIMER = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00009000, 0x00001000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PTIMER %x\n", pNv->riva.PTIMER));
- pNv->riva.PMC = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00000000, 0x00009000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- PMC %x\n", pNv->riva.PMC));
- pNv->riva.FIFO = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00800000, 0x00010000);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- FIFO %x\n", pNv->riva.FIFO));
-
- /*
- * These registers are read/write as 8 bit values. Probably have to map
- * sparse on alpha.
- */
- pNv->riva.PCIO0 = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pNv->PciTag, regBase+0x00601000,
- 0x00003000);
- pNv->riva.PDIO0 = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pNv->PciTag, regBase+0x00681000,
- 0x00003000);
- pNv->riva.PVIO = (U008 *)xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pNv->PciTag, regBase+0x000C0000,
- 0x00001000);
-
- if(pNv->FlatPanel == -1) {
- switch(pNv->Chipset & 0xffff) {
- case 0x0112: /* known laptop chips */
- case 0x0174:
- case 0x0175:
- case 0x0176:
- case 0x0177:
- case 0x0179:
- case 0x017C:
- case 0x017D:
- case 0x0186:
- case 0x0187:
- case 0x0286:
- case 0x028C:
- case 0x0316:
- case 0x0317:
- case 0x031A:
- case 0x031B:
- case 0x031C:
- case 0x031D:
- case 0x031E:
- case 0x031F:
- case 0x0326:
- case 0x032E:
- xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
- "On a laptop. Assuming Digital Flat Panel\n");
- pNv->FlatPanel = 1;
- break;
- default:
- break;
- }
- }
-
- pNv->DDCBase = 0x3e;
-
- switch(pNv->Chipset & 0x0ff0) {
- case 0x0110:
- if((pNv->Chipset & 0xffff) == 0x0112)
- pNv->SecondCRTC = TRUE;
-#if defined(__powerpc__)
- else if(pNv->FlatPanel == 1)
- pNv->SecondCRTC = TRUE;
-#endif
- NVOverrideCRTC(pScrn);
- break;
- case 0x0170:
- case 0x0180:
- case 0x01F0:
- case 0x0250:
- case 0x0280:
- case 0x0300:
- case 0x0310:
- case 0x0320:
- case 0x0330:
- case 0x0340:
- NVIsSecond(pScrn);
+ pNv->REGS = xf86MapPciMem(pScrn->scrnIndex,
+ VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
+ pNv->PciTag, pNv->IOAddress, 0x01000000);
+
+ pNv->PRAMIN = pNv->REGS + (0x00710000/4);
+ pNv->PCRTC0 = pNv->REGS + (0x00600000/4);
+ pNv->PRAMDAC0 = pNv->REGS + (0x00680000/4);
+ pNv->PFB = pNv->REGS + (0x00100000/4);
+ pNv->PFIFO = pNv->REGS + (0x00002000/4);
+ pNv->PGRAPH = pNv->REGS + (0x00400000/4);
+ pNv->PEXTDEV = pNv->REGS + (0x00101000/4);
+ pNv->PTIMER = pNv->REGS + (0x00009000/4);
+ pNv->PMC = pNv->REGS + (0x00000000/4);
+ pNv->FIFO = pNv->REGS + (0x00800000/4);
+
+ /* 8 bit registers */
+ pNv->PCIO0 = (U008*)pNv->REGS + 0x00601000;
+ pNv->PDIO0 = (U008*)pNv->REGS + 0x00681000;
+ pNv->PVIO = (U008*)pNv->REGS + 0x000C0000;
+
+ pNv->twoHeads = (implementation >= 0x0110) &&
+ (implementation != 0x0150) &&
+ (implementation != 0x01A0) &&
+ (implementation != 0x0200);
+
+ pNv->fpScaler = (pNv->twoHeads && (implementation != 0x0110));
+
+ pNv->twoStagePLL = (implementation == 0x0310) ||
+ (implementation == 0x0340);
+
+ /* look for known laptop chips */
+ switch(pNv->Chipset & 0xffff) {
+ case 0x0112:
+ case 0x0174:
+ case 0x0175:
+ case 0x0176:
+ case 0x0177:
+ case 0x0179:
+ case 0x017C:
+ case 0x017D:
+ case 0x0186:
+ case 0x0187:
+ case 0x0189:
+ case 0x0286:
+ case 0x028C:
+ case 0x0316:
+ case 0x0317:
+ case 0x031A:
+ case 0x031B:
+ case 0x031C:
+ case 0x031D:
+ case 0x031E:
+ case 0x031F:
+ case 0x0324:
+ case 0x0325:
+ case 0x0328:
+ case 0x0329:
+ case 0x032C:
+ case 0x032D:
+ case 0x0347:
+ case 0x0348:
+ case 0x0349:
+ case 0x034B:
+ case 0x034C:
+ mobile = TRUE;
break;
default:
break;
}
- if(pNv->riva.Architecture == 3)
- pNv->riva.PCRTC0 = pNv->riva.PGRAPH;
+ if(pNv->Architecture == NV_ARCH_04)
+ nv4GetConfig(pNv);
+ else
+ nv10GetConfig(pNv);
- if(pNv->SecondCRTC) {
- pNv->riva.PCIO = pNv->riva.PCIO0 + 0x2000;
- pNv->riva.PCRTC = pNv->riva.PCRTC0 + 0x800;
- pNv->riva.PRAMDAC = pNv->riva.PRAMDAC0 + 0x800;
- pNv->riva.PDIO = pNv->riva.PDIO0 + 0x2000;
- } else {
- pNv->riva.PCIO = pNv->riva.PCIO0;
- pNv->riva.PCRTC = pNv->riva.PCRTC0;
- pNv->riva.PRAMDAC = pNv->riva.PRAMDAC0;
- pNv->riva.PDIO = pNv->riva.PDIO0;
- }
+ NVSelectHeadRegisters(pScrn, 0);
- RivaGetConfig(pNv);
+ NVLockUnlock(pNv, 0);
- pNv->Dac.maxPixelClock = pNv->riva.MaxVClockFreqKHz;
+ NVI2CInit(pScrn);
- pNv->riva.LockUnlock(&pNv->riva, 0);
+ pNv->Television = FALSE;
- NVRamdacInit(pScrn);
+ if(!pNv->twoHeads) {
+ pNv->CRTCnumber = 0;
+ if((monitorA = NVProbeDDC(pScrn, 0))) {
+ FlatPanel = monitorA->features.input_type ? 1 : 0;
-#if !defined(__powerpc__)
- /* Read and print the Monitor DDC info */
- pScrn->monitor->DDC = NVdoDDC(pScrn);
-#endif
- if(pNv->FlatPanel == -1) {
- pNv->FlatPanel = 0;
- if(pScrn->monitor->DDC) {
- xf86MonPtr ddc = (xf86MonPtr)pScrn->monitor->DDC;
-
- if(ddc->features.input_type) {
- pNv->FlatPanel = 1;
- xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
- "autodetected Digital Flat Panel\n");
+ /* NV4 doesn't support FlatPanels */
+ if((pNv->Chipset & 0x0fff) <= 0x0020)
+ FlatPanel = 0;
+ } else {
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
+ if(VGA_RD08(pNv->PCIO, 0x03D5) & 0x80) {
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x33);
+ if(!(VGA_RD08(pNv->PCIO, 0x03D5) & 0x01))
+ Television = TRUE;
+ FlatPanel = 1;
+ } else {
+ FlatPanel = 0;
}
- }
- }
- pNv->riva.flatPanel = (pNv->FlatPanel > 0) ? FP_ENABLE : 0;
- if(pNv->riva.flatPanel && pNv->FPDither && (pScrn->depth == 24))
- pNv->riva.flatPanel |= FP_DITHER;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "HW is currently programmed for %s\n",
+ FlatPanel ? (Television ? "TV" : "DFP") : "CRT");
+ }
+
+ if(pNv->FlatPanel == -1) {
+ pNv->FlatPanel = FlatPanel;
+ pNv->Television = Television;
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+ "Forcing display type to %s as specified\n",
+ pNv->FlatPanel ? "DFP" : "CRT");
+ }
+ } else {
+ CARD8 outputAfromCRTC, outputBfromCRTC;
+ int CRTCnumber = -1;
+ CARD8 slaved_on_A, slaved_on_B;
+ Bool analog_on_A, analog_on_B;
+ CARD32 oldhead;
+ CARD8 cr44;
+
+ if(implementation != 0x0110) {
+ if(pNv->PRAMDAC0[0x0000052C/4] & 0x100)
+ outputAfromCRTC = 1;
+ else
+ outputAfromCRTC = 0;
+ if(pNv->PRAMDAC0[0x0000252C/4] & 0x100)
+ outputBfromCRTC = 1;
+ else
+ outputBfromCRTC = 0;
+ analog_on_A = NVIsConnected(pScrn, 0);
+ analog_on_B = NVIsConnected(pScrn, 1);
+ } else {
+ outputAfromCRTC = 0;
+ outputBfromCRTC = 1;
+ analog_on_A = FALSE;
+ analog_on_B = FALSE;
+ }
-}
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
+ cr44 = VGA_RD08(pNv->PCIO, 0x03D5);
-void
-NV1Setup(ScrnInfoPtr pScrn)
-{
-}
+ VGA_WR08(pNv->PCIO, 0x03D5, 3);
+ NVSelectHeadRegisters(pScrn, 1);
+ NVLockUnlock(pNv, 0);
-void
-NV3Setup(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- CARD32 frameBase = pNv->FbAddress;
- int mmioFlags;
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
+ slaved_on_B = VGA_RD08(pNv->PCIO, 0x03D5) & 0x80;
+ if(slaved_on_B) {
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x33);
+ tvB = !(VGA_RD08(pNv->PCIO, 0x03D5) & 0x01);
+ }
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV3Setup\n"));
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
+ VGA_WR08(pNv->PCIO, 0x03D5, 0);
+ NVSelectHeadRegisters(pScrn, 0);
+ NVLockUnlock(pNv, 0);
- /*
- * Record chip architecture based in PCI probe.
- */
- pNv->riva.Architecture = 3;
- /*
- * Map chip-specific memory-mapped registers. This MUST be done in the OS specific driver code.
- */
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
- pNv->riva.PRAMIN = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- frameBase+0x00C00000, 0x00008000);
-
- NVCommonSetup(pScrn);
-}
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
+ slaved_on_A = VGA_RD08(pNv->PCIO, 0x03D5) & 0x80;
+ if(slaved_on_A) {
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x33);
+ tvA = !(VGA_RD08(pNv->PCIO, 0x03D5) & 0x01);
+ }
-void
-NV4Setup(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- CARD32 regBase = pNv->IOAddress;
- int mmioFlags;
+ oldhead = pNv->PCRTC0[0x00000860/4];
+ pNv->PCRTC0[0x00000860/4] = oldhead | 0x00000010;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV4Setup\n"));
+ monitorA = NVProbeDDC(pScrn, 0);
+ monitorB = NVProbeDDC(pScrn, 1);
- pNv->riva.Architecture = 4;
- /*
- * Map chip-specific memory-mapped registers. This MUST be done in the OS specific driver code.
- */
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
- pNv->riva.PRAMIN = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00710000, 0x00010000);
- pNv->riva.PCRTC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00600000, 0x00001000);
+ if(slaved_on_A && !tvA) {
+ CRTCnumber = 0;
+ FlatPanel = 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "CRTC 0 is currently programmed for DFP\n");
+ } else
+ if(slaved_on_B && !tvB) {
+ CRTCnumber = 1;
+ FlatPanel = 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "CRTC 1 is currently programmed for DFP\n");
+ } else
+ if(analog_on_A) {
+ CRTCnumber = outputAfromCRTC;
+ FlatPanel = 0;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "CRTC %i appears to have a CRT attached\n", CRTCnumber);
+ } else
+ if(analog_on_B) {
+ CRTCnumber = outputBfromCRTC;
+ FlatPanel = 0;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "CRTC %i appears to have a CRT attached\n", CRTCnumber);
+ } else
+ if(slaved_on_A) {
+ CRTCnumber = 0;
+ FlatPanel = 1;
+ Television = 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "CRTC 0 is currently programmed for TV\n");
+ } else
+ if(slaved_on_B) {
+ CRTCnumber = 1;
+ FlatPanel = 1;
+ Television = 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "CRTC 1 is currently programmed for TV\n");
+ } else
+ if(monitorA) {
+ FlatPanel = monitorA->features.input_type ? 1 : 0;
+ } else
+ if(monitorB) {
+ FlatPanel = monitorB->features.input_type ? 1 : 0;
+ }
- NVCommonSetup(pScrn);
-}
+ if(pNv->FlatPanel == -1) {
+ if(FlatPanel != -1) {
+ pNv->FlatPanel = FlatPanel;
+ pNv->Television = Television;
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Unable to detect display type...\n");
+ if(mobile) {
+ xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT,
+ "...On a laptop, assuming DFP\n");
+ pNv->FlatPanel = 1;
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT,
+ "...Using default of CRT\n");
+ pNv->FlatPanel = 0;
+ }
+ }
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+ "Forcing display type to %s as specified\n",
+ pNv->FlatPanel ? "DFP" : "CRT");
+ }
-void
-NV10Setup(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- CARD32 regBase = pNv->IOAddress;
- int mmioFlags;
+ if(pNv->CRTCnumber == -1) {
+ if(CRTCnumber != -1) pNv->CRTCnumber = CRTCnumber;
+ else {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Unable to detect which CRTCNumber...\n");
+ if(pNv->FlatPanel) pNv->CRTCnumber = 1;
+ else pNv->CRTCnumber = 0;
+ xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT,
+ "...Defaulting to CRTCNumber %i\n", pNv->CRTCnumber);
+ }
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+ "Forcing CRTCNumber %i as specified\n", pNv->CRTCnumber);
+ }
+
+ if(monitorA) {
+ if((monitorA->features.input_type && pNv->FlatPanel) ||
+ (!monitorA->features.input_type && !pNv->FlatPanel))
+ {
+ if(monitorB) {
+ xfree(monitorB);
+ monitorB = NULL;
+ }
+ } else {
+ xfree(monitorA);
+ monitorA = NULL;
+ }
+ }
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV10Setup\n"));
+ if(monitorB) {
+ if((monitorB->features.input_type && !pNv->FlatPanel) ||
+ (!monitorB->features.input_type && pNv->FlatPanel))
+ {
+ xfree(monitorB);
+ } else {
+ monitorA = monitorB;
+ }
+ monitorB = NULL;
+ }
- pNv->riva.Architecture = 0x10;
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
- pNv->riva.PRAMIN = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00710000, 0x00010000);
- pNv->riva.PCRTC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00600000, 0x00003000);
+ if(implementation == 0x0110)
+ cr44 = pNv->CRTCnumber * 0x3;
- NVCommonSetup(pScrn);
-}
+ pNv->PCRTC0[0x00000860/4] = oldhead;
-void
-NV20Setup(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- CARD32 regBase = pNv->IOAddress;
- int mmioFlags;
+ VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
+ VGA_WR08(pNv->PCIO, 0x03D5, cr44);
+ NVSelectHeadRegisters(pScrn, pNv->CRTCnumber);
+ }
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV20Setup\n"));
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Using %s on CRTC %i\n",
+ pNv->FlatPanel ? (pNv->Television ? "TV" : "DFP") : "CRT",
+ pNv->CRTCnumber);
+
+ if(pNv->FlatPanel && !pNv->Television) {
+ pNv->fpWidth = pNv->PRAMDAC[0x0820/4] + 1;
+ pNv->fpHeight = pNv->PRAMDAC[0x0800/4] + 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Panel size is %i x %i\n",
+ pNv->fpWidth, pNv->fpHeight);
+ }
- pNv->riva.Architecture = 0x20;
- mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
- pNv->riva.PRAMIN = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00710000, 0x00010000);
- pNv->riva.PCRTC0 = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, pNv->PciTag,
- regBase+0x00600000, 0x00003000);
+ if(monitorA)
+ xf86SetDDCproperties(pScrn, monitorA);
- NVCommonSetup(pScrn);
+ if(!pNv->FlatPanel || (pScrn->depth != 24))
+ pNv->FPDither = FALSE;
}
diff --git a/src/nv_type.h b/src/nv_type.h
index 9e9e2bd..5730cb5 100644
--- a/src/nv_type.h
+++ b/src/nv_type.h
@@ -1,15 +1,19 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h,v 1.39 2002/11/28 23:02:13 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h,v 1.44 2003/09/08 20:00:27 mvojkovi Exp $ */
#ifndef __NV_STRUCT_H__
#define __NV_STRUCT_H__
-#include "riva_hw.h"
#include "colormapst.h"
#include "vgaHW.h"
#include "xaa.h"
#include "xf86Cursor.h"
#include "xf86int10.h"
+#define NV_ARCH_04 0x04
+#define NV_ARCH_10 0x10
+#define NV_ARCH_20 0x20
+#define NV_ARCH_30 0x30
+
#define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
#define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
@@ -19,27 +23,6 @@
#define SetBit(n) (1<<(n))
#define Set8Bits(value) ((value)&0xff)
-typedef RIVA_HW_STATE* NVRegPtr;
-
-typedef struct {
- Bool isHwCursor;
- int CursorMaxWidth;
- int CursorMaxHeight;
- int CursorFlags;
- int CursorOffscreenMemSize;
- Bool (*UseHWCursor)(ScreenPtr, CursorPtr);
- void (*LoadCursorImage)(ScrnInfoPtr, unsigned char*);
- void (*ShowCursor)(ScrnInfoPtr);
- void (*HideCursor)(ScrnInfoPtr);
- void (*SetCursorPosition)(ScrnInfoPtr, int, int);
- void (*SetCursorColors)(ScrnInfoPtr, int, int);
- long maxPixelClock;
- void (*LoadPalette)(ScrnInfoPtr, int, int*, LOCO*, VisualPtr);
- void (*Save)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- void (*Restore)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr);
-} NVRamdacRec, *NVRamdacPtr;
-
typedef struct {
int bitsPerPixel;
int depth;
@@ -48,88 +31,136 @@ typedef struct {
DisplayModePtr mode;
} NVFBLayout;
+typedef struct _riva_hw_state
+{
+ U032 bpp;
+ U032 width;
+ U032 height;
+ U032 interlace;
+ U032 repaint0;
+ U032 repaint1;
+ U032 screen;
+ U032 scale;
+ U032 dither;
+ U032 extra;
+ U032 pixel;
+ U032 horiz;
+ U032 arbitration0;
+ U032 arbitration1;
+ U032 pll;
+ U032 pllB;
+ U032 vpll;
+ U032 vpll2;
+ U032 vpllB;
+ U032 vpll2B;
+ U032 pllsel;
+ U032 general;
+ U032 crtcOwner;
+ U032 head;
+ U032 head2;
+ U032 config;
+ U032 cursorConfig;
+ U032 cursor0;
+ U032 cursor1;
+ U032 cursor2;
+} RIVA_HW_STATE, *NVRegPtr;
+
+
typedef struct {
- RIVA_HW_INST riva;
RIVA_HW_STATE SavedReg;
RIVA_HW_STATE ModeReg;
+ RIVA_HW_STATE *CurrentState;
+ CARD32 Architecture;
+ CARD32 CursorStart;
EntityInfoPtr pEnt;
pciVideoPtr PciInfo;
PCITAG PciTag;
- xf86AccessRec Access;
int Chipset;
int ChipRev;
Bool Primary;
CARD32 IOAddress;
unsigned long FbAddress;
- int FbBaseReg;
- unsigned char * IOBase;
unsigned char * FbBase;
unsigned char * FbStart;
- long FbMapSize;
- long FbUsableSize;
- NVRamdacRec Dac;
+ CARD32 FbMapSize;
+ CARD32 FbUsableSize;
+ CARD32 ScratchBufferSize;
+ CARD32 ScratchBufferStart;
Bool NoAccel;
Bool HWCursor;
- Bool ShowCache;
Bool ShadowFB;
unsigned char * ShadowPtr;
int ShadowPitch;
- int MinClock;
- int MaxClock;
+ CARD32 MinVClockFreqKHz;
+ CARD32 MaxVClockFreqKHz;
+ CARD32 CrystalFreqKHz;
+ CARD32 RamAmountKBytes;
+
+ volatile U032 *REGS;
+ volatile U032 *PCRTC0;
+ volatile U032 *PCRTC;
+ volatile U032 *PRAMDAC0;
+ volatile U032 *PFB;
+ volatile U032 *PFIFO;
+ volatile U032 *PGRAPH;
+ volatile U032 *PEXTDEV;
+ volatile U032 *PTIMER;
+ volatile U032 *PMC;
+ volatile U032 *PRAMIN;
+ volatile U032 *FIFO;
+ volatile U032 *CURSOR;
+ volatile U008 *PCIO0;
+ volatile U008 *PCIO;
+ volatile U008 *PVIO;
+ volatile U008 *PDIO0;
+ volatile U008 *PDIO;
+ volatile U032 *PRAMDAC;
+
XAAInfoRecPtr AccelInfoRec;
xf86CursorInfoPtr CursorInfoRec;
DGAModePtr DGAModes;
int numDGAModes;
Bool DGAactive;
int DGAViewportStatus;
- void (*Save)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- void (*Restore)(ScrnInfoPtr, vgaRegPtr, NVRegPtr, Bool);
- Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr);
void (*PointerMoved)(int index, int x, int y);
ScreenBlockHandlerProcPtr BlockHandler;
CloseScreenProcPtr CloseScreen;
Bool FBDev;
- /* Color expansion */
- unsigned char *expandBuffer;
- unsigned char *expandFifo;
- int expandWidth;
- int expandRows;
- CARD32 FgColor;
- CARD32 BgColor;
int Rotate;
NVFBLayout CurrentLayout;
/* Cursor */
CARD32 curFg, curBg;
CARD32 curImage[256];
- /* Misc flags */
- unsigned int opaqueMonochrome;
- int currentRop;
/* I2C / DDC */
- unsigned int (*ddc1Read)(ScrnInfoPtr);
- void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed);
- Bool (*i2cInit)(ScrnInfoPtr);
I2CBusPtr I2C;
xf86Int10InfoPtr pInt;
void (*VideoTimerCallback)(ScrnInfoPtr, Time);
+ void (*DMAKickoffCallback)(ScrnInfoPtr);
XF86VideoAdaptorPtr overlayAdaptor;
+ XF86VideoAdaptorPtr blitAdaptor;
int videoKey;
int FlatPanel;
Bool FPDither;
- Bool SecondCRTC;
- int forceCRTC;
+ Bool Television;
+ int CRTCnumber;
OptionInfoPtr Options;
Bool alphaCursor;
unsigned char DDCBase;
-} NVRec, *NVPtr;
+ Bool twoHeads;
+ Bool twoStagePLL;
+ Bool fpScaler;
+ int fpWidth;
+ int fpHeight;
-#define NVPTR(p) ((NVPtr)((p)->driverPrivate))
+ CARD32 dmaPut;
+ CARD32 dmaCurrent;
+ CARD32 dmaFree;
+ CARD32 dmaMax;
+ CARD32 *dmaBase;
-void NVRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void NVRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void NVRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void NVRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void NVPointerMoved(int index, int x, int y);
+ CARD32 currentRop;
+} NVRec, *NVPtr;
-int RivaGetConfig(NVPtr);
+#define NVPTR(p) ((NVPtr)((p)->driverPrivate))
#endif /* __NV_STRUCT_H__ */
diff --git a/src/nv_video.c b/src/nv_video.c
index e2010a9..3b2eb5b 100644
--- a/src/nv_video.c
+++ b/src/nv_video.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c,v 1.11 2002/11/26 23:41:59 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_video.c,v 1.21 2003/11/10 18:22:24 tsi Exp $ */
#include "xf86.h"
#include "xf86_OSproc.h"
@@ -18,10 +18,10 @@
#include "fourcc.h"
#include "nv_include.h"
+#include "nv_dma.h"
-
-#define OFF_DELAY 450 /* milliseconds */
-#define FREE_DELAY 10000
+#define OFF_DELAY 500 /* milliseconds */
+#define FREE_DELAY 5000
#define OFF_TIMER 0x01
#define FREE_TIMER 0x02
@@ -29,11 +29,7 @@
#define TIMER_MASK (OFF_TIMER | FREE_TIMER)
-
-
-#ifndef XvExtension
-void NVInitVideo(ScreenPtr pScreen) {}
-#else
+#define NUM_BLIT_PORTS 32
typedef struct _NVPortPrivRec {
short brightness;
@@ -49,13 +45,15 @@ typedef struct _NVPortPrivRec {
Time videoTime;
Bool grabbedByV4L;
Bool iturbt_709;
+ Bool blitter;
FBLinearPtr linear;
int pitch;
int offset;
} NVPortPrivRec, *NVPortPrivPtr;
-static XF86VideoAdaptorPtr NVSetupImageVideo(ScreenPtr);
+static XF86VideoAdaptorPtr NVSetupOverlayVideo(ScreenPtr);
+static XF86VideoAdaptorPtr NVSetupBlitVideo(ScreenPtr);
static void NVStopOverlay (ScrnInfoPtr);
static void NVPutOverlayImage(ScrnInfoPtr pScrnInfo,
@@ -69,10 +67,14 @@ static void NVPutOverlayImage(ScrnInfoPtr pScrnInfo,
short dst_w, short dst_h,
RegionPtr cliplist);
-static int NVSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
-static int NVGetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
+static int NVSetOverlayPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
+static int NVGetOverlayPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
+static int NVSetBlitPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
+static int NVGetBlitPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
+
static void NVStopOverlayVideo(ScrnInfoPtr, pointer, Bool);
+static void NVStopBlitVideo(ScrnInfoPtr, pointer, Bool);
static int NVPutImage( ScrnInfoPtr, short, short, short, short, short, short, short, short, int, unsigned char*, short, short, Bool, RegionPtr, pointer);
static void NVQueryBestSize(ScrnInfoPtr, Bool, short, short, short, short, unsigned int *, unsigned int *, pointer);
@@ -127,14 +129,36 @@ XF86AttributeRec NVAttributes[NUM_ATTRIBUTES] =
{XvSettable | XvGettable, 0, 1, "XV_ITURBT_709"}
};
-#define NUM_IMAGES_ALL 4
+#define NUM_IMAGES_YUV 4
+#define NUM_IMAGES_ALL 5
+
+#define FOURCC_RGB 0x0000003
+#define XVIMAGE_RGB \
+ { \
+ FOURCC_RGB, \
+ XvRGB, \
+ LSBFirst, \
+ { 0x03, 0x00, 0x00, 0x00, \
+ 0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, \
+ 32, \
+ XvPacked, \
+ 1, \
+ 24, 0x00ff0000, 0x0000ff00, 0x000000ff, \
+ 0, 0, 0, \
+ 0, 0, 0, \
+ 0, 0, 0, \
+ {'B','G','R','X',\
+ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, \
+ XvTopToBottom \
+ }
static XF86ImageRec NVImages[NUM_IMAGES_ALL] =
{
XVIMAGE_YUY2,
XVIMAGE_YV12,
XVIMAGE_UYVY,
- XVIMAGE_I420
+ XVIMAGE_I420,
+ XVIMAGE_RGB
};
static void
@@ -158,7 +182,6 @@ NVResetVideo (ScrnInfoPtr pScrnInfo)
{
NVPtr pNv = NVPTR(pScrnInfo);
NVPortPrivPtr pPriv = GET_OVERLAY_PRIVATE(pNv);
- RIVA_HW_INST *pRiva = &(pNv->riva);
int satSine, satCosine;
double angle;
@@ -171,11 +194,11 @@ NVResetVideo (ScrnInfoPtr pScrnInfo)
if (satCosine < -1024)
satCosine = -1024;
- pRiva->PMC[0x00008910/4] = (pPriv->brightness << 16) | pPriv->contrast;
- pRiva->PMC[0x00008914/4] = (pPriv->brightness << 16) | pPriv->contrast;
- pRiva->PMC[0x00008918/4] = (satSine << 16) | (satCosine & 0xffff);
- pRiva->PMC[0x0000891C/4] = (satSine << 16) | (satCosine & 0xffff);
- pRiva->PMC[0x00008b00/4] = pPriv->colorKey;
+ pNv->PMC[0x8910/4] = (pPriv->brightness << 16) | pPriv->contrast;
+ pNv->PMC[0x8914/4] = (pPriv->brightness << 16) | pPriv->contrast;
+ pNv->PMC[0x8918/4] = (satSine << 16) | (satCosine & 0xffff);
+ pNv->PMC[0x891C/4] = (satSine << 16) | (satCosine & 0xffff);
+ pNv->PMC[0x8b00/4] = pPriv->colorKey;
}
@@ -184,9 +207,8 @@ static void
NVStopOverlay (ScrnInfoPtr pScrnInfo)
{
NVPtr pNv = NVPTR(pScrnInfo);
- RIVA_HW_INST *pRiva = &(pNv->riva);
- pRiva->PMC[0x00008704/4] = 1;
+ pNv->PMC[0x00008704/4] = 1;
}
static FBLinearPtr
@@ -242,38 +264,60 @@ static void NVFreeOverlayMemory(ScrnInfoPtr pScrnInfo)
}
+static void NVFreeBlitMemory(ScrnInfoPtr pScrnInfo)
+{
+ NVPtr pNv = NVPTR(pScrnInfo);
+ NVPortPrivPtr pPriv = GET_BLIT_PRIVATE(pNv);
+
+ if(pPriv->linear) {
+ xf86FreeOffscreenLinear(pPriv->linear);
+ pPriv->linear = NULL;
+ }
+}
+
+
void NVInitVideo (ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
XF86VideoAdaptorPtr overlayAdaptor = NULL;
+ XF86VideoAdaptorPtr blitAdaptor = NULL;
NVPtr pNv = NVPTR(pScrn);
int num_adaptors;
- if((pScrn->bitsPerPixel != 8) && (pNv->riva.Architecture >= NV_ARCH_10))
- {
- overlayAdaptor = NVSetupImageVideo(pScreen);
+ if((pScrn->bitsPerPixel != 8) && (pNv->Architecture >= NV_ARCH_10)) {
+ overlayAdaptor = NVSetupOverlayVideo(pScreen);
if(overlayAdaptor)
NVInitOffscreenImages(pScreen);
}
+ if((pScrn->bitsPerPixel != 8) && !pNv->NoAccel)
+ blitAdaptor = NVSetupBlitVideo(pScreen);
+
num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
- if(overlayAdaptor) {
- int size = num_adaptors + 1;
+ if(blitAdaptor || overlayAdaptor) {
+ int size = num_adaptors;
- if((newAdaptors = xalloc(size * sizeof(XF86VideoAdaptorPtr*)))) {
- if(num_adaptors)
- memcpy(newAdaptors, adaptors,
- num_adaptors * sizeof(XF86VideoAdaptorPtr));
+ if(overlayAdaptor) size++;
+ if(blitAdaptor) size++;
- if(overlayAdaptor) {
- newAdaptors[num_adaptors] = overlayAdaptor;
- num_adaptors++;
+ if((newAdaptors = xalloc(size * sizeof(XF86VideoAdaptorPtr*)))) {
+ if(num_adaptors) {
+ memcpy(newAdaptors, adaptors,
+ num_adaptors * sizeof(XF86VideoAdaptorPtr));
+ }
+ if(overlayAdaptor) {
+ newAdaptors[num_adaptors] = overlayAdaptor;
+ num_adaptors++;
}
+ if(blitAdaptor) {
+ newAdaptors[num_adaptors] = blitAdaptor;
+ num_adaptors++;
+ }
adaptors = newAdaptors;
- }
+ }
}
if (num_adaptors)
@@ -284,8 +328,63 @@ void NVInitVideo (ScreenPtr pScreen)
}
+static XF86VideoAdaptorPtr
+NVSetupBlitVideo (ScreenPtr pScreen)
+{
+ ScrnInfoPtr pScrnInfo = xf86Screens[pScreen->myNum];
+ NVPtr pNv = NVPTR(pScrnInfo);
+ XF86VideoAdaptorPtr adapt;
+ NVPortPrivPtr pPriv;
+ int i;
+
+ if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
+ sizeof(NVPortPrivRec) +
+ (sizeof(DevUnion) * NUM_BLIT_PORTS))))
+ {
+ return NULL;
+ }
+
+ adapt->type = XvWindowMask | XvInputMask | XvImageMask;
+ adapt->flags = 0;
+ adapt->name = "NV Video Blitter";
+ adapt->nEncodings = 1;
+ adapt->pEncodings = &DummyEncoding;
+ adapt->nFormats = NUM_FORMATS_ALL;
+ adapt->pFormats = NVFormats;
+ adapt->nPorts = NUM_BLIT_PORTS;
+ adapt->pPortPrivates = (DevUnion*)(&adapt[1]);
+
+ pPriv = (NVPortPrivPtr)(&adapt->pPortPrivates[NUM_BLIT_PORTS]);
+ for(i = 0; i < NUM_BLIT_PORTS; i++)
+ adapt->pPortPrivates[i].ptr = (pointer)(pPriv);
+
+ adapt->pAttributes = NULL;
+ adapt->nAttributes = 0;
+ adapt->pImages = NVImages;
+ adapt->nImages = NUM_IMAGES_ALL;
+ adapt->PutVideo = NULL;
+ adapt->PutStill = NULL;
+ adapt->GetVideo = NULL;
+ adapt->GetStill = NULL;
+ adapt->StopVideo = NVStopBlitVideo;
+ adapt->SetPortAttribute = NVSetBlitPortAttribute;
+ adapt->GetPortAttribute = NVGetBlitPortAttribute;
+ adapt->QueryBestSize = NVQueryBestSize;
+ adapt->PutImage = NVPutImage;
+ adapt->QueryImageAttributes = NVQueryImageAttributes;
+
+ pPriv->videoStatus = 0;
+ pPriv->grabbedByV4L = FALSE;
+ pPriv->blitter = TRUE;
+ pPriv->doubleBuffer = FALSE;
+
+ pNv->blitAdaptor = adapt;
+
+ return adapt;
+}
+
static XF86VideoAdaptorPtr
-NVSetupImageVideo (ScreenPtr pScreen)
+NVSetupOverlayVideo (ScreenPtr pScreen)
{
ScrnInfoPtr pScrnInfo = xf86Screens[pScreen->myNum];
NVPtr pNv = NVPTR(pScrnInfo);
@@ -313,14 +412,14 @@ NVSetupImageVideo (ScreenPtr pScreen)
adapt->pAttributes = NVAttributes;
adapt->nAttributes = NUM_ATTRIBUTES;
adapt->pImages = NVImages;
- adapt->nImages = NUM_IMAGES_ALL;
+ adapt->nImages = NUM_IMAGES_YUV;
adapt->PutVideo = NULL;
adapt->PutStill = NULL;
adapt->GetVideo = NULL;
adapt->GetStill = NULL;
adapt->StopVideo = NVStopOverlayVideo;
- adapt->SetPortAttribute = NVSetPortAttribute;
- adapt->GetPortAttribute = NVGetPortAttribute;
+ adapt->SetPortAttribute = NVSetOverlayPortAttribute;
+ adapt->GetPortAttribute = NVGetOverlayPortAttribute;
adapt->QueryBestSize = NVQueryBestSize;
adapt->PutImage = NVPutImage;
adapt->QueryImageAttributes = NVQueryImageAttributes;
@@ -328,11 +427,12 @@ NVSetupImageVideo (ScreenPtr pScreen)
pPriv->videoStatus = 0;
pPriv->currentBuffer = 0;
pPriv->grabbedByV4L = FALSE;
+ pPriv->blitter = FALSE;
NVSetPortDefaults (pScrnInfo, pPriv);
/* gotta uninit this someplace */
- REGION_INIT(pScreen, &pPriv->clip, NullBox, 0);
+ REGION_NULL(pScreen, &pPriv->clip);
pNv->overlayAdaptor = adapt;
@@ -351,41 +451,6 @@ NVSetupImageVideo (ScreenPtr pScreen)
return adapt;
}
-/*
- * RegionsEqual
- */
-static Bool RegionsEqual
-(
- RegionPtr A,
- RegionPtr B
-)
-{
- int *dataA, *dataB;
- int num;
-
- num = REGION_NUM_RECTS(A);
- if (num != REGION_NUM_RECTS(B))
- return FALSE;
-
- if ((A->extents.x1 != B->extents.x1) ||
- (A->extents.x2 != B->extents.x2) ||
- (A->extents.y1 != B->extents.y1) ||
- (A->extents.y2 != B->extents.y2))
- return FALSE;
-
- dataA = (int*)REGION_RECTS(A);
- dataB = (int*)REGION_RECTS(B);
-
- while(num--)
- {
- if((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
- return FALSE;
- dataA += 2;
- dataB += 2;
- }
- return TRUE;
-}
-
static void
NVPutOverlayImage (
ScrnInfoPtr pScrnInfo,
@@ -408,12 +473,12 @@ NVPutOverlayImage (
{
NVPtr pNv = NVPTR(pScrnInfo);
NVPortPrivPtr pPriv = GET_OVERLAY_PRIVATE(pNv);
- RIVA_HW_INST *pRiva = &(pNv->riva);
int buffer = pPriv->currentBuffer;
/* paint the color key */
if(pPriv->autopaintColorKey &&
- (pPriv->grabbedByV4L || !RegionsEqual(&pPriv->clip, clipBoxes)))
+ (pPriv->grabbedByV4L ||
+ !REGION_EQUAL(pScrnInfo->pScreen, &pPriv->clip, clipBoxes)))
{
/* we always paint V4L's color key */
if(!pPriv->grabbedByV4L)
@@ -421,13 +486,19 @@ NVPutOverlayImage (
xf86XVFillKeyHelper(pScrnInfo->pScreen, pPriv->colorKey, clipBoxes);
}
- pRiva->PMC[(0x8900/4) + buffer] = offset;
- pRiva->PMC[(0x8928/4) + buffer] = (height << 16) | width;
- pRiva->PMC[(0x8930/4) + buffer] = ((y1 << 4) & 0xffff0000) | (x1 >> 12);
- pRiva->PMC[(0x8938/4) + buffer] = (src_w << 20) / drw_w;
- pRiva->PMC[(0x8940/4) + buffer] = (src_h << 20) / drw_h;
- pRiva->PMC[(0x8948/4) + buffer] = (dstBox->y1 << 16) | dstBox->x1;
- pRiva->PMC[(0x8950/4) + buffer] = ((dstBox->y2 - dstBox->y1) << 16) |
+ if(pNv->CurrentLayout.mode->Flags & V_DBLSCAN) {
+ dstBox->y1 <<= 1;
+ dstBox->y2 <<= 1;
+ drw_h <<= 1;
+ }
+
+ pNv->PMC[(0x8900/4) + buffer] = offset;
+ pNv->PMC[(0x8928/4) + buffer] = (height << 16) | width;
+ pNv->PMC[(0x8930/4) + buffer] = ((y1 << 4) & 0xffff0000) | (x1 >> 12);
+ pNv->PMC[(0x8938/4) + buffer] = (src_w << 20) / drw_w;
+ pNv->PMC[(0x8940/4) + buffer] = (src_h << 20) / drw_h;
+ pNv->PMC[(0x8948/4) + buffer] = (dstBox->y1 << 16) | dstBox->x1;
+ pNv->PMC[(0x8950/4) + buffer] = ((dstBox->y2 - dstBox->y1) << 16) |
(dstBox->x2 - dstBox->x1);
dstPitch |= 1 << 20; /* use color key */
@@ -437,15 +508,105 @@ NVPutOverlayImage (
if(pPriv->iturbt_709)
dstPitch |= 1 << 24;
- pRiva->PMC[(0x8958/4) + buffer] = dstPitch;
- pRiva->PMC[0x00008704/4] = 0;
- pRiva->PMC[0x8700/4] = 1 << (buffer << 2);
+ pNv->PMC[(0x8958/4) + buffer] = dstPitch;
+ pNv->PMC[0x00008704/4] = 0;
+ pNv->PMC[0x8700/4] = 1 << (buffer << 2);
pPriv->videoStatus = CLIENT_VIDEO_ON;
}
+static void
+NVPutBlitImage (
+ ScrnInfoPtr pScrnInfo,
+ int offset,
+ int id,
+ int dstPitch,
+ BoxPtr dstBox,
+ int x1,
+ int y1,
+ int x2,
+ int y2,
+ short width,
+ short height,
+ short src_w,
+ short src_h,
+ short drw_w,
+ short drw_h,
+ RegionPtr clipBoxes
+)
+{
+ NVPtr pNv = NVPTR(pScrnInfo);
+ NVPortPrivPtr pPriv = GET_BLIT_PRIVATE(pNv);
+ BoxPtr pbox = REGION_RECTS(clipBoxes);
+ int nbox = REGION_NUM_RECTS(clipBoxes);
+ CARD32 dsdx, dtdy, size, point, srcpoint, format;
+
+ dsdx = (src_w << 20) / drw_w;
+ dtdy = (src_h << 20) / drw_h;
+
+ size = ((dstBox->y2 - dstBox->y1) << 16) | (dstBox->x2 - dstBox->x1);
+ point = (dstBox->y1 << 16) | dstBox->x1;
+
+ dstPitch |= (STRETCH_BLIT_SRC_FORMAT_ORIGIN_CENTER << 16) |
+ (STRETCH_BLIT_SRC_FORMAT_FILTER_BILINEAR << 24);
+
+ srcpoint = ((y1 << 4) & 0xffff0000) | (x1 >> 12);
+
+ switch(id) {
+ case FOURCC_RGB:
+ format = STRETCH_BLIT_FORMAT_X8R8G8B8;
+ break;
+ case FOURCC_UYVY:
+ format = STRETCH_BLIT_FORMAT_UYVY;
+ break;
+ default:
+ format = STRETCH_BLIT_FORMAT_YUYV;
+ break;
+ }
+
+ if(pNv->CurrentLayout.depth == 15) {
+ NVDmaStart(pNv, SURFACE_FORMAT, 1);
+ NVDmaNext (pNv, SURFACE_FORMAT_DEPTH15);
+ }
+
+ NVDmaStart(pNv, STRETCH_BLIT_FORMAT, 1);
+ NVDmaNext (pNv, format);
+
+ while(nbox--) {
+ NVDmaStart(pNv, RECT_SOLID_COLOR, 1);
+ NVDmaNext (pNv, 0);
+
+ NVDmaStart(pNv, STRETCH_BLIT_CLIP_POINT, 6);
+ NVDmaNext (pNv, (pbox->y1 << 16) | pbox->x1);
+ NVDmaNext (pNv, ((pbox->y2 - pbox->y1) << 16) | (pbox->x2 - pbox->x1));
+ NVDmaNext (pNv, point);
+ NVDmaNext (pNv, size);
+ NVDmaNext (pNv, dsdx);
+ NVDmaNext (pNv, dtdy);
+
+ NVDmaStart(pNv, STRETCH_BLIT_SRC_SIZE, 4);
+ NVDmaNext (pNv, (height << 16) | width);
+ NVDmaNext (pNv, dstPitch);
+ NVDmaNext (pNv, offset);
+ NVDmaNext (pNv, srcpoint);
+ pbox++;
+ }
+
+ if(pNv->CurrentLayout.depth == 15) {
+ NVDmaStart(pNv, SURFACE_FORMAT, 1);
+ NVDmaNext (pNv, SURFACE_FORMAT_DEPTH16);
+ }
+
+ NVDmaKickoff(pNv);
+ SET_SYNC_FLAG(pNv->AccelInfoRec);
+
+ pPriv->videoStatus = FREE_TIMER;
+ pPriv->videoTime = currentTime.milliseconds + FREE_DELAY;
+ pNv->VideoTimerCallback = NVVideoTimerCallback;
+}
+
/*
* StopVideo
*/
@@ -463,18 +624,13 @@ static void NVStopOverlayVideo
REGION_EMPTY(pScrnInfo->pScreen, &pPriv->clip);
- if(Exit)
- {
+ if(Exit) {
if(pPriv->videoStatus & CLIENT_VIDEO_ON)
NVStopOverlay(pScrnInfo);
NVFreeOverlayMemory(pScrnInfo);
pPriv->videoStatus = 0;
- pNv->VideoTimerCallback = NULL;
- }
- else
- {
- if(pPriv->videoStatus & CLIENT_VIDEO_ON)
- {
+ } else {
+ if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
pPriv->videoStatus = OFF_TIMER | CLIENT_VIDEO_ON;
pPriv->videoTime = currentTime.milliseconds + OFF_DELAY;
pNv->VideoTimerCallback = NVVideoTimerCallback;
@@ -482,9 +638,16 @@ static void NVStopOverlayVideo
}
}
+static void NVStopBlitVideo
+(
+ ScrnInfoPtr pScrnInfo,
+ pointer data,
+ Bool Exit
+)
+{
+}
-
-static int NVSetPortAttribute
+static int NVSetOverlayPortAttribute
(
ScrnInfoPtr pScrnInfo,
Atom attribute,
@@ -554,9 +717,7 @@ static int NVSetPortAttribute
}
-
-
-static int NVGetPortAttribute
+static int NVGetOverlayPortAttribute
(
ScrnInfoPtr pScrnInfo,
Atom attribute,
@@ -588,6 +749,28 @@ static int NVGetPortAttribute
return Success;
}
+static int NVSetBlitPortAttribute
+(
+ ScrnInfoPtr pScrnInfo,
+ Atom attribute,
+ INT32 value,
+ pointer data
+)
+{
+ return BadMatch;
+}
+
+static int NVGetBlitPortAttribute
+(
+ ScrnInfoPtr pScrnInfo,
+ Atom attribute,
+ INT32 *value,
+ pointer data
+)
+{
+ return BadMatch;
+}
+
/*
* QueryBestSize
@@ -613,30 +796,7 @@ static void NVQueryBestSize
*p_w = drw_w;
*p_h = drw_h;
}
-/*
- * CopyData
- */
-static void NVCopyData422
-(
- unsigned char *src,
- unsigned char *dst,
- int srcPitch,
- int dstPitch,
- int h,
- int w
-)
-{
- w <<= 1;
- while(h--)
- {
- memcpy(dst, src, w);
- src += srcPitch;
- dst += dstPitch;
- }
-}
-/*
- * CopyMungedData
- */
+
static void NVCopyData420
(
unsigned char *src1,
@@ -694,6 +854,83 @@ static void NVCopyData420
}
}
}
+
+
+static void NVMoveDWORDS(
+ CARD32* dest,
+ CARD32* src,
+ int dwords )
+{
+ while(dwords & ~0x03) {
+ *dest = *src;
+ *(dest + 1) = *(src + 1);
+ *(dest + 2) = *(src + 2);
+ *(dest + 3) = *(src + 3);
+ src += 4;
+ dest += 4;
+ dwords -= 4;
+ }
+ if(!dwords) return;
+ *dest = *src;
+ if(dwords == 1) return;
+ *(dest + 1) = *(src + 1);
+ if(dwords == 2) return;
+ *(dest + 2) = *(src + 2);
+}
+
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+static void NVMoveDWORDSSwapped(
+ CARD32* dest,
+ CARD8* src,
+ int dwords )
+{
+ while(dwords--) {
+ *dest++ = (src[3] << 24) | (src[2] << 16) | (src[1] << 8) | src[0];
+ src += 4;
+ }
+}
+#endif
+
+static void NVCopyData422
+(
+ unsigned char *src,
+ unsigned char *dst,
+ int srcPitch,
+ int dstPitch,
+ int h,
+ int w
+)
+{
+ w >>= 1; /* pixels to DWORDS */
+ while(h--) {
+ NVMoveDWORDS((CARD32*)dst, (CARD32*)src, w);
+ src += srcPitch;
+ dst += dstPitch;
+ }
+}
+
+static void NVCopyDataRGB
+(
+ unsigned char *src,
+ unsigned char *dst,
+ int srcPitch,
+ int dstPitch,
+ int h,
+ int w
+)
+{
+ while(h--) {
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ NVMoveDWORDSSwapped((CARD32*)dst, (CARD8*)src, w);
+#else
+ NVMoveDWORDS((CARD32*)dst, (CARD32*)src, w);
+#endif
+ src += srcPitch;
+ dst += dstPitch;
+ }
+}
+
+
/*
* PutImage
*/
@@ -721,9 +958,9 @@ static int NVPutImage
NVPtr pNv = NVPTR(pScrnInfo);
INT32 xa, xb, ya, yb;
unsigned char *dst_start;
- int pitch, newSize, offset, s2offset, s3offset;
+ int newSize, offset, s2offset, s3offset;
int srcPitch, srcPitch2, dstPitch;
- int top, left, npixels, nlines, bpp;
+ int top, left, right, bottom, npixels, nlines, bpp;
Bool skip = FALSE;
BoxRec dstBox;
CARD32 tmp;
@@ -744,10 +981,12 @@ static int NVPutImage
/* make the compiler happy */
s2offset = s3offset = srcPitch2 = 0;
- if(src_w > (drw_w << 3))
- drw_w = src_w >> 3;
- if(src_h > (drw_h << 3))
- drw_h = src_h >> 3;
+ if(!pPriv->blitter) {
+ if(src_w > (drw_w << 3))
+ drw_w = src_w >> 3;
+ if(src_h > (drw_h << 3))
+ drw_h = src_h >> 3;
+ }
/* Clip */
xa = src_x;
@@ -764,15 +1003,14 @@ static int NVPutImage
width, height))
return Success;
- dstBox.x1 -= pScrnInfo->frameX0;
- dstBox.x2 -= pScrnInfo->frameX0;
- dstBox.y1 -= pScrnInfo->frameY0;
- dstBox.y2 -= pScrnInfo->frameY0;
+ if(!pPriv->blitter) {
+ dstBox.x1 -= pScrnInfo->frameX0;
+ dstBox.x2 -= pScrnInfo->frameX0;
+ dstBox.y1 -= pScrnInfo->frameY0;
+ dstBox.y2 -= pScrnInfo->frameY0;
+ }
bpp = pScrnInfo->bitsPerPixel >> 3;
- pitch = bpp * pScrnInfo->displayWidth;
-
- dstPitch = ((width << 1) + 63) & ~63;
switch(id) {
case FOURCC_YV12:
@@ -781,12 +1019,19 @@ static int NVPutImage
s2offset = srcPitch * height;
srcPitch2 = ((width >> 1) + 3) & ~3;
s3offset = (srcPitch2 * (height >> 1)) + s2offset;
+ dstPitch = ((width << 1) + 63) & ~63;
break;
case FOURCC_UYVY:
case FOURCC_YUY2:
- default:
- srcPitch = (width << 1);
+ srcPitch = width << 1;
+ dstPitch = ((width << 1) + 63) & ~63;
+ break;
+ case FOURCC_RGB:
+ srcPitch = width << 2;
+ dstPitch = ((width << 2) + 63) & ~63;
break;
+ default:
+ return BadImplementation;
}
newSize = height * dstPitch / bpp;
@@ -803,15 +1048,14 @@ static int NVPutImage
offset = pPriv->linear->offset * bpp;
if(pPriv->doubleBuffer) {
- RIVA_HW_INST *pRiva = &(pNv->riva);
int mask = 1 << (pPriv->currentBuffer << 2);
#if 0
/* burn the CPU until the next buffer is available */
- while(pRiva->PMC[0x00008700/4] & mask);
+ while(pNv->PMC[0x00008700/4] & mask);
#else
/* overwrite the newest buffer if there's not one free */
- if(pRiva->PMC[0x00008700/4] & mask) {
+ if(pNv->PMC[0x00008700/4] & mask) {
if(!pPriv->currentBuffer)
offset += (newSize * bpp) >> 1;
skip = TRUE;
@@ -823,15 +1067,28 @@ static int NVPutImage
dst_start = pNv->FbStart + offset;
- /* copy data */
- top = ya >> 16;
- left = (xa >> 16) & ~1;
- npixels = ((((xb + 0xffff) >> 16) + 1) & ~1) - left;
+ /* We need to enlarge the copied rectangle by a pixel so the HW
+ filtering doesn't pick up junk laying outside of the source */
+
+ left = (xa - 0x00010000) >> 16;
+ if(left < 0) left = 0;
+ top = (ya - 0x00010000) >> 16;
+ if(top < 0) top = 0;
+ right = (xb + 0x0001ffff) >> 16;
+ if(right > width) right = width;
+ bottom = (yb + 0x0001ffff) >> 16;
+ if(bottom > height) bottom = height;
+
+ if(pPriv->blitter) NVSync(pScrnInfo);
switch(id) {
case FOURCC_YV12:
case FOURCC_I420:
+ left &= ~1;
+ npixels = ((right + 1) & ~1) - left;
top &= ~1;
+ nlines = ((bottom + 1) & ~1) - top;
+
dst_start += (left << 1) + (top * dstPitch);
tmp = ((top >> 1) * srcPitch2) + (left >> 1);
s2offset += tmp;
@@ -841,27 +1098,50 @@ static int NVPutImage
s2offset = s3offset;
s3offset = tmp;
}
- nlines = ((((yb + 0xffff) >> 16) + 1) & ~1) - top;
- NVCopyData420(buf + (top * srcPitch) + left, buf + s2offset,
- buf + s3offset, dst_start, srcPitch, srcPitch2,
- dstPitch, nlines, npixels);
+ NVCopyData420(buf + (top * srcPitch) + left,
+ buf + s2offset, buf + s3offset,
+ dst_start, srcPitch, srcPitch2,
+ dstPitch, nlines, npixels);
break;
case FOURCC_UYVY:
case FOURCC_YUY2:
- default:
+ left &= ~1;
+ npixels = ((right + 1) & ~1) - left;
+ nlines = bottom - top;
+
left <<= 1;
buf += (top * srcPitch) + left;
- nlines = ((yb + 0xffff) >> 16) - top;
dst_start += left + (top * dstPitch);
+
NVCopyData422(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
break;
+ case FOURCC_RGB:
+ npixels = right - left;
+ nlines = bottom - top;
+
+ left <<= 2;
+ buf += (top * srcPitch) + left;
+ dst_start += left + (top * dstPitch);
+
+ NVCopyDataRGB(buf, dst_start, srcPitch, dstPitch, nlines, npixels);
+ break;
+ default:
+ return BadImplementation;
}
if(!skip) {
- NVPutOverlayImage(pScrnInfo, offset, id, dstPitch, &dstBox,
- xa, ya, xb, yb,
- width, height, src_w, src_h, drw_w, drw_h, clipBoxes);
- pPriv->currentBuffer ^= 1;
+ if(pPriv->blitter) {
+ NVPutBlitImage(pScrnInfo, offset, id, dstPitch, &dstBox,
+ xa, ya, xb, yb,
+ width, height, src_w, src_h, drw_w, drw_h,
+ clipBoxes);
+ } else {
+ NVPutOverlayImage(pScrnInfo, offset, id, dstPitch, &dstBox,
+ xa, ya, xb, yb,
+ width, height, src_w, src_h, drw_w, drw_h,
+ clipBoxes);
+ pPriv->currentBuffer ^= 1;
+ }
}
return Success;
@@ -912,12 +1192,20 @@ static int NVQueryImageAttributes
break;
case FOURCC_UYVY:
case FOURCC_YUY2:
- default:
size = *w << 1;
if (pitches)
pitches[0] = size;
size *= *h;
break;
+ case FOURCC_RGB:
+ size = *w << 2;
+ if(pitches)
+ pitches[0] = size;
+ size *= *h;
+ break;
+ default:
+ *w = *h = size = 0;
+ break;
}
return size;
}
@@ -930,8 +1218,8 @@ static void NVVideoTimerCallback
{
NVPtr pNv = NVPTR(pScrnInfo);
NVPortPrivPtr pOverPriv = NULL;
-
- pNv->VideoTimerCallback = NULL;
+ NVPortPrivPtr pBlitPriv = NULL;
+ Bool needCallback = FALSE;
if(!pScrnInfo->vtSema) return;
@@ -941,21 +1229,39 @@ static void NVVideoTimerCallback
pOverPriv = NULL;
}
+ if(pNv->blitAdaptor) {
+ pBlitPriv = GET_BLIT_PRIVATE(pNv);
+ if(!pBlitPriv->videoStatus)
+ pBlitPriv = NULL;
+ }
+
if(pOverPriv) {
if(pOverPriv->videoTime < currentTime) {
if(pOverPriv->videoStatus & OFF_TIMER) {
NVStopOverlay(pScrnInfo);
pOverPriv->videoStatus = FREE_TIMER;
pOverPriv->videoTime = currentTime + FREE_DELAY;
- pNv->VideoTimerCallback = NVVideoTimerCallback;
+ needCallback = TRUE;
} else
if(pOverPriv->videoStatus & FREE_TIMER) {
NVFreeOverlayMemory(pScrnInfo);
pOverPriv->videoStatus = 0;
}
- } else
- pNv->VideoTimerCallback = NVVideoTimerCallback;
+ } else {
+ needCallback = TRUE;
+ }
}
+
+ if(pBlitPriv) {
+ if(pBlitPriv->videoTime < currentTime) {
+ NVFreeBlitMemory(pScrnInfo);
+ pBlitPriv->videoStatus = 0;
+ } else {
+ needCallback = TRUE;
+ }
+ }
+
+ pNv->VideoTimerCallback = needCallback ? NVVideoTimerCallback : NULL;
}
@@ -973,7 +1279,6 @@ NVAllocSurface (
{
NVPtr pNv = NVPTR(pScrnInfo);
NVPortPrivPtr pPriv = GET_OVERLAY_PRIVATE(pNv);
- CARD8 *address;
int size, bpp;
bpp = pScrnInfo->bitsPerPixel >> 3;
@@ -992,7 +1297,6 @@ NVAllocSurface (
if(!pPriv->linear) return BadAlloc;
pPriv->offset = pPriv->linear->offset * bpp;
- address = pPriv->offset + pNv->FbStart;
surface->width = w;
surface->height = h;
@@ -1006,7 +1310,6 @@ NVAllocSurface (
NVStopOverlay(pScrnInfo);
pPriv->videoStatus = 0;
REGION_EMPTY(pScrnInfo->pScreen, &pPriv->clip);
- pNv->VideoTimerCallback = NULL;
pPriv->grabbedByV4L = TRUE;
return Success;
@@ -1049,7 +1352,7 @@ NVGetSurfaceAttribute (
NVPtr pNv = NVPTR(pScrnInfo);
NVPortPrivPtr pPriv = GET_OVERLAY_PRIVATE(pNv);
- return NVGetPortAttribute(pScrnInfo, attribute, value, (pointer)pPriv);
+ return NVGetOverlayPortAttribute(pScrnInfo, attribute, value, (pointer)pPriv);
}
static int
@@ -1062,7 +1365,7 @@ NVSetSurfaceAttribute(
NVPtr pNv = NVPTR(pScrnInfo);
NVPortPrivPtr pPriv = GET_OVERLAY_PRIVATE(pNv);
- return NVSetPortAttribute(pScrnInfo, attribute, value, (pointer)pPriv);
+ return NVSetOverlayPortAttribute(pScrnInfo, attribute, value, (pointer)pPriv);
}
static int
@@ -1154,7 +1457,3 @@ NVInitOffscreenImages (ScreenPtr pScreen)
{
xf86XVRegisterOffscreenImages(pScreen, NVOffscreenImages, 2);
}
-
-#endif
-
-
diff --git a/src/nv_xaa.c b/src/nv_xaa.c
index e4400b6..e237abb 100644
--- a/src/nv_xaa.c
+++ b/src/nv_xaa.c
@@ -1,7 +1,6 @@
-/* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
/***************************************************************************\
|* *|
-|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
|* *|
|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
|* international laws. Users and possessors of this source code are *|
@@ -12,7 +11,7 @@
|* tion and internal comments to the code, notices to the end user *|
|* as follows: *|
|* *|
-|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
+|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
|* *|
|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
@@ -38,357 +37,540 @@
|* *|
\***************************************************************************/
-/* Hacked together from mga driver and 3.3.4 NVIDIA driver by
- Jarno Paananen <jpaana@s2.org> */
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c,v 1.29 2003/02/12 21:26:27 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_xaa.c,v 1.34 2003/10/15 20:28:31 mvojkovi Exp $ */
#include "nv_include.h"
#include "xaalocal.h"
-#include "xaarop.h"
-
#include "miline.h"
+#include "nv_dma.h"
-static void
-NVSetClippingRectangle(ScrnInfoPtr pScrn, int x1, int y1, int x2, int y2)
+static const int NVCopyROP[16] =
{
- int height = y2-y1 + 1;
- int width = x2-x1 + 1;
- NVPtr pNv = NVPTR(pScrn);
+ 0x00, /* GXclear */
+ 0x88, /* GXand */
+ 0x44, /* GXandReverse */
+ 0xCC, /* GXcopy */
+ 0x22, /* GXandInverted */
+ 0xAA, /* GXnoop */
+ 0x66, /* GXxor */
+ 0xEE, /* GXor */
+ 0x11, /* GXnor */
+ 0x99, /* GXequiv */
+ 0x55, /* GXinvert*/
+ 0xDD, /* GXorReverse */
+ 0x33, /* GXcopyInverted */
+ 0xBB, /* GXorInverted */
+ 0x77, /* GXnand */
+ 0xFF /* GXset */
+};
+
+static const int NVCopyROP_PM[16] =
+{
+ 0x0A, /* GXclear */
+ 0x8A, /* GXand */
+ 0x4A, /* GXandReverse */
+ 0xCA, /* GXcopy */
+ 0x2A, /* GXandInverted */
+ 0xAA, /* GXnoop */
+ 0x6A, /* GXxor */
+ 0xEA, /* GXor */
+ 0x1A, /* GXnor */
+ 0x9A, /* GXequiv */
+ 0x5A, /* GXinvert*/
+ 0xDA, /* GXorReverse */
+ 0x3A, /* GXcopyInverted */
+ 0xBA, /* GXorInverted */
+ 0x7A, /* GXnand */
+ 0xFA /* GXset */
+};
+
+static const int NVPatternROP[16] =
+{
+ 0x00,
+ 0xA0,
+ 0x50,
+ 0xF0,
+ 0x0A,
+ 0xAA,
+ 0x5A,
+ 0xFA,
+ 0x05,
+ 0xA5,
+ 0x55,
+ 0xF5,
+ 0x0F,
+ 0xAF,
+ 0x5F,
+ 0xFF
+};
- RIVA_FIFO_FREE(pNv->riva, Clip, 2);
- pNv->riva.Clip->TopLeft = (y1 << 16) | (x1 & 0xffff);
- pNv->riva.Clip->WidthHeight = (height << 16) | width;
+void
+NVDmaKickoff(NVPtr pNv)
+{
+ if(pNv->dmaCurrent != pNv->dmaPut) {
+ pNv->dmaPut = pNv->dmaCurrent;
+ WRITE_PUT(pNv, pNv->dmaPut);
+ }
}
-static void
-NVDisableClipping(ScrnInfoPtr pScrn)
-{
- NVSetClippingRectangle(pScrn, 0, 0, 0x7fff, 0x7fff);
+/* There is a HW race condition with videoram command buffers.
+ You can't jump to the location of your put offset. We write put
+ at the jump offset + SKIPS dwords with noop padding in between
+ to solve this problem */
+#define SKIPS 8
+
+void
+NVDmaWait (
+ NVPtr pNv,
+ int size
+){
+ int dmaGet;
+
+ size++;
+
+ while(pNv->dmaFree < size) {
+ dmaGet = READ_GET(pNv);
+
+ if(pNv->dmaPut >= dmaGet) {
+ pNv->dmaFree = pNv->dmaMax - pNv->dmaCurrent;
+ if(pNv->dmaFree < size) {
+ NVDmaNext(pNv, 0x20000000);
+ if(dmaGet <= SKIPS) {
+ if(pNv->dmaPut <= SKIPS) /* corner case - will be idle */
+ WRITE_PUT(pNv, SKIPS + 1);
+ do { dmaGet = READ_GET(pNv); }
+ while(dmaGet <= SKIPS);
+ }
+ WRITE_PUT(pNv, SKIPS);
+ pNv->dmaCurrent = pNv->dmaPut = SKIPS;
+ pNv->dmaFree = dmaGet - (SKIPS + 1);
+ }
+ } else
+ pNv->dmaFree = dmaGet - pNv->dmaCurrent - 1;
+ }
}
-/*
- * Set pattern. Internal routine. The upper bits of the colors
- * are the ALPHA bits. 0 == transparency.
- */
-static void
-NVSetPattern(NVPtr pNv, int clr0, int clr1, int pat0, int pat1)
+/*
+ currentRop = 0-15 solid fill
+ 16-31 8x8 pattern fill
+ 32-47 solid fill with planemask
+*/
+
+static void
+NVSetPattern(
+ ScrnInfoPtr pScrn,
+ CARD32 clr0,
+ CARD32 clr1,
+ CARD32 pat0,
+ CARD32 pat1
+)
{
- RIVA_FIFO_FREE(pNv->riva, Patt, 5);
- pNv->riva.Patt->Shape = 0; /* 0 = 8X8, 1 = 64X1, 2 = 1X64 */
- pNv->riva.Patt->Color0 = clr0;
- pNv->riva.Patt->Color1 = clr1;
- pNv->riva.Patt->Monochrome[0] = pat0;
- pNv->riva.Patt->Monochrome[1] = pat1;
+ NVPtr pNv = NVPTR(pScrn);
+
+ NVDmaStart(pNv, PATTERN_COLOR_0, 4);
+ NVDmaNext (pNv, clr0);
+ NVDmaNext (pNv, clr1);
+ NVDmaNext (pNv, pat0);
+ NVDmaNext (pNv, pat1);
}
-/*
- * Set ROP. Translate X rop into ROP3. Internal routine.
- */
-static void
-NVSetRopSolid(NVPtr pNv, int rop)
-{
- if (pNv->currentRop != rop)
- {
- if (pNv->currentRop > 16)
- NVSetPattern(pNv, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF);
+static void
+NVSetRopSolid(ScrnInfoPtr pScrn, CARD32 rop, CARD32 planemask)
+{
+ NVPtr pNv = NVPTR(pScrn);
+
+ if(planemask != ~0) {
+ NVSetPattern(pScrn, 0, planemask, ~0, ~0);
+ if(pNv->currentRop != (rop + 32)) {
+ NVDmaStart(pNv, ROP_SET, 1);
+ NVDmaNext (pNv, NVCopyROP_PM[rop]);
+ pNv->currentRop = rop + 32;
+ }
+ } else
+ if (pNv->currentRop != rop) {
+ if(pNv->currentRop >= 16)
+ NVSetPattern(pScrn, ~0, ~0, ~0, ~0);
+ NVDmaStart(pNv, ROP_SET, 1);
+ NVDmaNext (pNv, NVCopyROP[rop]);
pNv->currentRop = rop;
- RIVA_FIFO_FREE(pNv->riva, Rop, 1);
- pNv->riva.Rop->Rop3 = XAACopyROP[rop];
}
}
-static void
-NVSetRopPattern(NVPtr pNv, int rop)
+void NVResetGraphics(ScrnInfoPtr pScrn)
{
- if (pNv->currentRop != rop + 16)
- {
- pNv->currentRop = rop + 16; /* +16 is important */
- RIVA_FIFO_FREE(pNv->riva, Rop, 1);
- pNv->riva.Rop->Rop3 = XAAPatternROP[rop];
+ NVPtr pNv = NVPTR(pScrn);
+ CARD32 surfaceFormat, patternFormat, rectFormat, lineFormat;
+ int pitch, i;
+
+ if(pNv->NoAccel) return;
+
+ pitch = pNv->CurrentLayout.displayWidth *
+ (pNv->CurrentLayout.bitsPerPixel >> 3);
+
+ pNv->dmaBase = (CARD32*)(&pNv->FbStart[pNv->FbUsableSize]);
+
+ for(i = 0; i < SKIPS; i++)
+ pNv->dmaBase[i] = 0x00000000;
+
+ pNv->dmaBase[0x0 + SKIPS] = 0x00040000;
+ pNv->dmaBase[0x1 + SKIPS] = 0x80000010;
+ pNv->dmaBase[0x2 + SKIPS] = 0x00042000;
+ pNv->dmaBase[0x3 + SKIPS] = 0x80000011;
+ pNv->dmaBase[0x4 + SKIPS] = 0x00044000;
+ pNv->dmaBase[0x5 + SKIPS] = 0x80000012;
+ pNv->dmaBase[0x6 + SKIPS] = 0x00046000;
+ pNv->dmaBase[0x7 + SKIPS] = 0x80000013;
+ pNv->dmaBase[0x8 + SKIPS] = 0x00048000;
+ pNv->dmaBase[0x9 + SKIPS] = 0x80000014;
+ pNv->dmaBase[0xA + SKIPS] = 0x0004A000;
+ pNv->dmaBase[0xB + SKIPS] = 0x80000015;
+ pNv->dmaBase[0xC + SKIPS] = 0x0004C000;
+ pNv->dmaBase[0xD + SKIPS] = 0x80000016;
+ pNv->dmaBase[0xE + SKIPS] = 0x0004E000;
+ pNv->dmaBase[0xF + SKIPS] = 0x80000017;
+
+ pNv->dmaPut = 0;
+ pNv->dmaCurrent = 16 + SKIPS;
+ pNv->dmaMax = 8191;
+ pNv->dmaFree = pNv->dmaMax - pNv->dmaCurrent;
+
+ switch(pNv->CurrentLayout.depth) {
+ case 24:
+ surfaceFormat = SURFACE_FORMAT_DEPTH24;
+ patternFormat = PATTERN_FORMAT_DEPTH24;
+ rectFormat = RECT_FORMAT_DEPTH24;
+ lineFormat = LINE_FORMAT_DEPTH24;
+ break;
+ case 16:
+ case 15:
+ surfaceFormat = SURFACE_FORMAT_DEPTH16;
+ patternFormat = PATTERN_FORMAT_DEPTH16;
+ rectFormat = RECT_FORMAT_DEPTH16;
+ lineFormat = LINE_FORMAT_DEPTH16;
+ break;
+ default:
+ surfaceFormat = SURFACE_FORMAT_DEPTH8;
+ patternFormat = PATTERN_FORMAT_DEPTH8;
+ rectFormat = RECT_FORMAT_DEPTH8;
+ lineFormat = LINE_FORMAT_DEPTH8;
+ break;
}
+
+ NVDmaStart(pNv, SURFACE_FORMAT, 4);
+ NVDmaNext (pNv, surfaceFormat);
+ NVDmaNext (pNv, pitch | (pitch << 16));
+ NVDmaNext (pNv, 0);
+ NVDmaNext (pNv, 0);
+
+ NVDmaStart(pNv, PATTERN_FORMAT, 1);
+ NVDmaNext (pNv, patternFormat);
+
+ NVDmaStart(pNv, RECT_FORMAT, 1);
+ NVDmaNext (pNv, rectFormat);
+
+ NVDmaStart(pNv, LINE_FORMAT, 1);
+ NVDmaNext (pNv, lineFormat);
+
+ pNv->currentRop = ~0; /* set to something invalid */
+ NVSetRopSolid(pScrn, GXcopy, ~0);
+
+ NVDmaKickoff(pNv);
}
-/*
- * Fill solid rectangles.
- */
-static
-void NVSetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
- unsigned planemask)
+void NVSync(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
- NVSetRopSolid(pNv, rop);
- RIVA_FIFO_FREE(pNv->riva, Bitmap, 1);
- pNv->riva.Bitmap->Color1A = color;
+ if(pNv->DMAKickoffCallback)
+ (*pNv->DMAKickoffCallback)(pScrn);
+
+ while(READ_GET(pNv) != pNv->dmaPut);
+
+ while(pNv->PGRAPH[0x0700/4]);
}
static void
-NVSubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h)
+NVDMAKickoffCallback (ScrnInfoPtr pScrn)
{
- NVPtr pNv = NVPTR(pScrn);
-
- RIVA_FIFO_FREE(pNv->riva, Bitmap, 2);
- pNv->riva.Bitmap->UnclippedRectangle[0].TopLeft = (x << 16) | y;
- write_mem_barrier();
- pNv->riva.Bitmap->UnclippedRectangle[0].WidthHeight = (w << 16) | h;
- write_mem_barrier();
+ NVPtr pNv = NVPTR(pScrn);
+
+ NVDmaKickoff(pNv);
+ pNv->DMAKickoffCallback = NULL;
}
-/*
- * Screen to screen BLTs.
- */
+
static void
-NVSetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir, int rop,
- unsigned planemask, int transparency_color)
+NVSetupForScreenToScreenCopy(
+ ScrnInfoPtr pScrn,
+ int xdir, int ydir,
+ int rop,
+ unsigned planemask,
+ int transparency_color
+)
{
- NVSetRopSolid(NVPTR(pScrn), rop);
+ NVPtr pNv = NVPTR(pScrn);
+
+ planemask |= ~0 << pNv->CurrentLayout.depth;
+
+ NVSetRopSolid(pScrn, rop, planemask);
+
+ pNv->DMAKickoffCallback = NVDMAKickoffCallback;
}
static void
-NVSubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int x1, int y1,
- int x2, int y2, int w, int h)
+NVSubsequentScreenToScreenCopy(
+ ScrnInfoPtr pScrn,
+ int x1, int y1,
+ int x2, int y2,
+ int w, int h
+)
{
NVPtr pNv = NVPTR(pScrn);
- RIVA_FIFO_FREE(pNv->riva, Blt, 3);
- pNv->riva.Blt->TopLeftSrc = (y1 << 16) | x1;
- pNv->riva.Blt->TopLeftDst = (y2 << 16) | x2;
- write_mem_barrier();
- pNv->riva.Blt->WidthHeight = (h << 16) | w;
- write_mem_barrier();
-}
+ NVDmaStart(pNv, BLIT_POINT_SRC, 3);
+ NVDmaNext (pNv, (y1 << 16) | x1);
+ NVDmaNext (pNv, (y2 << 16) | x2);
+ NVDmaNext (pNv, (h << 16) | w);
+ if((w * h) >= 512)
+ NVDmaKickoff(pNv);
+}
-/*
- * Fill 8x8 monochrome pattern rectangles. patternx and patterny are
- * the overloaded pattern bits themselves. The pattern colors don't
- * support 565, only 555. Hack around it.
- */
static void
-NVSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int patternx, int patterny,
- int fg, int bg, int rop, unsigned planemask)
+NVSetupForSolidFill(
+ ScrnInfoPtr pScrn,
+ int color,
+ int rop,
+ unsigned planemask
+)
{
- NVPtr pNv = NVPTR(pScrn);
+ NVPtr pNv = NVPTR(pScrn);
- NVSetRopPattern(pNv, rop);
- if (pScrn->depth == 16)
- {
- fg = ((fg & 0x0000F800) << 8)
- | ((fg & 0x000007E0) << 5)
- | ((fg & 0x0000001F) << 3)
- | 0xFF000000;
- if (bg != -1)
- bg = ((bg & 0x0000F800) << 8)
- | ((bg & 0x000007E0) << 5)
- | ((bg & 0x0000001F) << 3)
- | 0xFF000000;
- else
- bg = 0;
- }
- else
- {
- fg |= pNv->opaqueMonochrome;
- bg = (bg == -1) ? 0 : bg | pNv->opaqueMonochrome;
- };
- NVSetPattern(pNv, bg, fg, patternx, patterny);
- RIVA_FIFO_FREE(pNv->riva, Bitmap, 1);
- pNv->riva.Bitmap->Color1A = fg;
+ planemask |= ~0 << pNv->CurrentLayout.depth;
+
+ NVSetRopSolid(pScrn, rop, planemask);
+ NVDmaStart(pNv, RECT_SOLID_COLOR, 1);
+ NVDmaNext (pNv, color);
+
+ pNv->DMAKickoffCallback = NVDMAKickoffCallback;
}
static void
-NVSubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn,
- int patternx, int patterny,
- int x, int y, int w, int h)
+NVSubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h)
{
- NVPtr pNv = NVPTR(pScrn);
+ NVPtr pNv = NVPTR(pScrn);
- RIVA_FIFO_FREE(pNv->riva, Bitmap, 2);
- pNv->riva.Bitmap->UnclippedRectangle[0].TopLeft = (x << 16) | y;
- write_mem_barrier();
- pNv->riva.Bitmap->UnclippedRectangle[0].WidthHeight = (w << 16) | h;
- write_mem_barrier();
-}
+ NVDmaStart(pNv, RECT_SOLID_RECTS(0), 2);
+ NVDmaNext (pNv, (x << 16) | y);
+ NVDmaNext (pNv, (w << 16) | h);
+ if((w * h) >= 512)
+ NVDmaKickoff(pNv);
+}
-void
-NVResetGraphics(ScrnInfoPtr pScrn)
+static void
+NVSetupForMono8x8PatternFill (
+ ScrnInfoPtr pScrn,
+ int patternx, int patterny,
+ int fg, int bg,
+ int rop,
+ unsigned planemask
+)
{
- NVPtr pNv = NVPTR(pScrn);
+ NVPtr pNv = NVPTR(pScrn);
- if(pNv->NoAccel) return;
+ planemask = ~0 << pNv->CurrentLayout.depth;
- pNv->currentRop = -1;
- NVSetRopPattern(pNv, GXcopy);
-}
+ fg |= planemask;
+ if(bg == -1) bg = 0;
+ else bg |= planemask;
+ if (pNv->currentRop != (rop + 16)) {
+ NVDmaStart(pNv, ROP_SET, 1);
+ NVDmaNext (pNv, NVPatternROP[rop]);
+ pNv->currentRop = rop + 16;
+ }
+ NVSetPattern(pScrn, bg, fg, patternx, patterny);
+ NVDmaStart(pNv, RECT_SOLID_COLOR, 1);
+ NVDmaNext (pNv, fg);
-/*
- * Synchronise with graphics engine. Make sure it is idle before returning.
- * Should attempt to yield CPU if busy for awhile.
- */
-void NVSync(ScrnInfoPtr pScrn)
-{
- NVPtr pNv = NVPTR(pScrn);
- RIVA_BUSY(pNv->riva);
+ pNv->DMAKickoffCallback = NVDMAKickoffCallback;
}
-/* Color expansion */
static void
-NVSetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
- int fg, int bg, int rop,
- unsigned int planemask)
+NVSubsequentMono8x8PatternFillRect(
+ ScrnInfoPtr pScrn,
+ int patternx, int patterny,
+ int x, int y,
+ int w, int h
+)
{
- NVPtr pNv = NVPTR(pScrn);
+ NVPtr pNv = NVPTR(pScrn);
- NVSetRopSolid(pNv, rop);
+ NVDmaStart(pNv, RECT_SOLID_RECTS(0), 2);
+ NVDmaNext (pNv, (x << 16) | y);
+ NVDmaNext (pNv, (w << 16) | h);
- if ( bg == -1 )
- {
- /* Transparent case */
- bg = 0x80000000;
- pNv->expandFifo = (unsigned char*)&pNv->riva.Bitmap->MonochromeData1C;
- }
- else
- {
- pNv->expandFifo = (unsigned char*)&pNv->riva.Bitmap->MonochromeData01E;
- if (pScrn->depth == 16)
- {
- bg = ((bg & 0x0000F800) << 8)
- | ((bg & 0x000007E0) << 5)
- | ((bg & 0x0000001F) << 3)
- | 0xFF000000;
- }
- else
- {
- bg |= pNv->opaqueMonochrome;
- };
- }
- pNv->FgColor = fg;
- pNv->BgColor = bg;
+ if((w * h) >= 512)
+ NVDmaKickoff(pNv);
}
+static CARD32 _bg_pixel;
+static CARD32 _fg_pixel;
+static Bool _transparent;
+static CARD32 _color_expand_dwords;
+static CARD32 _color_expand_offset;
+static int _remaining;
+static unsigned char *_storage_buffer[1];
+
static void
-NVSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
+NVSetupForScanlineCPUToScreenColorExpandFill (
+ ScrnInfoPtr pScrn,
+ int fg, int bg,
+ int rop,
+ unsigned int planemask
+)
{
- NVPtr pNv = NVPTR(pScrn);
+ NVPtr pNv = NVPTR(pScrn);
- int t = pNv->expandWidth;
- CARD32 *pbits = (CARD32*)pNv->expandBuffer;
- CARD32 *d = (CARD32*)pNv->expandFifo;
-
- while(t >= 16)
- {
- RIVA_FIFO_FREE(pNv->riva, Bitmap, 16);
- d[0] = pbits[0];
- d[1] = pbits[1];
- d[2] = pbits[2];
- d[3] = pbits[3];
- d[4] = pbits[4];
- d[5] = pbits[5];
- d[6] = pbits[6];
- d[7] = pbits[7];
- d[8] = pbits[8];
- d[9] = pbits[9];
- d[10] = pbits[10];
- d[11] = pbits[11];
- d[12] = pbits[12];
- d[13] = pbits[13];
- d[14] = pbits[14];
- d[15] = pbits[15];
- t -= 16; pbits += 16;
- }
- if(t) {
- RIVA_FIFO_FREE(pNv->riva, Bitmap, t);
- while(t >= 4)
- {
- d[0] = pbits[0];
- d[1] = pbits[1];
- d[2] = pbits[2];
- d[3] = pbits[3];
- t -= 4; pbits += 4;
- }
- while(t--)
- *(d++) = *(pbits++);
- }
+ CARD32 mask = ~0 << pNv->CurrentLayout.depth;
- if (!(--pNv->expandRows)) { /* hardware bug workaround */
- RIVA_FIFO_FREE(pNv->riva, Blt, 1);
- write_mem_barrier();
- pNv->riva.Blt->TopLeftSrc = 0;
- }
- write_mem_barrier();
+ planemask |= mask;
+ _fg_pixel = fg | mask;
+
+ if(bg == -1) {
+ _transparent = TRUE;
+ } else {
+ _transparent = FALSE;
+ _bg_pixel = bg | mask;
+ }
+
+ NVSetRopSolid (pScrn, rop, planemask);
}
static void
-NVSubsequentColorExpandScanlineFifo(ScrnInfoPtr pScrn, int bufno)
+NVSubsequentScanlineCPUToScreenColorExpandFill (
+ ScrnInfoPtr pScrn,
+ int x, int y,
+ int w, int h,
+ int skipleft
+)
{
- NVPtr pNv = NVPTR(pScrn);
+ NVPtr pNv = NVPTR(pScrn);
+ int bw = (w + 31) & ~31;
+
+ _color_expand_dwords = bw >> 5;
+ _remaining = h;
+
+ if(_transparent) {
+ NVDmaStart(pNv, RECT_EXPAND_ONE_COLOR_CLIP, 5);
+ NVDmaNext (pNv, (y << 16) | ((x + skipleft) & 0xFFFF));
+ NVDmaNext (pNv, ((y + h) << 16) | ((x + w) & 0xFFFF));
+ NVDmaNext (pNv, _fg_pixel);
+ NVDmaNext (pNv, (h << 16) | bw);
+ NVDmaNext (pNv, (y << 16) | (x & 0xFFFF));
+ _color_expand_offset = RECT_EXPAND_ONE_COLOR_DATA(0);
+ } else {
+ NVDmaStart(pNv, RECT_EXPAND_TWO_COLOR_CLIP, 7);
+ NVDmaNext (pNv, (y << 16) | ((x + skipleft) & 0xFFFF));
+ NVDmaNext (pNv, ((y + h) << 16) | ((x + w) & 0xFFFF));
+ NVDmaNext (pNv, _bg_pixel);
+ NVDmaNext (pNv, _fg_pixel);
+ NVDmaNext (pNv, (h << 16) | bw);
+ NVDmaNext (pNv, (h << 16) | bw);
+ NVDmaNext (pNv, (y << 16) | (x & 0xFFFF));
+ _color_expand_offset = RECT_EXPAND_TWO_COLOR_DATA(0);
+ }
- if ( --pNv->expandRows ) {
- RIVA_FIFO_FREE(pNv->riva, Bitmap, pNv->expandWidth);
- } else { /* hardware bug workaround */
- RIVA_FIFO_FREE(pNv->riva, Blt, 1);
- write_mem_barrier();
- pNv->riva.Blt->TopLeftSrc = 0;
- }
- write_mem_barrier();
+ NVDmaStart(pNv, _color_expand_offset, _color_expand_dwords);
+ _storage_buffer[0] = (unsigned char*)&pNv->dmaBase[pNv->dmaCurrent];
}
static void
-NVSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int x,
- int y, int w, int h,
- int skipleft)
+NVSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
{
- int bw;
- NVPtr pNv = NVPTR(pScrn);
-
- bw = (w + 31) & ~31;
- pNv->expandWidth = bw >> 5;
-
- if ( pNv->BgColor == 0x80000000 )
- {
- /* Use faster transparent method */
- RIVA_FIFO_FREE(pNv->riva, Bitmap, 5);
- pNv->riva.Bitmap->ClipC.TopLeft = (y << 16) | ((x+skipleft)
- & 0xFFFF);
- pNv->riva.Bitmap->ClipC.BottomRight = ((y+h) << 16) | ((x+w)&0xffff);
- pNv->riva.Bitmap->Color1C = pNv->FgColor;
- pNv->riva.Bitmap->WidthHeightC = (h << 16) | bw;
- write_mem_barrier();
- pNv->riva.Bitmap->PointC = (y << 16) | (x & 0xFFFF);
- write_mem_barrier();
- }
- else
- {
- /* Opaque */
- RIVA_FIFO_FREE(pNv->riva, Bitmap, 7);
- pNv->riva.Bitmap->ClipE.TopLeft = (y << 16) | ((x+skipleft)
- & 0xFFFF);
- pNv->riva.Bitmap->ClipE.BottomRight = ((y+h) << 16) | ((x+w)&0xffff);
- pNv->riva.Bitmap->Color0E = pNv->BgColor;
- pNv->riva.Bitmap->Color1E = pNv->FgColor;
- pNv->riva.Bitmap->WidthHeightInE = (h << 16) | bw;
- pNv->riva.Bitmap->WidthHeightOutE = (h << 16) | bw;
- write_mem_barrier();
- pNv->riva.Bitmap->PointE = (y << 16) | (x & 0xFFFF);
- write_mem_barrier();
- }
+ NVPtr pNv = NVPTR(pScrn);
+
+ pNv->dmaCurrent += _color_expand_dwords;
+
+ if(--_remaining) {
+ NVDmaStart(pNv, _color_expand_offset, _color_expand_dwords);
+ _storage_buffer[0] = (unsigned char*)&pNv->dmaBase[pNv->dmaCurrent];
+ } else {
+ /* hardware bug workaround */
+ NVDmaStart(pNv, BLIT_POINT_SRC, 1);
+ NVDmaNext (pNv, 0);
+ NVDmaKickoff(pNv);
+ }
+}
- pNv->expandRows = h;
+static void
+NVSetupForScanlineImageWrite(
+ ScrnInfoPtr pScrn, int rop,
+ unsigned int planemask,
+ int trans_color,
+ int bpp, int depth
+)
+{
+ NVPtr pNv = NVPTR(pScrn);
- if(pNv->expandWidth > (pNv->riva.FifoEmptyCount >> 2)) {
- pNv->AccelInfoRec->ScanlineColorExpandBuffers = &pNv->expandBuffer;
- pNv->AccelInfoRec->SubsequentColorExpandScanline =
- NVSubsequentColorExpandScanline;
- } else {
- pNv->AccelInfoRec->ScanlineColorExpandBuffers = &pNv->expandFifo;
- pNv->AccelInfoRec->SubsequentColorExpandScanline =
- NVSubsequentColorExpandScanlineFifo;
- RIVA_FIFO_FREE(pNv->riva, Bitmap, pNv->expandWidth);
- }
+ planemask |= ~0 << pNv->CurrentLayout.depth;
+
+ NVSetRopSolid (pScrn, rop, planemask);
+}
+
+static CARD32 _image_size;
+static CARD32 _image_srcpoint;
+static CARD32 _image_dstpoint;
+static CARD32 _image_dstpitch;
+
+static void
+NVSubsequentScanlineImageWriteRect(
+ ScrnInfoPtr pScrn,
+ int x, int y,
+ int w, int h,
+ int skipleft
+)
+{
+ NVPtr pNv = NVPTR(pScrn);
+ int Bpp = pNv->CurrentLayout.bitsPerPixel >> 3;
+ int image_srcpitch;
+
+ _image_size = (1 << 16) | (w - skipleft);
+ _image_srcpoint = skipleft;
+ _image_dstpoint = (y << 16) | (x + skipleft);
+ _remaining = h;
+ _image_dstpitch = pNv->CurrentLayout.displayWidth * Bpp;
+ image_srcpitch = ((w * Bpp) + 63) & ~63;
+ _storage_buffer[0] = pNv->FbStart + pNv->ScratchBufferStart;
+
+ NVSync(pScrn);
+
+ NVDmaStart(pNv, SURFACE_PITCH, 2);
+ NVDmaNext (pNv, (_image_dstpitch << 16) | image_srcpitch);
+ NVDmaNext (pNv, pNv->ScratchBufferStart);
+}
+
+static void NVSubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
+{
+ NVPtr pNv = NVPTR(pScrn);
+
+ NVDmaStart(pNv, BLIT_POINT_SRC, 3);
+ NVDmaNext (pNv, _image_srcpoint);
+ NVDmaNext (pNv, _image_dstpoint);
+ NVDmaNext (pNv, _image_size);
+ NVDmaKickoff(pNv);
+
+ if(--_remaining) {
+ _image_dstpoint += (1 << 16);
+ NVSync(pScrn);
+ } else {
+ NVDmaStart(pNv, SURFACE_PITCH, 2);
+ NVDmaNext (pNv, _image_dstpitch | (_image_dstpitch << 16));
+ NVDmaNext (pNv, 0);
+ }
}
static void
@@ -396,8 +578,13 @@ NVSetupForSolidLine(ScrnInfoPtr pScrn, int color, int rop, unsigned planemask)
{
NVPtr pNv = NVPTR(pScrn);
- NVSetRopSolid(pNv, rop);
- pNv->FgColor = color;
+ planemask |= ~0 << pNv->CurrentLayout.depth;
+
+ NVSetRopSolid(pScrn, rop, planemask);
+
+ _fg_pixel = color;
+
+ pNv->DMAKickoffCallback = NVDMAKickoffCallback;
}
static void
@@ -405,169 +592,124 @@ NVSubsequentSolidHorVertLine(ScrnInfoPtr pScrn, int x, int y, int len, int dir)
{
NVPtr pNv = NVPTR(pScrn);
- RIVA_FIFO_FREE(pNv->riva, Line, 3);
- pNv->riva.Line->Color = pNv->FgColor;
- pNv->riva.Line->Lin[0].point0 = ((y << 16) | ( x & 0xffff));
- write_mem_barrier();
- if ( dir ==DEGREES_0 )
- pNv->riva.Line->Lin[0].point1 = ((y << 16) | (( x + len ) & 0xffff));
- else
- pNv->riva.Line->Lin[0].point1 = (((y + len) << 16) | ( x & 0xffff));
- write_mem_barrier();
+ NVDmaStart(pNv, LINE_COLOR, 1);
+ NVDmaNext (pNv, _fg_pixel);
+ NVDmaStart(pNv, LINE_LINES(0), 2);
+ NVDmaNext (pNv, (y << 16) | ( x & 0xffff));
+ if(dir == DEGREES_0) {
+ NVDmaNext (pNv, (y << 16) | ((x + len) & 0xffff));
+ } else {
+ NVDmaNext (pNv, ((y + len) << 16) | (x & 0xffff));
+ }
}
static void
-NVSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn, int x1, int y1,
- int x2, int y2, int flags)
+NVSubsequentSolidTwoPointLine(
+ ScrnInfoPtr pScrn,
+ int x1, int y1,
+ int x2, int y2,
+ int flags
+)
{
NVPtr pNv = NVPTR(pScrn);
- Bool lastPoint = !(flags & OMIT_LAST);
-
- RIVA_FIFO_FREE(pNv->riva, Line, lastPoint ? 5 : 3);
- pNv->riva.Line->Color = pNv->FgColor;
- pNv->riva.Line->Lin[0].point0 = ((y1 << 16) | (x1 & 0xffff));
- write_mem_barrier();
- pNv->riva.Line->Lin[0].point1 = ((y2 << 16) | (x2 & 0xffff));
- write_mem_barrier();
- if (lastPoint)
- {
- pNv->riva.Line->Lin[1].point0 = ((y2 << 16) | (x2 & 0xffff));
- write_mem_barrier();
- pNv->riva.Line->Lin[1].point1 = (((y2 + 1) << 16) | (x2 & 0xffff));
- write_mem_barrier();
+ Bool drawLast = !(flags & OMIT_LAST);
+
+ NVDmaStart(pNv, LINE_COLOR, 1);
+ NVDmaNext (pNv, _fg_pixel);
+ NVDmaStart(pNv, LINE_LINES(0), drawLast ? 4 : 2);
+ NVDmaNext (pNv, (y1 << 16) | (x1 & 0xffff));
+ NVDmaNext (pNv, (y2 << 16) | (x2 & 0xffff));
+ if(drawLast) {
+ NVDmaNext (pNv, (y2 << 16) | (x2 & 0xffff));
+ NVDmaNext (pNv, ((y2 + 1) << 16) | (x2 & 0xffff));
}
}
static void
-NVValidatePolyArc(
- GCPtr pGC,
- unsigned long changes,
- DrawablePtr pDraw
-){
- if(pGC->planemask != ~0) return;
+NVSetClippingRectangle(ScrnInfoPtr pScrn, int x1, int y1, int x2, int y2)
+{
+ NVPtr pNv = NVPTR(pScrn);
+ int h = y2 - y1 + 1;
+ int w = x2 - x1 + 1;
- if(!pGC->lineWidth &&
- ((pGC->alu != GXcopy) || (pGC->lineStyle != LineSolid)))
- {
- pGC->ops->PolyArc = miZeroPolyArc;
- }
+ NVDmaStart(pNv, CLIP_POINT, 2);
+ NVDmaNext (pNv, (y1 << 16) | x1);
+ NVDmaNext (pNv, (h << 16) | w);
}
static void
-NVValidatePolyPoint(
- GCPtr pGC,
- unsigned long changes,
- DrawablePtr pDraw
-){
- pGC->ops->PolyPoint = XAAFallbackOps.PolyPoint;
-
- if(pGC->planemask != ~0) return;
+NVDisableClipping(ScrnInfoPtr pScrn)
+{
+ NVPtr pNv = NVPTR(pScrn);
- if(pGC->alu != GXcopy)
- pGC->ops->PolyPoint = miPolyPoint;
+ NVDmaStart(pNv, CLIP_POINT, 2);
+ NVDmaNext (pNv, 0);
+ NVDmaNext (pNv, 0x7FFF7FFF);
}
+
/* Initialize XAA acceleration info */
Bool
NVAccelInit(ScreenPtr pScreen)
{
- XAAInfoRecPtr infoPtr;
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- NVPtr pNv = NVPTR(pScrn);
- Bool lowClocks;
-
- /* The hardware POSTs with clocks too low to support some acceleration
- on NV20 and higher and we don't know enough about timing particulars
- to raise them */
-
- lowClocks = ((pNv->Chipset & 0x0ff0) >= 0x0200);
-
- pNv->AccelInfoRec = infoPtr = XAACreateInfoRec();
- if(!infoPtr) return FALSE;
-
- /* fill out infoPtr here */
- infoPtr->Flags = LINEAR_FRAMEBUFFER | PIXMAP_CACHE | OFFSCREEN_PIXMAPS;
-
- /* sync */
- infoPtr->Sync = NVSync;
-
- /* solid fills */
- infoPtr->SolidFillFlags = NO_PLANEMASK;
- infoPtr->SetupForSolidFill = NVSetupForSolidFill;
- infoPtr->SubsequentSolidFillRect = NVSubsequentSolidFillRect;
-
- if(lowClocks)
- infoPtr->SolidFillFlags |= GXCOPY_ONLY;
-
- /* screen to screen copy */
- infoPtr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | NO_PLANEMASK;
- infoPtr->SetupForScreenToScreenCopy = NVSetupForScreenToScreenCopy;
- infoPtr->SubsequentScreenToScreenCopy = NVSubsequentScreenToScreenCopy;
-
- /* 8x8 mono patterns */
- /*
- * Set pattern opaque bits based on pixel format.
- */
- pNv->opaqueMonochrome = ~((1 << pScrn->depth) - 1);
-
- pNv->currentRop = -1;
-
- infoPtr->Mono8x8PatternFillFlags = HARDWARE_PATTERN_SCREEN_ORIGIN |
- HARDWARE_PATTERN_PROGRAMMED_BITS |
- NO_PLANEMASK;
- infoPtr->SetupForMono8x8PatternFill = NVSetupForMono8x8PatternFill;
- infoPtr->SubsequentMono8x8PatternFillRect =
- NVSubsequentMono8x8PatternFillRect;
-
- /* Color expansion */
- infoPtr->ScanlineCPUToScreenColorExpandFillFlags =
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- BIT_ORDER_IN_BYTE_MSBFIRST |
-#else
- BIT_ORDER_IN_BYTE_LSBFIRST |
-#endif
- NO_PLANEMASK |
- CPU_TRANSFER_PAD_DWORD |
- LEFT_EDGE_CLIPPING |
- LEFT_EDGE_CLIPPING_NEGATIVE_X;
-
- infoPtr->NumScanlineColorExpandBuffers = 1;
-
- if(!lowClocks) {
- infoPtr->SetupForScanlineCPUToScreenColorExpandFill =
- NVSetupForScanlineCPUToScreenColorExpandFill;
- infoPtr->SubsequentScanlineCPUToScreenColorExpandFill =
- NVSubsequentScanlineCPUToScreenColorExpandFill;
- }
-
- pNv->expandFifo = (unsigned char*)&pNv->riva.Bitmap->MonochromeData01E;
-
- /* Allocate buffer for color expansion and also image writes in the
- future */
- pNv->expandBuffer = xnfalloc(((pScrn->virtualX*pScrn->bitsPerPixel)/8) + 8);
-
-
- infoPtr->ScanlineColorExpandBuffers = &pNv->expandBuffer;
- infoPtr->SubsequentColorExpandScanline = NVSubsequentColorExpandScanline;
-
- infoPtr->SolidLineFlags = infoPtr->SolidFillFlags;
- infoPtr->SetupForSolidLine = NVSetupForSolidLine;
- infoPtr->SubsequentSolidHorVertLine =
- NVSubsequentSolidHorVertLine;
- infoPtr->SubsequentSolidTwoPointLine =
- NVSubsequentSolidTwoPointLine;
- infoPtr->SetClippingRectangle = NVSetClippingRectangle;
- infoPtr->DisableClipping = NVDisableClipping;
- infoPtr->ClippingFlags = HARDWARE_CLIP_SOLID_LINE;
- miSetZeroLineBias(pScreen, OCTANT1 | OCTANT3 | OCTANT4 | OCTANT6);
-
- infoPtr->ValidatePolyArc = NVValidatePolyArc;
- infoPtr->PolyArcMask = GCFunction | GCLineWidth | GCPlaneMask;
- infoPtr->ValidatePolyPoint = NVValidatePolyPoint;
- infoPtr->PolyPointMask = GCFunction | GCPlaneMask;
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ NVPtr pNv = NVPTR(pScrn);
+ XAAInfoRecPtr accel;
+
+ accel = pNv->AccelInfoRec = XAACreateInfoRec();
+ if(!accel) return FALSE;
+
+ accel->Flags = LINEAR_FRAMEBUFFER | PIXMAP_CACHE | OFFSCREEN_PIXMAPS;
+ accel->Sync = NVSync;
+
+ accel->ScreenToScreenCopyFlags = NO_TRANSPARENCY;
+ accel->SetupForScreenToScreenCopy = NVSetupForScreenToScreenCopy;
+ accel->SubsequentScreenToScreenCopy = NVSubsequentScreenToScreenCopy;
+
+ accel->SolidFillFlags = 0;
+ accel->SetupForSolidFill = NVSetupForSolidFill;
+ accel->SubsequentSolidFillRect = NVSubsequentSolidFillRect;
+
+ accel->Mono8x8PatternFillFlags = HARDWARE_PATTERN_SCREEN_ORIGIN |
+ HARDWARE_PATTERN_PROGRAMMED_BITS |
+ NO_PLANEMASK;
+ accel->SetupForMono8x8PatternFill = NVSetupForMono8x8PatternFill;
+ accel->SubsequentMono8x8PatternFillRect = NVSubsequentMono8x8PatternFillRect;
+
+ accel->ScanlineCPUToScreenColorExpandFillFlags =
+ BIT_ORDER_IN_BYTE_LSBFIRST |
+ CPU_TRANSFER_PAD_DWORD |
+ LEFT_EDGE_CLIPPING |
+ LEFT_EDGE_CLIPPING_NEGATIVE_X;
+ accel->NumScanlineColorExpandBuffers = 1;
+ accel->SetupForScanlineCPUToScreenColorExpandFill =
+ NVSetupForScanlineCPUToScreenColorExpandFill;
+ accel->SubsequentScanlineCPUToScreenColorExpandFill =
+ NVSubsequentScanlineCPUToScreenColorExpandFill;
+ accel->SubsequentColorExpandScanline =
+ NVSubsequentColorExpandScanline;
+ accel->ScanlineColorExpandBuffers = _storage_buffer;
+
+ accel->ScanlineImageWriteFlags = NO_GXCOPY |
+ NO_TRANSPARENCY |
+ LEFT_EDGE_CLIPPING |
+ LEFT_EDGE_CLIPPING_NEGATIVE_X;
+ accel->NumScanlineImageWriteBuffers = 1;
+ accel->SetupForScanlineImageWrite = NVSetupForScanlineImageWrite;
+ accel->SubsequentScanlineImageWriteRect = NVSubsequentScanlineImageWriteRect;
+ accel->SubsequentImageWriteScanline = NVSubsequentImageWriteScanline;
+ accel->ScanlineImageWriteBuffers = _storage_buffer;
+
+ accel->SolidLineFlags = 0;
+ accel->SetupForSolidLine = NVSetupForSolidLine;
+ accel->SubsequentSolidHorVertLine = NVSubsequentSolidHorVertLine;
+ accel->SubsequentSolidTwoPointLine = NVSubsequentSolidTwoPointLine;
+ accel->SetClippingRectangle = NVSetClippingRectangle;
+ accel->DisableClipping = NVDisableClipping;
+ accel->ClippingFlags = HARDWARE_CLIP_SOLID_LINE;
- NVDisableClipping(pScrn);
+ miSetZeroLineBias(pScreen, OCTANT1 | OCTANT3 | OCTANT4 | OCTANT6);
- return(XAAInit(pScreen, infoPtr));
+ return (XAAInit(pScreen, accel));
}
diff --git a/src/riva_hw.c b/src/riva_hw.c
index bbb515f..bf6885d 100644
--- a/src/riva_hw.c
+++ b/src/riva_hw.c
@@ -36,11 +36,11 @@
|* those rights set forth herein. *|
|* *|
\***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.47 2003/02/10 23:42:51 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.52 2003/11/03 05:11:26 tsi Exp $ */
-#include "nv_local.h"
+#include "riva_local.h"
#include "compiler.h"
-#include "nv_include.h"
+#include "riva_include.h"
#include "riva_hw.h"
#include "riva_tbl.h"
@@ -55,20 +55,6 @@ static int nv3Busy
{
return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x000006B0/4] & 0x01));
}
-static int nv4Busy
-(
- RIVA_HW_INST *chip
-)
-{
- return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01));
-}
-static int nv10Busy
-(
- RIVA_HW_INST *chip
-)
-{
- return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01));
-}
static void vgaLockUnlock
(
RIVA_HW_INST *chip,
@@ -93,16 +79,6 @@ static void nv3LockUnlock
VGA_WR08(chip->PVIO, 0x3C5, Lock ? 0x99 : 0x57);
vgaLockUnlock(chip, Lock);
}
-static void nv4LockUnlock
-(
- RIVA_HW_INST *chip,
- Bool Lock
-)
-{
- VGA_WR08(chip->PCIO, 0x3D4, 0x1F);
- VGA_WR08(chip->PCIO, 0x3D5, Lock ? 0x99 : 0x57);
- vgaLockUnlock(chip, Lock);
-}
static int ShowHideCursor
(
RIVA_HW_INST *chip,
@@ -185,47 +161,6 @@ typedef struct {
int mem_latency;
char mem_aligned;
} nv3_sim_state;
-typedef struct {
- int graphics_lwm;
- int video_lwm;
- int graphics_burst_size;
- int video_burst_size;
- int valid;
-} nv4_fifo_info;
-typedef struct {
- int pclk_khz;
- int mclk_khz;
- int nvclk_khz;
- char mem_page_miss;
- char mem_latency;
- int memory_width;
- char enable_video;
- char gr_during_vid;
- char pix_bpp;
- char mem_aligned;
- char enable_mp;
-} nv4_sim_state;
-typedef struct {
- int graphics_lwm;
- int video_lwm;
- int graphics_burst_size;
- int video_burst_size;
- int valid;
-} nv10_fifo_info;
-typedef struct {
- int pclk_khz;
- int mclk_khz;
- int nvclk_khz;
- char mem_page_miss;
- char mem_latency;
- int memory_type;
- int memory_width;
- char enable_video;
- char gr_during_vid;
- char pix_bpp;
- char mem_aligned;
- char enable_mp;
-} nv10_sim_state;
static int nv3_iterate(nv3_fifo_info *res_info, nv3_sim_state * state, nv3_arb_info *ainfo)
{
int iter = 0;
@@ -234,14 +169,13 @@ static int nv3_iterate(nv3_fifo_info *res_info, nv3_sim_state * state, nv3_arb_i
int mburst_size = 32;
int mmisses, gmisses, vmisses;
int misses;
- int vlwm, glwm, mlwm;
+ int vlwm, glwm;
int last, next, cur;
int max_gfsize ;
long ns;
vlwm = 0;
glwm = 0;
- mlwm = 0;
vfsize = 0;
gfsize = 0;
cur = ainfo->cur;
@@ -606,7 +540,7 @@ static void nv3UpdateArbitrationSettings
nv3_sim_state sim_data;
unsigned int M, N, P, pll, MClk;
- pll = chip->PRAMDAC0[0x00000504/4];
+ pll = chip->PRAMDAC[0x00000504/4];
M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
MClk = (N * chip->CrystalFreqKHz / M) >> P;
sim_data.pix_bpp = (char)pixelDepth;
@@ -636,512 +570,6 @@ static void nv3UpdateArbitrationSettings
*burst = 0x2;
}
}
-static void nv4CalcArbitration
-(
- nv4_fifo_info *fifo,
- nv4_sim_state *arb
-)
-{
- int data, pagemiss, cas,width, video_enable, color_key_enable, bpp, align;
- int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
- int found, mclk_extra, mclk_loop, cbs, m1, p1;
- int mclk_freq, pclk_freq, nvclk_freq, mp_enable;
- int us_m, us_n, us_p, video_drain_rate, crtc_drain_rate;
- int vpm_us, us_video, vlwm, video_fill_us, cpm_us, us_crt,clwm;
- int craw, vraw;
-
- fifo->valid = 1;
- pclk_freq = arb->pclk_khz;
- mclk_freq = arb->mclk_khz;
- nvclk_freq = arb->nvclk_khz;
- pagemiss = arb->mem_page_miss;
- cas = arb->mem_latency;
- width = arb->memory_width >> 6;
- video_enable = arb->enable_video;
- color_key_enable = arb->gr_during_vid;
- bpp = arb->pix_bpp;
- align = arb->mem_aligned;
- mp_enable = arb->enable_mp;
- clwm = 0;
- vlwm = 0;
- cbs = 128;
- pclks = 2;
- nvclks = 2;
- nvclks += 2;
- nvclks += 1;
- mclks = 5;
- mclks += 3;
- mclks += 1;
- mclks += cas;
- mclks += 1;
- mclks += 1;
- mclks += 1;
- mclks += 1;
- mclk_extra = 3;
- nvclks += 2;
- nvclks += 1;
- nvclks += 1;
- nvclks += 1;
- if (mp_enable)
- mclks+=4;
- nvclks += 0;
- pclks += 0;
- found = 0;
- vbs = 0;
- while (found != 1)
- {
- fifo->valid = 1;
- found = 1;
- mclk_loop = mclks+mclk_extra;
- us_m = mclk_loop *1000*1000 / mclk_freq;
- us_n = nvclks*1000*1000 / nvclk_freq;
- us_p = nvclks*1000*1000 / pclk_freq;
- if (video_enable)
- {
- video_drain_rate = pclk_freq * 2;
- crtc_drain_rate = pclk_freq * bpp/8;
- vpagemiss = 2;
- vpagemiss += 1;
- crtpagemiss = 2;
- vpm_us = (vpagemiss * pagemiss)*1000*1000/mclk_freq;
- if (nvclk_freq * 2 > mclk_freq * width)
- video_fill_us = cbs*1000*1000 / 16 / nvclk_freq ;
- else
- video_fill_us = cbs*1000*1000 / (8 * width) / mclk_freq;
- us_video = vpm_us + us_m + us_n + us_p + video_fill_us;
- vlwm = us_video * video_drain_rate/(1000*1000);
- vlwm++;
- vbs = 128;
- if (vlwm > 128) vbs = 64;
- if (vlwm > (256-64)) vbs = 32;
- if (nvclk_freq * 2 > mclk_freq * width)
- video_fill_us = vbs *1000*1000/ 16 / nvclk_freq ;
- else
- video_fill_us = vbs*1000*1000 / (8 * width) / mclk_freq;
- cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq;
- us_crt =
- us_video
- +video_fill_us
- +cpm_us
- +us_m + us_n +us_p
- ;
- clwm = us_crt * crtc_drain_rate/(1000*1000);
- clwm++;
- }
- else
- {
- crtc_drain_rate = pclk_freq * bpp/8;
- crtpagemiss = 2;
- crtpagemiss += 1;
- cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq;
- us_crt = cpm_us + us_m + us_n + us_p ;
- clwm = us_crt * crtc_drain_rate/(1000*1000);
- clwm++;
- }
- m1 = clwm + cbs - 512;
- p1 = m1 * pclk_freq / mclk_freq;
- p1 = p1 * bpp / 8;
- if ((p1 < m1) && (m1 > 0))
- {
- fifo->valid = 0;
- found = 0;
- if (mclk_extra ==0) found = 1;
- mclk_extra--;
- }
- else if (video_enable)
- {
- if ((clwm > 511) || (vlwm > 255))
- {
- fifo->valid = 0;
- found = 0;
- if (mclk_extra ==0) found = 1;
- mclk_extra--;
- }
- }
- else
- {
- if (clwm > 519)
- {
- fifo->valid = 0;
- found = 0;
- if (mclk_extra ==0) found = 1;
- mclk_extra--;
- }
- }
- craw = clwm;
- vraw = vlwm;
- if (clwm < 384) clwm = 384;
- if (vlwm < 128) vlwm = 128;
- data = (int)(clwm);
- fifo->graphics_lwm = data;
- fifo->graphics_burst_size = 128;
- data = (int)((vlwm+15));
- fifo->video_lwm = data;
- fifo->video_burst_size = vbs;
- }
-}
-static void nv4UpdateArbitrationSettings
-(
- unsigned VClk,
- unsigned pixelDepth,
- unsigned *burst,
- unsigned *lwm,
- RIVA_HW_INST *chip
-)
-{
- nv4_fifo_info fifo_data;
- nv4_sim_state sim_data;
- unsigned int M, N, P, pll, MClk, NVClk, cfg1;
-
- pll = chip->PRAMDAC0[0x00000504/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- MClk = (N * chip->CrystalFreqKHz / M) >> P;
- pll = chip->PRAMDAC0[0x00000500/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- NVClk = (N * chip->CrystalFreqKHz / M) >> P;
- cfg1 = chip->PFB[0x00000204/4];
- sim_data.pix_bpp = (char)pixelDepth;
- sim_data.enable_video = 0;
- sim_data.enable_mp = 0;
- sim_data.memory_width = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64;
- sim_data.mem_latency = (char)cfg1 & 0x0F;
- sim_data.mem_aligned = 1;
- sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));
- sim_data.gr_during_vid = 0;
- sim_data.pclk_khz = VClk;
- sim_data.mclk_khz = MClk;
- sim_data.nvclk_khz = NVClk;
- nv4CalcArbitration(&fifo_data, &sim_data);
- if (fifo_data.valid)
- {
- int b = fifo_data.graphics_burst_size >> 4;
- *burst = 0;
- while (b >>= 1) (*burst)++;
- *lwm = fifo_data.graphics_lwm >> 3;
- }
-}
-static void nv10CalcArbitration
-(
- nv10_fifo_info *fifo,
- nv10_sim_state *arb
-)
-{
- int data, pagemiss, cas,width, video_enable, color_key_enable, bpp, align;
- int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
- int nvclk_fill, us_extra;
- int found, mclk_extra, mclk_loop, cbs, m1;
- int mclk_freq, pclk_freq, nvclk_freq, mp_enable;
- int us_m, us_m_min, us_n, us_p, video_drain_rate, crtc_drain_rate;
- int vus_m, vus_n, vus_p;
- int vpm_us, us_video, vlwm, cpm_us, us_crt,clwm;
- int clwm_rnd_down;
- int craw, m2us, us_pipe, us_pipe_min, vus_pipe, p1clk, p2;
- int pclks_2_top_fifo, min_mclk_extra;
- int us_min_mclk_extra;
-
- fifo->valid = 1;
- pclk_freq = arb->pclk_khz; /* freq in KHz */
- mclk_freq = arb->mclk_khz;
- nvclk_freq = arb->nvclk_khz;
- pagemiss = arb->mem_page_miss;
- cas = arb->mem_latency;
- width = arb->memory_width/64;
- video_enable = arb->enable_video;
- color_key_enable = arb->gr_during_vid;
- bpp = arb->pix_bpp;
- align = arb->mem_aligned;
- mp_enable = arb->enable_mp;
- clwm = 0;
- vlwm = 1024;
-
- cbs = 512;
- vbs = 512;
-
- pclks = 4; /* lwm detect. */
-
- nvclks = 3; /* lwm -> sync. */
- nvclks += 2; /* fbi bus cycles (1 req + 1 busy) */
-
- mclks = 1; /* 2 edge sync. may be very close to edge so just put one. */
-
- mclks += 1; /* arb_hp_req */
- mclks += 5; /* ap_hp_req tiling pipeline */
-
- mclks += 2; /* tc_req latency fifo */
- mclks += 2; /* fb_cas_n_ memory request to fbio block */
- mclks += 7; /* sm_d_rdv data returned from fbio block */
-
- /* fb.rd.d.Put_gc need to accumulate 256 bits for read */
- if (arb->memory_type == 0)
- if (arb->memory_width == 64) /* 64 bit bus */
- mclks += 4;
- else
- mclks += 2;
- else
- if (arb->memory_width == 64) /* 64 bit bus */
- mclks += 2;
- else
- mclks += 1;
-
- if ((!video_enable) && (arb->memory_width == 128))
- {
- mclk_extra = (bpp == 32) ? 31 : 42; /* Margin of error */
- min_mclk_extra = 17;
- }
- else
- {
- mclk_extra = (bpp == 32) ? 8 : 4; /* Margin of error */
- /* mclk_extra = 4; */ /* Margin of error */
- min_mclk_extra = 18;
- }
-
- nvclks += 1; /* 2 edge sync. may be very close to edge so just put one. */
- nvclks += 1; /* fbi_d_rdv_n */
- nvclks += 1; /* Fbi_d_rdata */
- nvclks += 1; /* crtfifo load */
-
- if(mp_enable)
- mclks+=4; /* Mp can get in with a burst of 8. */
- /* Extra clocks determined by heuristics */
-
- nvclks += 0;
- pclks += 0;
- found = 0;
- while(found != 1) {
- fifo->valid = 1;
- found = 1;
- mclk_loop = mclks+mclk_extra;
- us_m = mclk_loop *1000*1000 / mclk_freq; /* Mclk latency in us */
- us_m_min = mclks * 1000*1000 / mclk_freq; /* Minimum Mclk latency in us */
- us_min_mclk_extra = min_mclk_extra *1000*1000 / mclk_freq;
- us_n = nvclks*1000*1000 / nvclk_freq;/* nvclk latency in us */
- us_p = pclks*1000*1000 / pclk_freq;/* nvclk latency in us */
- us_pipe = us_m + us_n + us_p;
- us_pipe_min = us_m_min + us_n + us_p;
- us_extra = 0;
-
- vus_m = mclk_loop *1000*1000 / mclk_freq; /* Mclk latency in us */
- vus_n = (4)*1000*1000 / nvclk_freq;/* nvclk latency in us */
- vus_p = 0*1000*1000 / pclk_freq;/* pclk latency in us */
- vus_pipe = vus_m + vus_n + vus_p;
-
- if(video_enable) {
- video_drain_rate = pclk_freq * 4; /* MB/s */
- crtc_drain_rate = pclk_freq * bpp/8; /* MB/s */
-
- vpagemiss = 1; /* self generating page miss */
- vpagemiss += 1; /* One higher priority before */
-
- crtpagemiss = 2; /* self generating page miss */
- if(mp_enable)
- crtpagemiss += 1; /* if MA0 conflict */
-
- vpm_us = (vpagemiss * pagemiss)*1000*1000/mclk_freq;
-
- us_video = vpm_us + vus_m; /* Video has separate read return path */
-
- cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq;
- us_crt =
- us_video /* Wait for video */
- +cpm_us /* CRT Page miss */
- +us_m + us_n +us_p /* other latency */
- ;
-
- clwm = us_crt * crtc_drain_rate/(1000*1000);
- clwm++; /* fixed point <= float_point - 1. Fixes that */
- } else {
- crtc_drain_rate = pclk_freq * bpp/8; /* bpp * pclk/8 */
-
- crtpagemiss = 1; /* self generating page miss */
- crtpagemiss += 1; /* MA0 page miss */
- if(mp_enable)
- crtpagemiss += 1; /* if MA0 conflict */
- cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq;
- us_crt = cpm_us + us_m + us_n + us_p ;
- clwm = us_crt * crtc_drain_rate/(1000*1000);
- clwm++; /* fixed point <= float_point - 1. Fixes that */
-
- /*
- //
- // Another concern, only for high pclks so don't do this
- // with video:
- // What happens if the latency to fetch the cbs is so large that
- // fifo empties. In that case we need to have an alternate clwm value
- // based off the total burst fetch
- //
- us_crt = (cbs * 1000 * 1000)/ (8*width)/mclk_freq ;
- us_crt = us_crt + us_m + us_n + us_p + (4 * 1000 * 1000)/mclk_freq;
- clwm_mt = us_crt * crtc_drain_rate/(1000*1000);
- clwm_mt ++;
- if(clwm_mt > clwm)
- clwm = clwm_mt;
- */
- /* Finally, a heuristic check when width == 64 bits */
- if(width == 1){
- nvclk_fill = nvclk_freq * 8;
- if(crtc_drain_rate * 100 >= nvclk_fill * 102)
- clwm = 0xfff; /*Large number to fail */
-
- else if(crtc_drain_rate * 100 >= nvclk_fill * 98) {
- clwm = 1024;
- cbs = 512;
- us_extra = (cbs * 1000 * 1000)/ (8*width)/mclk_freq ;
- }
- }
- }
-
-
- /*
- Overfill check:
-
- */
-
- clwm_rnd_down = ((int)clwm/8)*8;
- if (clwm_rnd_down < clwm)
- clwm += 8;
-
- m1 = clwm + cbs - 1024; /* Amount of overfill */
- m2us = us_pipe_min + us_min_mclk_extra;
- pclks_2_top_fifo = (1024-clwm)/(8*width);
-
- /* pclk cycles to drain */
- p1clk = m2us * pclk_freq/(1000*1000);
- p2 = p1clk * bpp / 8; /* bytes drained. */
-
- if((p2 < m1) && (m1 > 0)) {
- fifo->valid = 0;
- found = 0;
- if(min_mclk_extra == 0) {
- if(cbs <= 32) {
- found = 1; /* Can't adjust anymore! */
- } else {
- cbs = cbs/2; /* reduce the burst size */
- }
- } else {
- min_mclk_extra--;
- }
- } else {
- if (clwm > 1023){ /* Have some margin */
- fifo->valid = 0;
- found = 0;
- if(min_mclk_extra == 0)
- found = 1; /* Can't adjust anymore! */
- else
- min_mclk_extra--;
- }
- }
- craw = clwm;
-
- if(clwm < (1024-cbs+8)) clwm = 1024-cbs+8;
- data = (int)(clwm);
- /* printf("CRT LWM: %f bytes, prog: 0x%x, bs: 256\n", clwm, data ); */
- fifo->graphics_lwm = data; fifo->graphics_burst_size = cbs;
-
- /* printf("VID LWM: %f bytes, prog: 0x%x, bs: %d\n, ", vlwm, data, vbs ); */
- fifo->video_lwm = 1024; fifo->video_burst_size = 512;
- }
-}
-static void nv10UpdateArbitrationSettings
-(
- unsigned VClk,
- unsigned pixelDepth,
- unsigned *burst,
- unsigned *lwm,
- RIVA_HW_INST *chip
-)
-{
- nv10_fifo_info fifo_data;
- nv10_sim_state sim_data;
- unsigned int M, N, P, pll, MClk, NVClk, cfg1;
-
- pll = chip->PRAMDAC0[0x00000504/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- MClk = (N * chip->CrystalFreqKHz / M) >> P;
- pll = chip->PRAMDAC0[0x00000500/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- NVClk = (N * chip->CrystalFreqKHz / M) >> P;
- cfg1 = chip->PFB[0x00000204/4];
- sim_data.pix_bpp = (char)pixelDepth;
- sim_data.enable_video = 0;
- sim_data.enable_mp = 0;
- sim_data.memory_type = (chip->PFB[0x00000200/4] & 0x01) ? 1 : 0;
- sim_data.memory_width = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64;
- sim_data.mem_latency = (char)cfg1 & 0x0F;
- sim_data.mem_aligned = 1;
- sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));
- sim_data.gr_during_vid = 0;
- sim_data.pclk_khz = VClk;
- sim_data.mclk_khz = MClk;
- sim_data.nvclk_khz = NVClk;
- nv10CalcArbitration(&fifo_data, &sim_data);
- if (fifo_data.valid)
- {
- int b = fifo_data.graphics_burst_size >> 4;
- *burst = 0;
- while (b >>= 1) (*burst)++;
- *lwm = fifo_data.graphics_lwm >> 3;
- }
-}
-
-static void nForceUpdateArbitrationSettings
-(
- unsigned VClk,
- unsigned pixelDepth,
- unsigned *burst,
- unsigned *lwm,
- RIVA_HW_INST *chip
-)
-{
- nv10_fifo_info fifo_data;
- nv10_sim_state sim_data;
- unsigned int M, N, P, pll, MClk, NVClk;
- unsigned int uMClkPostDiv, memctrl;
-
- uMClkPostDiv = (pciReadLong(pciTag(0, 0, 3), 0x6C) >> 8) & 0xf;
- if(!uMClkPostDiv) uMClkPostDiv = 4;
- MClk = 400000 / uMClkPostDiv;
-
- pll = chip->PRAMDAC0[0x00000500/4];
- M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
- NVClk = (N * chip->CrystalFreqKHz / M) >> P;
- sim_data.pix_bpp = (char)pixelDepth;
- sim_data.enable_video = 0;
- sim_data.enable_mp = 0;
- sim_data.memory_type = (pciReadLong(pciTag(0, 0, 1), 0x7C) >> 12) & 1;
- sim_data.memory_width = 64;
-
- memctrl = pciReadLong(pciTag(0, 0, 3), 0x00) >> 16;
-
- if((memctrl == 0x1A9) || (memctrl == 0x1AB) || (memctrl == 0x1ED)) {
- int dimm[3];
-
- dimm[0] = (pciReadLong(pciTag(0, 0, 2), 0x40) >> 8) & 0x4F;
- dimm[1] = (pciReadLong(pciTag(0, 0, 2), 0x44) >> 8) & 0x4F;
- dimm[2] = (pciReadLong(pciTag(0, 0, 2), 0x48) >> 8) & 0x4F;
-
- if((dimm[0] + dimm[1]) != dimm[2]) {
- ErrorF("WARNING: "
- "your nForce DIMMs are not arranged in optimal banks!\n");
- }
- }
-
- sim_data.mem_latency = 3;
- sim_data.mem_aligned = 1;
- sim_data.mem_page_miss = 10;
- sim_data.gr_during_vid = 0;
- sim_data.pclk_khz = VClk;
- sim_data.mclk_khz = MClk;
- sim_data.nvclk_khz = NVClk;
- nv10CalcArbitration(&fifo_data, &sim_data);
- if (fifo_data.valid)
- {
- int b = fifo_data.graphics_burst_size >> 4;
- *burst = 0;
- while (b >>= 1) (*burst)++;
- *lwm = fifo_data.graphics_lwm >> 3;
- }
-}
-
/****************************************************************************\
* *
@@ -1174,15 +602,15 @@ static int CalcVClock
if (chip->CrystalFreqKHz == 13500)
{
lowM = 7;
- highM = 13 - (chip->Architecture == NV_ARCH_03);
+ highM = 12;
}
else
{
lowM = 8;
- highM = 14 - (chip->Architecture == NV_ARCH_03);
+ highM = 13;
}
- highP = 4 - (chip->Architecture == NV_ARCH_03);
+ highP = 3;
for (P = 0; P <= highP; P ++)
{
Freq = VClk << P;
@@ -1240,73 +668,23 @@ static void CalcStateExt
pixelDepth = (bpp + 1)/8;
CalcVClock(dotClock, &VClk, &m, &n, &p, chip);
- switch (chip->Architecture)
- {
- case NV_ARCH_03:
- nv3UpdateArbitrationSettings(VClk,
- pixelDepth * 8,
- &(state->arbitration0),
- &(state->arbitration1),
- chip);
- state->cursor0 = 0x00;
- state->cursor1 = 0x78;
- if (flags & V_DBLSCAN)
- state->cursor1 |= 2;
- state->cursor2 = 0x00000000;
- state->pllsel = 0x10010100;
- state->config = ((width + 31)/32)
- | (((pixelDepth > 2) ? 3 : pixelDepth) << 8)
- | 0x1000;
- state->general = 0x00100100;
- state->repaint1 = hDisplaySize < 1280 ? 0x06 : 0x02;
- break;
- case NV_ARCH_04:
- nv4UpdateArbitrationSettings(VClk,
- pixelDepth * 8,
- &(state->arbitration0),
- &(state->arbitration1),
- chip);
- state->cursor0 = 0x00;
- state->cursor1 = 0xFC;
- if (flags & V_DBLSCAN)
- state->cursor1 |= 2;
- state->cursor2 = 0x00000000;
- state->pllsel = 0x10000700;
- state->config = 0x00001114;
- state->general = bpp == 16 ? 0x00101100 : 0x00100100;
- state->repaint1 = hDisplaySize < 1280 ? 0x04 : 0x00;
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
- if(((chip->Chipset & 0xffff) == 0x01A0) ||
- ((chip->Chipset & 0xffff) == 0x01f0))
- {
- nForceUpdateArbitrationSettings(VClk,
- pixelDepth * 8,
- &(state->arbitration0),
- &(state->arbitration1),
- chip);
- } else {
- nv10UpdateArbitrationSettings(VClk,
- pixelDepth * 8,
- &(state->arbitration0),
- &(state->arbitration1),
- chip);
- }
- state->cursor0 = 0x80 | (chip->CursorStart >> 17);
- state->cursor1 = (chip->CursorStart >> 11) << 2;
- state->cursor2 = chip->CursorStart >> 24;
- if (flags & V_DBLSCAN)
- state->cursor1 |= 2;
- state->pllsel = 0x10000700;
- state->config = chip->PFB[0x00000200/4];
- state->general = bpp == 16 ? 0x00101100 : 0x00100100;
- state->repaint1 = hDisplaySize < 1280 ? 0x04 : 0x00;
- break;
- }
+ nv3UpdateArbitrationSettings(VClk,
+ pixelDepth * 8,
+ &(state->arbitration0),
+ &(state->arbitration1),
+ chip);
+ state->cursor0 = 0x00;
+ state->cursor1 = 0x78;
+ if (flags & V_DBLSCAN)
+ state->cursor1 |= 2;
+ state->cursor2 = 0x00000000;
+ state->pllsel = 0x10010100;
+ state->config = ((width + 31)/32)
+ | (((pixelDepth > 2) ? 3 : pixelDepth) << 8)
+ | 0x1000;
+ state->general = 0x00100100;
+ state->repaint1 = hDisplaySize < 1280 ? 0x06 : 0x02;
- if((bpp != 8) && (chip->Architecture != NV_ARCH_03)) /* DirectColor */
- state->general |= 0x00000030;
state->vpll = (p << 16) | (n << 8) | m;
state->repaint0 = (((width/8)*pixelDepth) & 0x700) >> 3;
@@ -1337,18 +715,6 @@ static void UpdateFifoState
RIVA_HW_INST *chip
)
{
- int i;
-
- switch (chip->Architecture)
- {
- case NV_ARCH_04:
- LOAD_FIXED_STATE(nv4,FIFO);
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
- LOAD_FIXED_STATE(nv10,FIFO);
- break;
- }
}
static void LoadStateExt
(
@@ -1356,281 +722,48 @@ static void LoadStateExt
RIVA_HW_STATE *state
)
{
- int i, format;
+ int i;
/*
* Load HW fixed function state.
*/
LOAD_FIXED_STATE(Riva,PMC);
LOAD_FIXED_STATE(Riva,PTIMER);
- switch (chip->Architecture)
+ /*
+ * Make sure frame buffer config gets set before loading PRAMIN.
+ */
+ chip->PFB[0x00000200/4] = state->config;
+ LOAD_FIXED_STATE(nv3,PFIFO);
+ LOAD_FIXED_STATE(nv3,PRAMIN);
+ LOAD_FIXED_STATE(nv3,PGRAPH);
+ switch (state->bpp)
{
- case NV_ARCH_03:
- /*
- * Make sure frame buffer config gets set before loading PRAMIN.
- */
- chip->PFB[0x00000200/4] = state->config;
- LOAD_FIXED_STATE(nv3,PFIFO);
- LOAD_FIXED_STATE(nv3,PRAMIN);
- LOAD_FIXED_STATE(nv3,PGRAPH);
- switch (state->bpp)
- {
- case 15:
- case 16:
- LOAD_FIXED_STATE_15BPP(nv3,PRAMIN);
- LOAD_FIXED_STATE_15BPP(nv3,PGRAPH);
- break;
- case 24:
- case 32:
- LOAD_FIXED_STATE_32BPP(nv3,PRAMIN);
- LOAD_FIXED_STATE_32BPP(nv3,PGRAPH);
- break;
- case 8:
- default:
- LOAD_FIXED_STATE_8BPP(nv3,PRAMIN);
- LOAD_FIXED_STATE_8BPP(nv3,PGRAPH);
- break;
- }
- for (i = 0x00000; i < 0x00800; i++)
- chip->PRAMIN[0x00000502 + i] = (i << 12) | 0x03;
- chip->PGRAPH[0x00000630/4] = state->offset;
- chip->PGRAPH[0x00000634/4] = state->offset;
- chip->PGRAPH[0x00000638/4] = state->offset;
- chip->PGRAPH[0x0000063C/4] = state->offset;
- chip->PGRAPH[0x00000650/4] = state->pitch;
- chip->PGRAPH[0x00000654/4] = state->pitch;
- chip->PGRAPH[0x00000658/4] = state->pitch;
- chip->PGRAPH[0x0000065C/4] = state->pitch;
- break;
- case NV_ARCH_04:
- /*
- * Make sure frame buffer config gets set before loading PRAMIN.
- */
- chip->PFB[0x00000200/4] = state->config;
- LOAD_FIXED_STATE(nv4,PFIFO);
- LOAD_FIXED_STATE(nv4,PRAMIN);
- LOAD_FIXED_STATE(nv4,PGRAPH);
- switch (state->bpp)
- {
- case 15:
- LOAD_FIXED_STATE_15BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_15BPP(nv4,PGRAPH);
- break;
- case 16:
- LOAD_FIXED_STATE_16BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_16BPP(nv4,PGRAPH);
- break;
- case 24:
- case 32:
- LOAD_FIXED_STATE_32BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_32BPP(nv4,PGRAPH);
- break;
- case 8:
- default:
- LOAD_FIXED_STATE_8BPP(nv4,PRAMIN);
- LOAD_FIXED_STATE_8BPP(nv4,PGRAPH);
- break;
- }
- chip->PGRAPH[0x00000640/4] = state->offset;
- chip->PGRAPH[0x00000644/4] = state->offset;
- chip->PGRAPH[0x00000648/4] = state->offset;
- chip->PGRAPH[0x0000064C/4] = state->offset;
- chip->PGRAPH[0x00000670/4] = state->pitch;
- chip->PGRAPH[0x00000674/4] = state->pitch;
- chip->PGRAPH[0x00000678/4] = state->pitch;
- chip->PGRAPH[0x0000067C/4] = state->pitch;
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
- if(chip->twoHeads) {
- VGA_WR08(chip->PCIO, 0x03D4, 0x44);
- VGA_WR08(chip->PCIO, 0x03D5, state->crtcOwner);
- chip->LockUnlock(chip, 0);
- }
-
- LOAD_FIXED_STATE(nv10,PFIFO);
- LOAD_FIXED_STATE(nv10,PRAMIN);
- LOAD_FIXED_STATE(nv10,PGRAPH);
- switch (state->bpp)
- {
- case 15:
- format = 2;
- LOAD_FIXED_STATE_15BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_15BPP(nv10,PGRAPH);
- break;
- case 16:
- format = 5;
- LOAD_FIXED_STATE_16BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_16BPP(nv10,PGRAPH);
- break;
- case 32:
- format = 7;
- LOAD_FIXED_STATE_32BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_32BPP(nv10,PGRAPH);
- break;
- default:
- format = 1;
- LOAD_FIXED_STATE_8BPP(nv10,PRAMIN);
- LOAD_FIXED_STATE_8BPP(nv10,PGRAPH);
- break;
- }
-
- if(chip->Architecture == NV_ARCH_10) {
- chip->PGRAPH[0x00000640/4] = state->offset;
- chip->PGRAPH[0x00000644/4] = state->offset;
- chip->PGRAPH[0x00000648/4] = state->offset;
- chip->PGRAPH[0x0000064C/4] = state->offset;
- chip->PGRAPH[0x00000670/4] = state->pitch;
- chip->PGRAPH[0x00000674/4] = state->pitch;
- chip->PGRAPH[0x00000678/4] = state->pitch;
- chip->PGRAPH[0x0000067C/4] = state->pitch;
- chip->PGRAPH[0x00000680/4] = state->pitch;
- } else {
- chip->PGRAPH[0x00000864/4] = 0x01ffffff;
- chip->PGRAPH[0x00000868/4] = 0x01ffffff;
- chip->PGRAPH[0x0000086c/4] = 0x01ffffff;
- chip->PGRAPH[0x00000870/4] = 0x01ffffff;
-
- chip->PGRAPH[0x00000820/4] = state->offset;
- chip->PGRAPH[0x00000824/4] = state->offset;
- chip->PGRAPH[0x00000828/4] = state->offset;
- chip->PGRAPH[0x0000082C/4] = state->offset;
- chip->PGRAPH[0x00000850/4] = state->pitch;
- chip->PGRAPH[0x00000854/4] = state->pitch;
- chip->PGRAPH[0x00000858/4] = state->pitch;
- chip->PGRAPH[0x0000085C/4] = state->pitch;
- chip->PGRAPH[0x000009A4/4] = chip->PFB[0x00000200/4];
- chip->PGRAPH[0x000009A8/4] = chip->PFB[0x00000204/4];
-
- if((chip->Chipset & 0x0ff0) >= 0x0300) {
- if(!chip->flatPanel) {
- chip->PRAMDAC0[0x0578/4] = state->vpllB;
- chip->PRAMDAC0[0x057C/4] = state->vpll2B;
- }
- chip->PGRAPH[0x00000724/4] = format | (format << 5);
- chip->PGRAPH[0x0000008C/4] |= 1;
- chip->PGRAPH[0x00000890/4] |= 0x00040000;
- }
- }
- if(chip->twoHeads) {
- chip->PCRTC0[0x00000860/4] = state->head;
- chip->PCRTC0[0x00002860/4] = state->head2;
- }
- chip->PRAMDAC[0x00000404/4] |= (1 << 25);
-
- chip->PMC[0x00008704/4] = 1;
- chip->PMC[0x00008140/4] = 0;
- chip->PMC[0x00008920/4] = 0;
- chip->PMC[0x00008924/4] = 0;
- chip->PMC[0x00008908/4] = 0x01ffffff;
- chip->PMC[0x0000890C/4] = 0x01ffffff;
- chip->PMC[0x00001588/4] = 0;
-
- chip->PFB[0x00000240/4] = 0;
- chip->PFB[0x00000250/4] = 0;
- chip->PFB[0x00000260/4] = 0;
- chip->PFB[0x00000270/4] = 0;
- chip->PFB[0x00000280/4] = 0;
- chip->PFB[0x00000290/4] = 0;
- chip->PFB[0x000002A0/4] = 0;
- chip->PFB[0x000002B0/4] = 0;
-
- chip->PGRAPH[0x00000B00/4] = chip->PFB[0x00000240/4];
- chip->PGRAPH[0x00000B04/4] = chip->PFB[0x00000244/4];
- chip->PGRAPH[0x00000B08/4] = chip->PFB[0x00000248/4];
- chip->PGRAPH[0x00000B0C/4] = chip->PFB[0x0000024C/4];
- chip->PGRAPH[0x00000B10/4] = chip->PFB[0x00000250/4];
- chip->PGRAPH[0x00000B14/4] = chip->PFB[0x00000254/4];
- chip->PGRAPH[0x00000B18/4] = chip->PFB[0x00000258/4];
- chip->PGRAPH[0x00000B1C/4] = chip->PFB[0x0000025C/4];
- chip->PGRAPH[0x00000B20/4] = chip->PFB[0x00000260/4];
- chip->PGRAPH[0x00000B24/4] = chip->PFB[0x00000264/4];
- chip->PGRAPH[0x00000B28/4] = chip->PFB[0x00000268/4];
- chip->PGRAPH[0x00000B2C/4] = chip->PFB[0x0000026C/4];
- chip->PGRAPH[0x00000B30/4] = chip->PFB[0x00000270/4];
- chip->PGRAPH[0x00000B34/4] = chip->PFB[0x00000274/4];
- chip->PGRAPH[0x00000B38/4] = chip->PFB[0x00000278/4];
- chip->PGRAPH[0x00000B3C/4] = chip->PFB[0x0000027C/4];
- chip->PGRAPH[0x00000B40/4] = chip->PFB[0x00000280/4];
- chip->PGRAPH[0x00000B44/4] = chip->PFB[0x00000284/4];
- chip->PGRAPH[0x00000B48/4] = chip->PFB[0x00000288/4];
- chip->PGRAPH[0x00000B4C/4] = chip->PFB[0x0000028C/4];
- chip->PGRAPH[0x00000B50/4] = chip->PFB[0x00000290/4];
- chip->PGRAPH[0x00000B54/4] = chip->PFB[0x00000294/4];
- chip->PGRAPH[0x00000B58/4] = chip->PFB[0x00000298/4];
- chip->PGRAPH[0x00000B5C/4] = chip->PFB[0x0000029C/4];
- chip->PGRAPH[0x00000B60/4] = chip->PFB[0x000002A0/4];
- chip->PGRAPH[0x00000B64/4] = chip->PFB[0x000002A4/4];
- chip->PGRAPH[0x00000B68/4] = chip->PFB[0x000002A8/4];
- chip->PGRAPH[0x00000B6C/4] = chip->PFB[0x000002AC/4];
- chip->PGRAPH[0x00000B70/4] = chip->PFB[0x000002B0/4];
- chip->PGRAPH[0x00000B74/4] = chip->PFB[0x000002B4/4];
- chip->PGRAPH[0x00000B78/4] = chip->PFB[0x000002B8/4];
- chip->PGRAPH[0x00000B7C/4] = chip->PFB[0x000002BC/4];
- chip->PGRAPH[0x00000F40/4] = 0x10000000;
- chip->PGRAPH[0x00000F44/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00000040;
- chip->PGRAPH[0x00000F54/4] = 0x00000008;
- chip->PGRAPH[0x00000F50/4] = 0x00000200;
- for (i = 0; i < (3*16); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00000040;
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00000800;
- for (i = 0; i < (16*16); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F40/4] = 0x30000000;
- chip->PGRAPH[0x00000F44/4] = 0x00000004;
- chip->PGRAPH[0x00000F50/4] = 0x00006400;
- for (i = 0; i < (59*4); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00006800;
- for (i = 0; i < (47*4); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00006C00;
- for (i = 0; i < (3*4); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00007000;
- for (i = 0; i < (19*4); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00007400;
- for (i = 0; i < (12*4); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00007800;
- for (i = 0; i < (12*4); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00004400;
- for (i = 0; i < (8*4); i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00000000;
- for (i = 0; i < 16; i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
- chip->PGRAPH[0x00000F50/4] = 0x00000040;
- for (i = 0; i < 4; i++)
- chip->PGRAPH[0x00000F54/4] = 0x00000000;
-
- chip->PCRTC[0x00000810/4] = state->cursorConfig;
-
- if(chip->flatPanel) {
- if((chip->Chipset & 0x0ff0) == 0x0110) {
- chip->PRAMDAC[0x0528/4] = state->dither;
- } else
- if((chip->Chipset & 0x0ff0) >= 0x0170) {
- chip->PRAMDAC[0x083C/4] = state->dither;
- }
-
-
- VGA_WR08(chip->PCIO, 0x03D4, 0x53);
- VGA_WR08(chip->PCIO, 0x03D5, 0);
- VGA_WR08(chip->PCIO, 0x03D4, 0x54);
- VGA_WR08(chip->PCIO, 0x03D5, 0);
- VGA_WR08(chip->PCIO, 0x03D4, 0x21);
- VGA_WR08(chip->PCIO, 0x03D5, 0xfa);
- }
-
- VGA_WR08(chip->PCIO, 0x03D4, 0x41);
- VGA_WR08(chip->PCIO, 0x03D5, state->extra);
+ case 15:
+ case 16:
+ LOAD_FIXED_STATE_15BPP(nv3,PRAMIN);
+ LOAD_FIXED_STATE_15BPP(nv3,PGRAPH);
+ break;
+ case 24:
+ case 32:
+ LOAD_FIXED_STATE_32BPP(nv3,PRAMIN);
+ LOAD_FIXED_STATE_32BPP(nv3,PGRAPH);
+ break;
+ case 8:
+ default:
+ LOAD_FIXED_STATE_8BPP(nv3,PRAMIN);
+ LOAD_FIXED_STATE_8BPP(nv3,PGRAPH);
+ break;
}
+ for (i = 0x00000; i < 0x00800; i++)
+ chip->PRAMIN[0x00000502 + i] = (i << 12) | 0x03;
+ chip->PGRAPH[0x00000630/4] = state->offset;
+ chip->PGRAPH[0x00000634/4] = state->offset;
+ chip->PGRAPH[0x00000638/4] = state->offset;
+ chip->PGRAPH[0x0000063C/4] = state->offset;
+ chip->PGRAPH[0x00000650/4] = state->pitch;
+ chip->PGRAPH[0x00000654/4] = state->pitch;
+ chip->PGRAPH[0x00000658/4] = state->pitch;
+ chip->PGRAPH[0x0000065C/4] = state->pitch;
LOAD_FIXED_STATE(Riva,FIFO);
UpdateFifoState(chip);
@@ -1661,14 +794,8 @@ static void LoadStateExt
VGA_WR08(chip->PCIO, 0x03D4, 0x39);
VGA_WR08(chip->PCIO, 0x03D5, state->interlace);
- if(!chip->flatPanel) {
- chip->PRAMDAC0[0x00000508/4] = state->vpll;
- chip->PRAMDAC0[0x0000050C/4] = state->pllsel;
- if(chip->twoHeads)
- chip->PRAMDAC0[0x00000520/4] = state->vpll2;
- } else {
- chip->PRAMDAC[0x00000848/4] = state->scale;
- }
+ chip->PRAMDAC[0x00000508/4] = state->vpll;
+ chip->PRAMDAC[0x0000050C/4] = state->pllsel;
chip->PRAMDAC[0x00000600/4] = state->general;
/*
@@ -1723,59 +850,15 @@ static void UnloadStateExt
state->cursor2 = VGA_RD08(chip->PCIO, 0x03D5);
VGA_WR08(chip->PCIO, 0x03D4, 0x39);
state->interlace = VGA_RD08(chip->PCIO, 0x03D5);
- state->vpll = chip->PRAMDAC0[0x00000508/4];
- state->vpll2 = chip->PRAMDAC0[0x00000520/4];
- state->vpllB = chip->PRAMDAC0[0x00000578/4];
- state->vpll2B = chip->PRAMDAC0[0x0000057C/4];
- state->pllsel = chip->PRAMDAC0[0x0000050C/4];
+ state->vpll = chip->PRAMDAC[0x00000508/4];
+ state->pllsel = chip->PRAMDAC[0x0000050C/4];
state->general = chip->PRAMDAC[0x00000600/4];
- state->scale = chip->PRAMDAC[0x00000848/4];
state->config = chip->PFB[0x00000200/4];
-
- switch (chip->Architecture)
- {
- case NV_ARCH_03:
- state->offset = chip->PGRAPH[0x00000630/4];
- state->pitch = chip->PGRAPH[0x00000650/4];
- break;
- case NV_ARCH_04:
- state->offset = chip->PGRAPH[0x00000640/4];
- state->pitch = chip->PGRAPH[0x00000670/4];
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
- state->offset = chip->PGRAPH[0x00000640/4];
- state->pitch = chip->PGRAPH[0x00000670/4];
- if(chip->twoHeads) {
- state->head = chip->PCRTC0[0x00000860/4];
- state->head2 = chip->PCRTC0[0x00002860/4];
- VGA_WR08(chip->PCIO, 0x03D4, 0x44);
- state->crtcOwner = VGA_RD08(chip->PCIO, 0x03D5);
- }
- VGA_WR08(chip->PCIO, 0x03D4, 0x41);
- state->extra = VGA_RD08(chip->PCIO, 0x03D5);
- state->cursorConfig = chip->PCRTC[0x00000810/4];
-
- if((chip->Chipset & 0x0ff0) == 0x0110) {
- state->dither = chip->PRAMDAC[0x0528/4];
- } else
- if((chip->Chipset & 0x0ff0) >= 0x0170) {
- state->dither = chip->PRAMDAC[0x083C/4];
- }
-
- break;
- }
-}
-static void SetStartAddress
-(
- RIVA_HW_INST *chip,
- unsigned start
-)
-{
- chip->PCRTC[0x800/4] = start;
+ state->offset = chip->PGRAPH[0x00000630/4];
+ state->pitch = chip->PGRAPH[0x00000650/4];
}
-static void SetStartAddress3
+static void SetStartAddress
(
RIVA_HW_INST *chip,
unsigned start
@@ -1880,211 +963,17 @@ static void nv3GetConfig
chip->CalcStateExt = CalcStateExt;
chip->LoadStateExt = LoadStateExt;
chip->UnloadStateExt = UnloadStateExt;
- chip->SetStartAddress = SetStartAddress3;
- chip->LockUnlock = nv3LockUnlock;
-}
-static void nv4GetConfig
-(
- RIVA_HW_INST *chip
-)
-{
- /*
- * Fill in chip configuration.
- */
- if (chip->PFB[0x00000000/4] & 0x00000100)
- {
- chip->RamAmountKBytes = ((chip->PFB[0x00000000/4] >> 12) & 0x0F) * 1024 * 2
- + 1024 * 2;
- }
- else
- {
- switch (chip->PFB[0x00000000/4] & 0x00000003)
- {
- case 0:
- chip->RamAmountKBytes = 1024 * 32;
- break;
- case 1:
- chip->RamAmountKBytes = 1024 * 4;
- break;
- case 2:
- chip->RamAmountKBytes = 1024 * 8;
- break;
- case 3:
- default:
- chip->RamAmountKBytes = 1024 * 16;
- break;
- }
- }
- switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003)
- {
- case 3:
- chip->RamBandwidthKBytesPerSec = 800000;
- break;
- default:
- chip->RamBandwidthKBytesPerSec = 1000000;
- break;
- }
- chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500;
- chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]);
- chip->VBlankBit = 0x00000001;
- chip->MaxVClockFreqKHz = 350000;
- /*
- * Set chip functions.
- */
- chip->Busy = nv4Busy;
- chip->ShowHideCursor = ShowHideCursor;
- chip->CalcStateExt = CalcStateExt;
- chip->LoadStateExt = LoadStateExt;
- chip->UnloadStateExt = UnloadStateExt;
- chip->SetStartAddress = SetStartAddress;
- chip->LockUnlock = nv4LockUnlock;
-}
-static void nv10GetConfig
-(
- NVPtr pNv
-)
-{
- RIVA_HW_INST *chip = &pNv->riva;
-
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- /* turn on big endian register access */
- if(!(chip->PMC[0x00000004/4] & 0x01000001))
- chip->PMC[0x00000004/4] = 0x01000001;
-#endif
-
- /*
- * Fill in chip configuration.
- */
- if((pNv->Chipset && 0xffff) == 0x01a0) {
- int amt = pciReadLong(pciTag(0, 0, 1), 0x7C);
-
- chip->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;
- } else if((pNv->Chipset & 0xffff) == 0x01f0) {
- int amt = pciReadLong(pciTag(0, 0, 1), 0x84);
-
- chip->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
- } else {
- switch ((chip->PFB[0x0000020C/4] >> 20) & 0x000000FF)
- {
- case 0x02:
- chip->RamAmountKBytes = 1024 * 2;
- break;
- case 0x04:
- chip->RamAmountKBytes = 1024 * 4;
- break;
- case 0x08:
- chip->RamAmountKBytes = 1024 * 8;
- break;
- case 0x10:
- chip->RamAmountKBytes = 1024 * 16;
- break;
- case 0x20:
- chip->RamAmountKBytes = 1024 * 32;
- break;
- case 0x40:
- chip->RamAmountKBytes = 1024 * 64;
- break;
- case 0x80:
- chip->RamAmountKBytes = 1024 * 128;
- break;
- default:
- chip->RamAmountKBytes = 1024 * 16;
- break;
- }
- }
- switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003)
- {
- case 3:
- chip->RamBandwidthKBytesPerSec = 800000;
- break;
- default:
- chip->RamBandwidthKBytesPerSec = 1000000;
- break;
- }
-
- chip->CrystalFreqKHz = (chip->PEXTDEV[0x0000/4] & (1 << 6)) ? 14318 :
- 13500;
- switch(pNv->Chipset & 0x0ff0) {
- case 0x0170:
- case 0x0180:
- case 0x01F0:
- case 0x0250:
- case 0x0280:
- case 0x0300:
- case 0x0310:
- case 0x0320:
- case 0x0330:
- case 0x0340:
- if(chip->PEXTDEV[0x0000/4] & (1 << 22))
- chip->CrystalFreqKHz = 27000;
- break;
- default:
- break;
- }
-
- chip->CursorStart = (chip->RamAmountKBytes - 128) * 1024;
- chip->CURSOR = NULL; /* can't set this here */
- chip->VBlankBit = 0x00000001;
- chip->MaxVClockFreqKHz = 350000;
- /*
- * Set chip functions.
- */
- chip->Busy = nv10Busy;
- chip->ShowHideCursor = ShowHideCursor;
- chip->CalcStateExt = CalcStateExt;
- chip->LoadStateExt = LoadStateExt;
- chip->UnloadStateExt = UnloadStateExt;
chip->SetStartAddress = SetStartAddress;
- chip->LockUnlock = nv4LockUnlock;
-
- switch(pNv->Chipset & 0x0ff0) {
- case 0x0110:
- case 0x0170:
- case 0x0180:
- case 0x01F0:
- case 0x0250:
- case 0x0280:
- case 0x0300:
- case 0x0310:
- case 0x0320:
- case 0x0330:
- case 0x0340:
- chip->twoHeads = TRUE;
- break;
- default:
- chip->twoHeads = FALSE;
- break;
- }
+ chip->LockUnlock = nv3LockUnlock;
}
int RivaGetConfig
(
- NVPtr pNv
+ RivaPtr pRiva
)
{
- RIVA_HW_INST *chip = &pNv->riva;
- /*
- * Save this so future SW know whats it's dealing with.
- */
- chip->Version = RIVA_SW_VERSION;
- /*
- * Chip specific configuration.
- */
- switch (chip->Architecture)
- {
- case NV_ARCH_03:
- nv3GetConfig(chip);
- break;
- case NV_ARCH_04:
- nv4GetConfig(chip);
- break;
- case NV_ARCH_10:
- case NV_ARCH_20:
- nv10GetConfig(pNv);
- break;
- default:
- return (-1);
- }
- chip->Chipset = pNv->Chipset;
+ RIVA_HW_INST *chip = &pRiva->riva;
+
+ nv3GetConfig(chip);
/*
* Fill in FIFO pointers.
*/
diff --git a/src/riva_hw.h b/src/riva_hw.h
index 8d53d4f..ec2b90b 100644
--- a/src/riva_hw.h
+++ b/src/riva_hw.h
@@ -36,18 +36,13 @@
|* those rights set forth herein. *|
|* *|
\***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.24 2003/02/10 23:42:51 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.26 2003/07/31 20:24:31 mvojkovi Exp $ */
#ifndef __RIVA_HW_H__
#define __RIVA_HW_H__
-#define RIVA_SW_VERSION 0x00010003
/*
* Define supported architectures.
*/
-#define NV_ARCH_03 0x03
-#define NV_ARCH_04 0x04
-#define NV_ARCH_10 0x10
-#define NV_ARCH_20 0x20
/***************************************************************************\
* *
* FIFO registers. *
@@ -60,12 +55,8 @@
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop;
-#endif
U032 reserved01[0x0BB];
U032 Rop3;
} RivaRop;
@@ -75,12 +66,8 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop;
-#endif
U032 reserved01[0x0BD];
U032 Shape;
U032 reserved03[0x001];
@@ -94,12 +81,8 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop;
-#endif
U032 reserved01[0x0BB];
U032 TopLeft;
U032 WidthHeight;
@@ -110,12 +93,8 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop[1];
-#endif
U032 reserved01[0x0BC];
U032 Color;
U032 reserved03[0x03E];
@@ -128,12 +107,8 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop;
-#endif
U032 reserved01[0x0BB];
U032 TopLeftSrc;
U032 TopLeftDst;
@@ -145,12 +120,8 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop[1];
-#endif
U032 reserved01[0x0BC];
U032 TopLeft;
U032 WidthHeight;
@@ -164,12 +135,8 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop;
-#endif
U032 reserved01[0x0BB];
U032 reserved03[(0x040)-1];
U032 Color1A;
@@ -230,12 +197,8 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop[1];
-#endif
U032 reserved01[0x0BC];
U032 Color; /* source color 0304-0307*/
U032 Reserved02[0x03e];
@@ -265,24 +228,16 @@ typedef volatile struct
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop;
-#endif
U032 reserved01[0x0BE];
U032 Offset;
} RivaSurface;
typedef volatile struct
{
U032 reserved00[4];
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- U032 FifoFree;
-#else
U016 FifoFree;
U016 Nop;
-#endif
U032 reserved01[0x0BD];
U032 Pitch;
U032 RenderBufferOffset;
@@ -308,9 +263,6 @@ typedef struct _riva_hw_inst
/*
* Chip specific settings.
*/
- U032 Architecture;
- U032 Version;
- U032 Chipset;
U032 CrystalFreqKHz;
U032 RamAmountKBytes;
U032 MaxVClockFreqKHz;
@@ -321,14 +273,10 @@ typedef struct _riva_hw_inst
U032 FifoFreeCount;
U032 FifoEmptyCount;
U032 CursorStart;
- U032 flatPanel;
- Bool twoHeads;
/*
* Non-FIFO registers.
*/
- volatile U032 *PCRTC0;
volatile U032 *PCRTC;
- volatile U032 *PRAMDAC0;
volatile U032 *PFB;
volatile U032 *PFIFO;
volatile U032 *PGRAPH;
@@ -338,10 +286,8 @@ typedef struct _riva_hw_inst
volatile U032 *PRAMIN;
volatile U032 *FIFO;
volatile U032 *CURSOR;
- volatile U008 *PCIO0;
volatile U008 *PCIO;
volatile U008 *PVIO;
- volatile U008 *PDIO0;
volatile U008 *PDIO;
volatile U032 *PRAMDAC;
/*
@@ -381,22 +327,14 @@ typedef struct _riva_hw_state
U032 repaint0;
U032 repaint1;
U032 screen;
- U032 scale;
- U032 dither;
U032 extra;
U032 pixel;
U032 horiz;
U032 arbitration0;
U032 arbitration1;
U032 vpll;
- U032 vpll2;
- U032 vpllB;
- U032 vpll2B;
U032 pllsel;
U032 general;
- U032 crtcOwner;
- U032 head;
- U032 head2;
U032 config;
U032 cursorConfig;
U032 cursor0;
diff --git a/src/riva_tbl.h b/src/riva_tbl.h
index bc86c75..bb2a329 100644
--- a/src/riva_tbl.h
+++ b/src/riva_tbl.h
@@ -36,7 +36,7 @@
|* those rights set forth herein. *|
|* *|
\***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_tbl.h,v 1.9 2002/01/30 01:35:03 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_tbl.h,v 1.10 2003/07/31 20:24:31 mvojkovi Exp $ */
/*
@@ -251,576 +251,4 @@ static unsigned nv3TablePRAMIN_32BPP[][2] =
{0x00000D1C, 0x10419208},
{0x00000D30, 0x10118201}
};
-static unsigned nv4TableFIFO[][2] =
-{
- {0x00003800, 0x80000014}
-};
-static unsigned nv4TablePFIFO[][2] =
-{
- {0x00000140, 0x00000000},
- {0x00000480, 0x00000000},
- {0x00000494, 0x00000000},
- {0x00000481, 0x00000000},
- {0x0000048B, 0x00000000},
- {0x00000400, 0x00000000},
- {0x00000414, 0x00000000},
- {0x00000084, 0x03000100},
- {0x00000085, 0x00000110},
- {0x00000086, 0x00000112},
- {0x00000143, 0x0000FFFF},
- {0x00000496, 0x0000FFFF},
- {0x00000050, 0x00000000},
- {0x00000040, 0xFFFFFFFF},
- {0x00000415, 0x00000001},
- {0x00000480, 0x00000001},
- {0x00000494, 0x00000001},
- {0x00000495, 0x00000001},
- {0x00000140, 0x00000001}
-};
-static unsigned nv4TablePGRAPH[][2] =
-{
- {0x00000020, 0x1231C001},
- {0x00000021, 0x72111101},
- {0x00000022, 0x11D5F071},
- {0x00000023, 0x10D4FF31},
- {0x00000060, 0x00000000},
- {0x00000068, 0x00000000},
- {0x00000070, 0x00000000},
- {0x00000078, 0x00000000},
- {0x00000061, 0x00000000},
- {0x00000069, 0x00000000},
- {0x00000071, 0x00000000},
- {0x00000079, 0x00000000},
- {0x00000062, 0x00000000},
- {0x0000006A, 0x00000000},
- {0x00000072, 0x00000000},
- {0x0000007A, 0x00000000},
- {0x00000063, 0x00000000},
- {0x0000006B, 0x00000000},
- {0x00000073, 0x00000000},
- {0x0000007B, 0x00000000},
- {0x00000064, 0x00000000},
- {0x0000006C, 0x00000000},
- {0x00000074, 0x00000000},
- {0x0000007C, 0x00000000},
- {0x00000065, 0x00000000},
- {0x0000006D, 0x00000000},
- {0x00000075, 0x00000000},
- {0x0000007D, 0x00000000},
- {0x00000066, 0x00000000},
- {0x0000006E, 0x00000000},
- {0x00000076, 0x00000000},
- {0x0000007E, 0x00000000},
- {0x00000067, 0x00000000},
- {0x0000006F, 0x00000000},
- {0x00000077, 0x00000000},
- {0x0000007F, 0x00000000},
- {0x00000058, 0x00000000},
- {0x00000059, 0x00000000},
- {0x0000005A, 0x00000000},
- {0x0000005B, 0x00000000},
- {0x00000196, 0x00000000},
- {0x000001A1, 0x01FFFFFF},
- {0x00000197, 0x00000000},
- {0x000001A2, 0x01FFFFFF},
- {0x00000198, 0x00000000},
- {0x000001A3, 0x01FFFFFF},
- {0x00000199, 0x00000000},
- {0x000001A4, 0x01FFFFFF},
- {0x00000050, 0x00000000},
- {0x00000040, 0xFFFFFFFF},
- {0x0000005C, 0x10010100},
- {0x000001C4, 0xFFFFFFFF},
- {0x000001C8, 0x00000001},
- {0x00000204, 0x00000000},
- {0x000001C3, 0x00000001}
-};
-static unsigned nv4TablePGRAPH_8BPP[][2] =
-{
- {0x000001C9, 0x00111111},
- {0x00000186, 0x00001010},
- {0x0000020C, 0x03020202}
-};
-static unsigned nv4TablePGRAPH_15BPP[][2] =
-{
- {0x000001C9, 0x00226222},
- {0x00000186, 0x00002071},
- {0x0000020C, 0x09080808}
-};
-static unsigned nv4TablePGRAPH_16BPP[][2] =
-{
- {0x000001C9, 0x00556555},
- {0x00000186, 0x000050C2},
- {0x0000020C, 0x0C0B0B0B}
-};
-static unsigned nv4TablePGRAPH_32BPP[][2] =
-{
- {0x000001C9, 0x0077D777},
- {0x00000186, 0x000070E5},
- {0x0000020C, 0x0E0D0D0D}
-};
-static unsigned nv4TablePRAMIN[][2] =
-{
- {0x00000000, 0x80000010},
- {0x00000001, 0x80011145},
- {0x00000002, 0x80000011},
- {0x00000003, 0x80011146},
- {0x00000004, 0x80000012},
- {0x00000005, 0x80011147},
- {0x00000006, 0x80000013},
- {0x00000007, 0x80011148},
- {0x00000008, 0x80000014},
- {0x00000009, 0x80011149},
- {0x0000000A, 0x80000015},
- {0x0000000B, 0x8001114A},
- {0x0000000C, 0x80000016},
- {0x0000000D, 0x8001114F},
- {0x00000020, 0x80000000},
- {0x00000021, 0x80011142},
- {0x00000022, 0x80000001},
- {0x00000023, 0x80011143},
- {0x00000024, 0x80000002},
- {0x00000025, 0x80011144},
- {0x00000026, 0x80000003},
- {0x00000027, 0x8001114B},
- {0x00000028, 0x80000004},
- {0x00000029, 0x8001114C},
- {0x0000002A, 0x80000005},
- {0x0000002B, 0x8001114D},
- {0x0000002C, 0x80000006},
- {0x0000002D, 0x8001114E},
- {0x00000500, 0x00003000},
- {0x00000501, 0x01FFFFFF},
- {0x00000502, 0x00000002},
- {0x00000503, 0x00000002},
- {0x00000508, 0x01008043},
- {0x0000050A, 0x00000000},
- {0x0000050B, 0x00000000},
- {0x0000050C, 0x01008019},
- {0x0000050E, 0x00000000},
- {0x0000050F, 0x00000000},
-#if 1
- {0x00000510, 0x01008018},
-#else
- {0x00000510, 0x01008044},
-#endif
- {0x00000512, 0x00000000},
- {0x00000513, 0x00000000},
- {0x00000514, 0x01008021},
- {0x00000516, 0x00000000},
- {0x00000517, 0x00000000},
- {0x00000518, 0x0100805F},
- {0x0000051A, 0x00000000},
- {0x0000051B, 0x00000000},
-#if 1
- {0x0000051C, 0x0100804B},
-#else
- {0x0000051C, 0x0100804A},
-#endif
- {0x0000051E, 0x00000000},
- {0x0000051F, 0x00000000},
- {0x00000520, 0x0100A048},
- {0x00000521, 0x00000D01},
- {0x00000522, 0x11401140},
- {0x00000523, 0x00000000},
- {0x00000524, 0x0300A054},
- {0x00000525, 0x00000D01},
- {0x00000526, 0x11401140},
- {0x00000527, 0x00000000},
- {0x00000528, 0x0300A055},
- {0x00000529, 0x00000D01},
- {0x0000052A, 0x11401140},
- {0x0000052B, 0x00000000},
- {0x0000052C, 0x00000058},
- {0x0000052E, 0x11401140},
- {0x0000052F, 0x00000000},
- {0x00000530, 0x00000059},
- {0x00000532, 0x11401140},
- {0x00000533, 0x00000000},
- {0x00000534, 0x0000005A},
- {0x00000536, 0x11401140},
- {0x00000537, 0x00000000},
- {0x00000538, 0x0000005B},
- {0x0000053A, 0x11401140},
- {0x0000053B, 0x00000000},
- {0x0000053C, 0x0300A01C},
- {0x0000053E, 0x11401140},
- {0x0000053F, 0x00000000}
-};
-static unsigned nv4TablePRAMIN_8BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000302},
- {0x0000050D, 0x00000302},
- {0x00000511, 0x00000202},
- {0x00000515, 0x00000302},
- {0x00000519, 0x00000302},
- {0x0000051D, 0x00000302},
- {0x0000052D, 0x00000302},
- {0x0000052E, 0x00000302},
- {0x00000535, 0x00000000},
- {0x00000539, 0x00000000},
- {0x0000053D, 0x00000302}
-};
-static unsigned nv4TablePRAMIN_15BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000902},
- {0x0000050D, 0x00000902},
- {0x00000511, 0x00000802},
- {0x00000515, 0x00000902},
- {0x00000519, 0x00000902},
- {0x0000051D, 0x00000902},
- {0x0000052D, 0x00000902},
- {0x0000052E, 0x00000902},
- {0x00000535, 0x00000702},
- {0x00000539, 0x00000702},
- {0x0000053D, 0x00000902}
-};
-static unsigned nv4TablePRAMIN_16BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000C02},
- {0x0000050D, 0x00000C02},
- {0x00000511, 0x00000B02},
- {0x00000515, 0x00000C02},
- {0x00000519, 0x00000C02},
- {0x0000051D, 0x00000C02},
- {0x0000052D, 0x00000C02},
- {0x0000052E, 0x00000C02},
- {0x00000535, 0x00000702},
- {0x00000539, 0x00000702},
- {0x0000053D, 0x00000C02}
-};
-static unsigned nv4TablePRAMIN_32BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000E02},
- {0x0000050D, 0x00000E02},
- {0x00000511, 0x00000D02},
- {0x00000515, 0x00000E02},
- {0x00000519, 0x00000E02},
- {0x0000051D, 0x00000E02},
- {0x0000052D, 0x00000E02},
- {0x0000052E, 0x00000E02},
- {0x00000535, 0x00000E02},
- {0x00000539, 0x00000E02},
- {0x0000053D, 0x00000E02}
-};
-static unsigned nv10TableFIFO[][2] =
-{
- {0x00003800, 0x80000014}
-};
-static unsigned nv10TablePFIFO[][2] =
-{
- {0x00000140, 0x00000000},
- {0x00000480, 0x00000000},
- {0x00000494, 0x00000000},
- {0x00000481, 0x00000000},
- {0x0000048B, 0x00000000},
- {0x00000400, 0x00000000},
- {0x00000414, 0x00000000},
- {0x00000084, 0x03000100},
- {0x00000085, 0x00000110},
- {0x00000086, 0x00000112},
- {0x00000143, 0x0000FFFF},
- {0x00000496, 0x0000FFFF},
- {0x00000050, 0x00000000},
- {0x00000040, 0xFFFFFFFF},
- {0x00000415, 0x00000001},
- {0x00000480, 0x00000001},
- {0x00000494, 0x00000001},
- {0x00000495, 0x00000001},
- {0x00000140, 0x00000001}
-};
-static unsigned nv10TablePGRAPH[][2] =
-{
- {0x00000020, 0x0003FFFF},
- {0x00000021, 0x00118701},
- {0x00000022, 0x24F82AD9},
- {0x00000023, 0x55DE0030},
- {0x00000020, 0x00000000},
- {0x00000024, 0x00000000},
- {0x00000058, 0x00000000},
- {0x00000060, 0x00000000},
- {0x00000068, 0x00000000},
- {0x00000070, 0x00000000},
- {0x00000078, 0x00000000},
- {0x00000059, 0x00000000},
- {0x00000061, 0x00000000},
- {0x00000069, 0x00000000},
- {0x00000071, 0x00000000},
- {0x00000079, 0x00000000},
- {0x0000005A, 0x00000000},
- {0x00000062, 0x00000000},
- {0x0000006A, 0x00000000},
- {0x00000072, 0x00000000},
- {0x0000007A, 0x00000000},
- {0x0000005B, 0x00000000},
- {0x00000063, 0x00000000},
- {0x0000006B, 0x00000000},
- {0x00000073, 0x00000000},
- {0x0000007B, 0x00000000},
- {0x0000005C, 0x00000000},
- {0x00000064, 0x00000000},
- {0x0000006C, 0x00000000},
- {0x00000074, 0x00000000},
- {0x0000007C, 0x00000000},
- {0x0000005D, 0x00000000},
- {0x00000065, 0x00000000},
- {0x0000006D, 0x00000000},
- {0x00000075, 0x00000000},
- {0x0000007D, 0x00000000},
- {0x0000005E, 0x00000000},
- {0x00000066, 0x00000000},
- {0x0000006E, 0x00000000},
- {0x00000076, 0x00000000},
- {0x0000007E, 0x00000000},
- {0x0000005F, 0x00000000},
- {0x00000067, 0x00000000},
- {0x0000006F, 0x00000000},
- {0x00000077, 0x00000000},
- {0x0000007F, 0x00000000},
- {0x00000053, 0x00000000},
- {0x00000054, 0x00000000},
- {0x00000055, 0x00000000},
- {0x00000056, 0x00000000},
- {0x00000057, 0x00000000},
- {0x00000196, 0x00000000},
- {0x000001A1, 0x01FFFFFF},
- {0x00000197, 0x00000000},
- {0x000001A2, 0x01FFFFFF},
- {0x00000198, 0x00000000},
- {0x000001A3, 0x01FFFFFF},
- {0x00000199, 0x00000000},
- {0x000001A4, 0x01FFFFFF},
- {0x0000019A, 0x00000000},
- {0x000001A5, 0x01FFFFFF},
- {0x0000019B, 0x00000000},
- {0x000001A6, 0x01FFFFFF},
- {0x00000050, 0x01111111},
- {0x00000040, 0xFFFFFFFF},
- {0x00000051, 0x10010100},
- {0x000001C5, 0xFFFFFFFF},
- {0x000001C8, 0x00000001},
- {0x00000204, 0x00000000},
- {0x000001C4, 0x00000001}
-};
-static unsigned nv10TablePGRAPH_8BPP[][2] =
-{
- {0x000001C9, 0x00111111},
- {0x00000186, 0x00001010},
- {0x0000020C, 0x03020202}
-};
-static unsigned nv10TablePGRAPH_15BPP[][2] =
-{
- {0x000001C9, 0x00226222},
- {0x00000186, 0x00002071},
- {0x0000020C, 0x09080808}
-};
-static unsigned nv10TablePGRAPH_16BPP[][2] =
-{
- {0x000001C9, 0x00556555},
- {0x00000186, 0x000050C2},
- {0x0000020C, 0x000B0B0C}
-};
-static unsigned nv10TablePGRAPH_32BPP[][2] =
-{
- {0x000001C9, 0x0077D777},
- {0x00000186, 0x000070E5},
- {0x0000020C, 0x0E0D0D0D}
-};
-static unsigned nv10TablePRAMIN[][2] =
-{
- {0x00000000, 0x80000010},
- {0x00000001, 0x80011145},
- {0x00000002, 0x80000011},
- {0x00000003, 0x80011146},
- {0x00000004, 0x80000012},
- {0x00000005, 0x80011147},
- {0x00000006, 0x80000013},
- {0x00000007, 0x80011148},
- {0x00000008, 0x80000014},
- {0x00000009, 0x80011149},
- {0x0000000A, 0x80000015},
- {0x0000000B, 0x8001114A},
- {0x0000000C, 0x80000016},
- {0x0000000D, 0x80011150},
- {0x00000020, 0x80000000},
- {0x00000021, 0x80011142},
- {0x00000022, 0x80000001},
- {0x00000023, 0x80011143},
- {0x00000024, 0x80000002},
- {0x00000025, 0x80011144},
- {0x00000026, 0x80000003},
- {0x00000027, 0x8001114B},
- {0x00000028, 0x80000004},
- {0x00000029, 0x8001114C},
- {0x0000002A, 0x80000005},
- {0x0000002B, 0x8001114D},
- {0x0000002C, 0x80000006},
- {0x0000002D, 0x8001114E},
- {0x0000002E, 0x80000007},
- {0x0000002F, 0x8001114F},
- {0x00000500, 0x00003000},
- {0x00000501, 0x01FFFFFF},
- {0x00000502, 0x00000002},
- {0x00000503, 0x00000002},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x00000508, 0x01088043},
-#else
- {0x00000508, 0x01008043},
-#endif
- {0x0000050A, 0x00000000},
- {0x0000050B, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x0000050C, 0x01088019},
-#else
- {0x0000050C, 0x01008019},
-#endif
- {0x0000050E, 0x00000000},
- {0x0000050F, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x00000510, 0x01088018},
-#else
- {0x00000510, 0x01008018},
-#endif
- {0x00000512, 0x00000000},
- {0x00000513, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x00000514, 0x01088021},
-#else
- {0x00000514, 0x01008021},
-#endif
- {0x00000516, 0x00000000},
- {0x00000517, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x00000518, 0x0108805F},
-#else
- {0x00000518, 0x0100805F},
-#endif
- {0x0000051A, 0x00000000},
- {0x0000051B, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x0000051C, 0x0108804B},
-#else
- {0x0000051C, 0x0100804B},
-#endif
- {0x0000051E, 0x00000000},
- {0x0000051F, 0x00000000},
- {0x00000520, 0x0100A048},
- {0x00000521, 0x00000D01},
- {0x00000522, 0x11401140},
- {0x00000523, 0x00000000},
- {0x00000524, 0x0300A094},
- {0x00000525, 0x00000D01},
- {0x00000526, 0x11401140},
- {0x00000527, 0x00000000},
- {0x00000528, 0x0300A095},
- {0x00000529, 0x00000D01},
- {0x0000052A, 0x11401140},
- {0x0000052B, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x0000052C, 0x00080058},
-#else
- {0x0000052C, 0x00000058},
-#endif
- {0x0000052E, 0x11401140},
- {0x0000052F, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x00000530, 0x00080059},
-#else
- {0x00000530, 0x00000059},
-#endif
- {0x00000532, 0x11401140},
- {0x00000533, 0x00000000},
- {0x00000534, 0x0000005A},
- {0x00000536, 0x11401140},
- {0x00000537, 0x00000000},
- {0x00000538, 0x0000005B},
- {0x0000053A, 0x11401140},
- {0x0000053B, 0x00000000},
- {0x0000053C, 0x00000093},
- {0x0000053E, 0x11401140},
- {0x0000053F, 0x00000000},
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- {0x00000540, 0x0308A01C},
-#else
- {0x00000540, 0x0300A01C},
-#endif
- {0x00000542, 0x11401140},
- {0x00000543, 0x00000000}
-};
-static unsigned nv10TablePRAMIN_8BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000302},
- {0x0000050D, 0x00000302},
- {0x00000511, 0x00000202},
- {0x00000515, 0x00000302},
- {0x00000519, 0x00000302},
- {0x0000051D, 0x00000302},
- {0x0000052D, 0x00000302},
- {0x0000052E, 0x00000302},
- {0x00000535, 0x00000000},
- {0x00000539, 0x00000000},
- {0x0000053D, 0x00000000},
- {0x00000541, 0x00000302}
-};
-static unsigned nv10TablePRAMIN_15BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000902},
- {0x0000050D, 0x00000902},
- {0x00000511, 0x00000802},
- {0x00000515, 0x00000902},
- {0x00000519, 0x00000902},
- {0x0000051D, 0x00000902},
- {0x0000052D, 0x00000902},
- {0x0000052E, 0x00000902},
- {0x00000535, 0x00000902},
- {0x00000539, 0x00000902},
- {0x0000053D, 0x00000902},
- {0x00000541, 0x00000902}
-};
-static unsigned nv10TablePRAMIN_16BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000C02},
- {0x0000050D, 0x00000C02},
- {0x00000511, 0x00000B02},
- {0x00000515, 0x00000C02},
- {0x00000519, 0x00000C02},
- {0x0000051D, 0x00000C02},
- {0x0000052D, 0x00000C02},
- {0x0000052E, 0x00000C02},
- {0x00000535, 0x00000C02},
- {0x00000539, 0x00000C02},
- {0x0000053D, 0x00000C02},
- {0x00000541, 0x00000C02}
-};
-static unsigned nv10TablePRAMIN_32BPP[][2] =
-{
- /* 0xXXXXXX01 For MSB mono format */
- /* 0xXXXXXX02 For LSB mono format */
- {0x00000509, 0x00000E02},
- {0x0000050D, 0x00000E02},
- {0x00000511, 0x00000D02},
- {0x00000515, 0x00000E02},
- {0x00000519, 0x00000E02},
- {0x0000051D, 0x00000E02},
- {0x0000052D, 0x00000E02},
- {0x0000052E, 0x00000E02},
- {0x00000535, 0x00000E02},
- {0x00000539, 0x00000E02},
- {0x0000053D, 0x00000E02},
- {0x00000541, 0x00000E02}
-};
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 16:32:43 +0000