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authorAdam Jackson <ajax@nwnk.net>2004-07-30 20:30:54 +0000
committerAdam Jackson <ajax@nwnk.net>2004-07-30 20:30:54 +0000
commit81760d382c4921a270715fe9e6b348699353ee01 (patch)
tree18b8720de46cefa796cd3ff5080db90fdda11438 /src/savage_accel.c
parent057949f434a1c0d751dad5ec3ef154f2feee26ef (diff)
Bug #400 (partial): Driver fixes for the dlloader. When using dlloader, all
framebuffer formats except cfb and the overlay modes should work, and r128 and radeon need to be loaded from the ati driver (both issues to be fixed soon). Tested on i740, s3virge, mach64, tdfx, vesa, and vga drivers. elfloader users shouldn't be affected.
Diffstat (limited to 'src/savage_accel.c')
-rw-r--r--src/savage_accel.c1028
1 files changed, 41 insertions, 987 deletions
diff --git a/src/savage_accel.c b/src/savage_accel.c
index 59aede6..9cf3fdc 100644
--- a/src/savage_accel.c
+++ b/src/savage_accel.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c,v 1.14 2001/12/13 18:01:50 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c,v 1.23 2003/12/22 17:48:10 tsi Exp $ */
/*
*
@@ -11,7 +11,6 @@
*
* Created 20/03/97 by Sebastien Marineau for 3.3.6
* Modified 17-Nov-2000 by Tim Roberts for 4.0.1
- * Modified Feb-2004 by Alex Deucher - integrating DRI support
* Revision:
*
*/
@@ -24,12 +23,6 @@
#include "savage_driver.h"
#include "savage_regs.h"
#include "savage_bci.h"
-#include "savage_dri.h"
-
-#ifdef XF86DRI
-#define _XF86DRI_SERVER_
-#include "savage_dri.h"
-#endif
/* Forward declaration of functions used in the driver */
@@ -72,6 +65,7 @@ static void SavageSubsequentSolidBresenhamLine(
int err,
int length,
int octant);
+
#if 0
static void SavageSubsequentSolidTwoPointLine(
ScrnInfoPtr pScrn,
@@ -81,6 +75,7 @@ static void SavageSubsequentSolidTwoPointLine(
int y2,
int bias);
#endif
+
#if 0
static void SavageSetupForScreenToScreenColorExpand(
ScrnInfoPtr pScrn,
@@ -135,6 +130,7 @@ static void SavageSubsequentMono8x8PatternFillRect(
int w,
int h);
+#if 0
static void SavageSetupForColor8x8PatternFill(
ScrnInfoPtr pScrn,
int patternx,
@@ -151,6 +147,7 @@ static void SavageSubsequentColor8x8PatternFillRect(
int y,
int w,
int h);
+#endif
static void SavageSetClippingRectangle(
ScrnInfoPtr pScrn,
@@ -211,11 +208,6 @@ unsigned long readfb( unsigned long addr );
unsigned long writefb( unsigned long addr, unsigned long value );
void writescan( unsigned long scan, unsigned long color );
-static int GetTileAperturePitch(ulong dwWidth, ulong dwBpp);
-void SavageSetGBD_M7(ScrnInfoPtr pScrn);
-void SavageSetGBD_Twister(ScrnInfoPtr pScrn);
-void SavageSetGBD_PM(ScrnInfoPtr pScrn);
-void SavageSetGBD_2000(ScrnInfoPtr pScrn);
/*
* This is used to cache the last known value for routines we want to
@@ -224,29 +216,8 @@ void SavageSetGBD_2000(ScrnInfoPtr pScrn);
ScrnInfoPtr gpScrn = 0;
-/*
- * returns the aperture pitch for tiled mode.
- * if MM850C_15 = 0 (use NB linear tile mode) the pitch is screen stride aligned to 128bytes
- * if MM850C_15 = 1 (use MS-1 128bit non-linear tile mode),we should do it as follows
- * we now only support the later, and don't use Y range flag,see tile surface register
-*/
-static int GetTileAperturePitch(ulong dwWidth, ulong dwBpp)
-{
- switch (dwBpp) {
- case 4:
- case 8:
- return(0x2000);
- break;
- case 16:
- return(0x1000);
- break;
- case 32:
- return(0x2000);
- break;
- default:
- return(0x2000);
- }
-}
+
+
void
SavageInitialize2DEngine(ScrnInfoPtr pScrn)
@@ -275,8 +246,7 @@ SavageInitialize2DEngine(ScrnInfoPtr pScrn)
/* Disable BCI */
OUTREG(0x48C18, INREG(0x48C18) & 0x3FF0);
/* Setup BCI command overflow buffer */
- OUTREG(0x48C14, (psav->cobOffset >> 11) | (psav->cobIndex << 29)); /* tim */
- /*OUTREG(S3_OVERFLOW_BUFFER, psav->cobOffset >> 11 | 0xE0000000);*/ /* S3 */
+ OUTREG(0x48C14, (psav->cobOffset >> 11) | (psav->cobIndex << 29));
/* Program shadow status update. */
OUTREG(0x48C10, 0x78207220);
if( psav->ShadowStatus )
@@ -294,38 +264,23 @@ SavageInitialize2DEngine(ScrnInfoPtr pScrn)
break;
case S3_SAVAGE4:
- case S3_TWISTER:
case S3_PROSAVAGE:
- case S3_PROSAVAGEDDR:
case S3_SUPERSAVAGE:
/* Disable BCI */
OUTREG(0x48C18, INREG(0x48C18) & 0x3FF0);
- if (!psav->disableCOB) {
- /* Setup BCI command overflow buffer */
- OUTREG(0x48C14, (psav->cobOffset >> 11) | (psav->cobIndex << 29));
- }
- /* Program shadow status update */ /* AGD: what should this be? */
- OUTREG(0x48C10, 0x00700040); /* tim */
- /*OUTREG(0x48C10, 0x0e440f04L);*/ /* S3 */
+ /* Program shadow status update */
+ OUTREG(0x48C10, 0x00700040);
if( psav->ShadowStatus )
{
OUTREG(0x48C0C, psav->ShadowPhysical | 1 );
- if (psav->disableCOB) {
- /* Enable BCI without the COB */
- OUTREG(0x48C18, INREG(0x48C18) | 0x0a);
- } else {
- OUTREG32(0x48C18, INREG32(0x48C18) | 0x0E);
- }
+ /* Enable BCI without the COB */
+ OUTREG(0x48C18, INREG(0x48C18) | 0x0a);
}
else
{
OUTREG(0x48C0C, 0);
- if (psav->disableCOB) {
- /* Enable BCI without the COB */
- OUTREG(0x48C18, INREG(0x48C18) | 0x08);
- } else {
- OUTREG32(0x48C18, INREG32(0x48C18) | 0x0C);
- }
+ /* Enable BCI without the COB */
+ OUTREG(0x48C18, INREG(0x48C18) | 0x08);
}
break;
@@ -365,637 +320,9 @@ SavageInitialize2DEngine(ScrnInfoPtr pScrn)
SavageSetGBD(pScrn);
}
-void
-SavageSetGBD(ScrnInfoPtr pScrn)
-{
- SavagePtr psav = SAVPTR(pScrn);
-
- UnProtectCRTC();
- UnLockExtRegs();
- VerticalRetraceWait();
-
- psav->lDelta = pScrn->virtualX * (pScrn->bitsPerPixel >> 3);
-
- /*
- * we can use Option "DisableTile" "TRUE" to disable tile mode
- * if don't disable tile,we only support tile mode under 16/32bpp
- */
- if ((!psav->bDisableTile) && ((pScrn->bitsPerPixel == 16) || (pScrn->bitsPerPixel == 32))) {
- /* tileing in 16/32 BPP */
- psav->bTiled = TRUE;
- psav->lDelta = ((psav->lDelta + 127) >> 7) << 7;
-
- if (psav->Chipset == S3_SAVAGE_MX || psav->Chipset == S3_SAVAGE3D)
- psav->ulAperturePitch = 0x2000;
- else
- psav->ulAperturePitch = GetTileAperturePitch(pScrn->virtualX,pScrn->bitsPerPixel);
-
- /* Use the aperture for linear screen */
- psav->FBStart = psav->ApertureMap;
- } else {
- psav->bTiled = FALSE;
- /* 32: Alignment for nontiled mode */
- psav->lDelta = ((psav->lDelta + 31) >> 5) << 5;
- psav->ulAperturePitch = psav->lDelta;
- }
-
- /* if you are using linear mode for 2D, 3D still needs to be tiled, linear AperturePitch/Delta
- seem to be wrong for savagespan */
- if (psav->Chipset == S3_SAVAGE_MX || psav->Chipset == S3_SAVAGE3D)
- psav->ul3DAperturePitch = 0x2000;
- else
- psav->ul3DAperturePitch = GetTileAperturePitch(pScrn->virtualX,pScrn->bitsPerPixel);
-
- psav->l3DDelta = (((pScrn->virtualX * (pScrn->bitsPerPixel >> 3)) + 127) >> 7) << 7;
-
- psav->Bpp = pScrn->bitsPerPixel >> 3;
- psav->cxMemory = psav->lDelta / (psav->Bpp);
- psav->cyMemory = psav->endfb / psav->lDelta - 1;
- /*psav->cyMemory = (psav->CursorKByte << 10) / (pScrn->displayWidth * (pScrn->bitsPerPixel / 8));*/
- /* ??????????? */
- if (psav->cyMemory > 2048)
- psav->cyMemory = 2048;
-
- /*
- * If tiling, adjust down psav->cyMemory to the last multiple
- * of a tileheight, so that we don't try to use partial tiles.
- */
- if (psav->bTiled) {
- psav->cyMemory -= (psav->cyMemory % 16);
- }
-
- /*
- * Initialization per GX-3.
- *
- * 1. MM48C18 - Disable BCI.
- * 2. MM48C0C - Enable updating shadow status
- * and initialize shadow memory address.
- * 2b. MM48C18 - bit 1 = 1, Enable Command Buffer status updates
- * (S3_OVERFLOW_BUFFER_PTR)
- * 3. MM48C10 - Initialize command buffer threshold
- * (S3_BUFFER_THRESHOLD)
- * 4. MM48C14 - Setup command buffer offset and size
- * (S3_OVERFLOW_BUFFER)
- * 5. MM816C - Enable BCI.
- * 6. MM48C40 - Setup tiled surface 0 register.
- * 7. CR31 - bit 0 = 0, Disable address offset bits(CR6A_6-0).
- * 8. CR50 - bit 7,6,0 = 111, Use Global Bitmap Descriptor.
- * 9. CR88 - bit 4 = 0, Block write on (linear mode) IFF we know we
- * have the right kind of SGRAM memory,
- * bit 4 = 1, Block write off (always off if tiling)
- * 10.CR69 - Bit 7 = 1, MM81C0 and 81C4 are used to control
- * primary stream.
- * 11.MM8128, MM812c - Setup read/write mask registers
- * 12.MM816C, MM8168 - Set up Global Bitmap Descriptor 1 and 2.
- */
- switch (psav->Chipset) {
- case S3_SAVAGE3D:
- case S3_SAVAGE_MX:
- SavageSetGBD_M7(pScrn);
- break;
- case S3_SAVAGE4:
- case S3_TWISTER:
- case S3_PROSAVAGE:
- case S3_PROSAVAGEDDR:
- SavageSetGBD_Twister(pScrn);
- break;
- case S3_SUPERSAVAGE:
- SavageSetGBD_PM(pScrn);
- break;
- case S3_SAVAGE2000:
- SavageSetGBD_2000(pScrn);
- break;
- }
-}
-
-void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
-{
- SavagePtr psav = SAVPTR(pScrn);
- ulong ulTmp;
- uchar byte;
- int bci_enable, tile16, tile32;
-
- if (psav->Chipset == S3_SAVAGE4) {
- bci_enable = BCI_ENABLE;
- tile16 = TILE_FORMAT_DESTINATION16;
- tile32 = TILE_FORMAT_DESTINATION32;
- } else {
- bci_enable = BCI_ENABLE_TWISTER;
- tile16 = TILE_DESTINATION;
- tile32 = TILE_DESTINATION;
- }
-
- /* MM81C0 and 81C4 are used to control primary stream. */
- OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000);
- OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000);
-
- /*
- * Program Primary Stream Stride Register.
- *
- * Tell engine if tiling on or off, set primary stream stride, and
- * if tiling, set tiling bits/pixel and primary stream tile offset.
- * Note that tile offset (bits 16 - 29) must be scanline width in
- * bytes/128bytespertile * 256 Qwords/tile. This is equivalent to
- * lDelta * 2. Remember that if tiling, lDelta is screenwidth in
- * bytes padded up to an even number of tilewidths.
- */
- if (!psav->bTiled) {
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFFE000) |
- (psav->lDelta & 0x00001fff));
- }
- else if (pScrn->bitsPerPixel == 16) {
- /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFFE000)
- | 0x80000000 | (psav->lDelta & 0x00001fff));
- }
- else if (pScrn->bitsPerPixel == 32) {
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFFE000)
- | 0xC0000000 | (psav->lDelta & 0x00001fff));
- }
-
- /*
- * CR69, bit 7 = 1
- * to use MM streams processor registers to control primary stream.
- */
- OUTREG8(CRT_ADDRESS_REG,0x69);
- byte = INREG8(CRT_DATA_REG) | 0x80;
- OUTREG8(CRT_DATA_REG,byte);
-
- OUTREG32(0x8128, 0xFFFFFFFFL);
- OUTREG32(0x812C, 0xFFFFFFFFL);
-
- OUTREG32(S3_BCI_GLB_BD_HIGH, bci_enable | S3_LITTLE_ENDIAN | S3_BD64);
-
-
- /* CR50, bit 7,6,0 = 111, Use GBD.*/
- OUTREG8(CRT_ADDRESS_REG,0x50);
- byte = INREG8(CRT_DATA_REG) | 0xC1;
- OUTREG8(CRT_DATA_REG, byte);
-
- /*
- * if MS1NB style linear tiling mode.
- * bit MM850C[15] = 0 select NB linear tile mode.
- * bit MM850C[15] = 1 select MS-1 128-bit non-linear tile mode.
- */
- ulTmp = INREG32(ADVANCED_FUNC_CTRL) | 0x8000; /* use MS-s style tile mode*/
- OUTREG32(ADVANCED_FUNC_CTRL,ulTmp);
-
- /*
- * Set up Tiled Surface Registers
- * Bit 25:20 - Surface width in tiles.
- * Bit 29 - Y Range Flag.
- * Bit 31:30 = 00, 4 bpp.
- * = 01, 8 bpp.
- * = 10, 16 bpp.
- * = 11, 32 bpp.
- */
- /*
- * Global Bitmap Descriptor Register MM816C - twister/prosavage
- * bit 24~25: tile format
- * 00: linear
- * 01: destination tiling format
- * 10: texture tiling format
- * 11: reserved
- * bit 28: block write disble/enable
- * 0: disable
- * 1: enable
- */
- /*
- * Global Bitmap Descriptor Register MM816C - savage4
- * bit 24~25: tile format
- * 00: linear
- * 01: reserved
- * 10: 16 bpp tiles
- * 11: 32 bpp tiles
- * bit 28: block write disable/enable
- * 0: enable
- * 1: disable
- */
- if (!psav->bTiled) {
- /*
- * Do not enable block_write even for non-tiling modes, because
- * the driver cannot determine if the memory type is the certain
- * type of SGRAM for which block_write can be used.
- */
- psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */
- }
- else if (pScrn->bitsPerPixel == 16) {
- psav->GlobalBD.bd1.HighPart.ResBWTile = tile16; /* 16 bpp/destination tiling format */
-
- ulTmp = (((pScrn->virtualX + 0x3F) & 0x0000FFC0) >> 6) << 20;
- OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16);
- }
- else if (pScrn->bitsPerPixel == 32) {
- psav->GlobalBD.bd1.HighPart.ResBWTile = tile32; /* 32 bpp/destination tiling format */
-
- ulTmp = ( ((pScrn->virtualX + 0x1F) & 0x0000FFE0) >> 5) << 20;
- OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32);
- }
-
- psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write - was 0 */
- /* HW uses width */
- psav->GlobalBD.bd1.HighPart.Stride = (ushort) psav->lDelta / (pScrn->bitsPerPixel >> 3);
- psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel);
- psav->GlobalBD.bd1.Offset = 0;
-
-
- /*
- * CR88, bit 4 - Block write enabled/disabled.
- *
- * Note: Block write must be disabled when writing to tiled
- * memory. Even when writing to non-tiled memory, block
- * write should only be enabled for certain types of SGRAM.
- */
- OUTREG8(CRT_ADDRESS_REG,0x88);
- byte = INREG8(CRT_DATA_REG) | DISABLE_BLOCK_WRITE_2D;
- OUTREG8(CRT_DATA_REG,byte);
-
- /*
- * CR31, bit 0 = 0, Disable address offset bits(CR6A_6-0).
- * bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window
- * at A000:0.
- */
- OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG); /* cr31 */
- byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000));
- OUTREG8(CRT_DATA_REG,byte); /* perhaps this should be 0x0c */
-
- /* turn on screen */
- OUTREG8(SEQ_ADDRESS_REG,0x01);
- byte = INREG8(SEQ_DATA_REG) & ~0x20;
- OUTREG8(SEQ_DATA_REG,byte);
-
- /* program the GBD and SBD's */
- OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart);
- OUTREG32(S3_GLB_BD_HIGH,psav->GlobalBD.bd2.HiPart | bci_enable | S3_LITTLE_ENDIAN | S3_BD64);
- OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart);
- OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart);
- OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart);
- OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart);
-}
-
-void SavageSetGBD_M7(ScrnInfoPtr pScrn)
-{
- SavagePtr psav = SAVPTR(pScrn);
- ulong ulTmp;
- uchar byte;
- int bci_enable, tile16, tile32;
-
- bci_enable = BCI_ENABLE;
- tile16 = TILE_FORMAT_DESTINATION16;
- tile32 = TILE_FORMAT_DESTINATION32;
-
-
- /* following is the enable case */
-
- /* SR01:turn off screen */
- OUTREG8 (SEQ_ADDRESS_REG,0x01);
- byte = INREG8(SEQ_DATA_REG) | 0x20;
- OUTREG8(SEQ_DATA_REG,byte);
-
- /*
- * CR67_3:
- * = 1 stream processor MMIO address and stride register
- * are used to control the primary stream
- * = 0 standard VGA address and stride registers
- * are used to control the primary streams
- */
- OUTREG8(CRT_ADDRESS_REG,0x67);
- byte = INREG8(CRT_DATA_REG) | 0x08;
- OUTREG8(CRT_DATA_REG,byte);
-
- /* IGA 2 */
- OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA2_READS_WRITES);
-
- OUTREG8(CRT_ADDRESS_REG,0x67);
- byte = INREG8(CRT_DATA_REG) | 0x08;
- OUTREG8(CRT_DATA_REG,byte);
-
- OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1);
-
- /*
- * load ps1 active registers as determined by MM81C0/81C4
- * load ps2 active registers as determined by MM81B0/81B4
- */
- OUTREG8(CRT_ADDRESS_REG,0x65);
- byte = INREG8(CRT_DATA_REG) | 0x03;
- OUTREG8(CRT_DATA_REG,byte);
-
-#if 0
- /* Set primary stream to bank 0 */
- OUTREG8(CRT_ADDRESS_REG, MEMORY_CTRL0_REG);/* CRCA */
- byte = INREG8(CRT_DATA_REG) & ~(MEM_PS1 + MEM_PS2) ;
- OUTREG8(CRT_DATA_REG,byte);
- /*
- * if we have 8MB of frame buffer here then we must really be a 16MB
- * card and that means that the second device is always in the upper
- * bank of memory (MHS)
- */
- if (psav->videoRambytes >= 0x800000) {
- /* 16MB Video Memory cursor is at the end in Bank 1 */
- byte |= 0x3;
- OUTREG16(CRT_ADDRESS_REG, (byte << 8) | MEMORY_CTRL0_REG);
- }
-#endif
-
- /* MM81C0 and 81C4 are used to control primary stream. */
- OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000);
- OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000);
- OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000);
- OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000);
- /*
- * Program Primary Stream Stride Register.
- *
- * Tell engine if tiling on or off, set primary stream stride, and
- * if tiling, set tiling bits/pixel and primary stream tile offset.
- * Note that tile offset (bits 16 - 29) must be scanline width in
- * bytes/128bytespertile * 256 Qwords/tile. This is equivalent to
- * lDelta * 2. Remember that if tiling, lDelta is screenwidth in
- * bytes padded up to an even number of tilewidths.
- */
- if (!psav->bTiled) {
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000) |
- (psav->lDelta & 0x00003fff));
- OUTREG32(PRI_STREAM2_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000) |
- (psav->lDelta & 0x00003fff));
- } else if (pScrn->bitsPerPixel == 16) {
- /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0x80000000 | (psav->lDelta & 0x00003fff));
- OUTREG32(PRI_STREAM2_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0x80000000 | (psav->lDelta & 0x00003fff));
-
- } else if (pScrn->bitsPerPixel == 32) {
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0xC0000000 | (psav->lDelta & 0x00003fff));
- OUTREG32(PRI_STREAM2_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0xC0000000 | (psav->lDelta & 0x00003fff));
- }
-
- OUTREG32(0x8128, 0xFFFFFFFFL);
- OUTREG32(0x812C, 0xFFFFFFFFL);
-
- OUTREG32(S3_BCI_GLB_BD_HIGH, bci_enable | S3_LITTLE_ENDIAN | S3_BD64);
-
- /* CR50, bit 7,6,0 = 111, Use GBD.*/
- OUTREG8(CRT_ADDRESS_REG,0x50);
- byte = INREG8(CRT_DATA_REG) | 0xC1;
- OUTREG8(CRT_DATA_REG, byte);
-
- /*
- * CR78, bit 3 - Block write enabled(1)/disabled(0).
- * bit 2 - Block write cycle time(0:2 cycles,1: 1 cycle)
- * Note: Block write must be disabled when writing to tiled
- * memory. Even when writing to non-tiled memory, block
- * write should only be enabled for certain types of SGRAM.
- */
- OUTREG8(CRT_ADDRESS_REG,0x78);
- /*byte = INREG8(CRT_DATA_REG) & ~0x0C;*/
- byte = INREG8(CRT_DATA_REG) | 0xfb;
- OUTREG8(CRT_DATA_REG,byte);
-
- /*
- * Tiled Surface 0 Registers MM48C40:
- * bit 0~23: tile surface 0 frame buffer offset
- * bit 24~29:tile surface 0 width
- * bit 30~31:tile surface 0 bits/pixel
- * 00: reserved
- * 01, 8 bits
- * 10, 16 Bits.
- * 11, 32 Bits.
- */
- /*
- * Global Bitmap Descriptor Register MM816C
- * bit 24~25: tile format
- * 00: linear
- * 01: reserved
- * 10: 16 bit
- * 11: 32 bit
- * bit 28: block write disble/enable
- * 0: enable
- * 1: disable
- */
- if (!psav->bTiled) {
- /*
- * Do not enable block_write even for non-tiling modes, because
- * the driver cannot determine if the memory type is the certain
- * type of SGRAM for which block_write can be used.
- */
- psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */
-
- }
- else if (pScrn->bitsPerPixel == 16) {
- psav->GlobalBD.bd1.HighPart.ResBWTile = tile16;/* 16 bit */
-
- ulTmp = ((psav->lDelta / 2) >> 6) << 24;
- OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16);
- }
- else if (pScrn->bitsPerPixel == 32) {
- psav->GlobalBD.bd1.HighPart.ResBWTile = tile32;/* 32 bit */
-
- ulTmp = ((psav->lDelta / 4) >> 5) << 24;
- OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32);
- }
-
- psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write */
- /* HW uses width */
- psav->GlobalBD.bd1.HighPart.Stride = (ushort)(psav->lDelta / (pScrn->bitsPerPixel >> 3));
- psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel);
- psav->GlobalBD.bd1.Offset = 0;
-
-
- /*
- * CR31, bit 0 = 0, Disable address offset bits(CR6A_6-0).
- * bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window
- * at A000:0.
- */
- OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG); /* cr31 */
- byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000));
- OUTREG8(CRT_DATA_REG,byte);
-
- /* program the GBD and SBD's */
- OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart );
- /* 8: bci enable */
- OUTREG32(S3_GLB_BD_HIGH,(psav->GlobalBD.bd2.HiPart
- | bci_enable | S3_LITTLE_ENDIAN | S3_BD64));
- OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart);
- OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart);
- OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart);
- OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart);
-
- /* turn on screen */
- OUTREG8(SEQ_ADDRESS_REG,0x01);
- byte = INREG8(SEQ_DATA_REG) & ~0X20;
- OUTREG8(SEQ_DATA_REG,byte);
-}
-
-void SavageSetGBD_PM(ScrnInfoPtr pScrn)
-{
- SavagePtr psav = SAVPTR(pScrn);
- ulong ulTmp;
- uchar byte;
- int bci_enable, tile16, tile32;
-
- /* Is supersavage like savage4 or twister?
- * change the bci_enable and tile bits here.
- */
- bci_enable = BCI_ENABLE_TWISTER;
- tile16 = TILE_DESTINATION;
- tile32 = TILE_DESTINATION;
-
-
- /* following is the enable case */
-
- /* SR01:turn off screen */
- OUTREG8 (SEQ_ADDRESS_REG,0x01);
- byte = INREG8(SEQ_DATA_REG) | 0x20;
- OUTREG8(SEQ_DATA_REG,byte);
-
- /*
- * CR67_3:
- * = 1 stream processor MMIO address and stride register
- * are used to control the primary stream
- * = 0 standard VGA address and stride registers
- * are used to control the primary streams
- */
- OUTREG8(CRT_ADDRESS_REG,0x67);
- byte = INREG8(CRT_DATA_REG) | 0x08;
- OUTREG8(CRT_DATA_REG,byte);
-
- /* IGA 2 */
- OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA2_READS_WRITES);
-
- OUTREG8(CRT_ADDRESS_REG,0x67);
- byte = INREG8(CRT_DATA_REG) | 0x08;
- OUTREG8(CRT_DATA_REG,byte);
-
- OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1);
-
- /*
- * load ps1 active registers as determined by MM81C0/81C4
- * load ps2 active registers as determined by MM81B0/81B4
- */
- OUTREG8(CRT_ADDRESS_REG,0x65);
- byte = INREG8(CRT_DATA_REG) | 0x03;
- OUTREG8(CRT_DATA_REG,byte);
-
- /*
- * Program Primary Stream Stride Register.
- *
- * Tell engine if tiling on or off, set primary stream stride, and
- * if tiling, set tiling bits/pixel and primary stream tile offset.
- * Note that tile offset (bits 16 - 29) must be scanline width in
- * bytes/128bytespertile * 256 Qwords/tile. This is equivalent to
- * lDelta * 2. Remember that if tiling, lDelta is screenwidth in
- * bytes padded up to an even number of tilewidths.
- */
- if (!psav->bTiled) {
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000) |
- (psav->lDelta & 0x00001fff));
- OUTREG32(PRI_STREAM2_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000) |
- (psav->lDelta & 0x00001fff));
- } else if (pScrn->bitsPerPixel == 16) {
- /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0x80000000 | (psav->lDelta & 0x00001fff));
- OUTREG32(PRI_STREAM2_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0x80000000 | (psav->lDelta & 0x00001fff));
-
- } else if (pScrn->bitsPerPixel == 32) {
- OUTREG32(PRI_STREAM_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0xC0000000 | (psav->lDelta & 0x00001fff));
- OUTREG32(PRI_STREAM2_STRIDE,
- (((psav->lDelta * 2) << 16) & 0x3FFF0000)
- | 0xC0000000 | (psav->lDelta & 0x00001fff));
- }
-
- /* MM81C0 and 81C4 are used to control primary stream. */
- /*OUTREG32(PRI_STREAM_FBUF_ADDR0,0x80000000);*/
- OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000);
- OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000);
- /*OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x80000000);*/
- OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000);
- OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000);
-
- OUTREG32(0x8128, 0xFFFFFFFFL);
- OUTREG32(0x812C, 0xFFFFFFFFL);
-
- /* bit 28:block write disable */
- OUTREG32(S3_GLB_BD_HIGH, bci_enable | S3_BD64 | 0x10000000);
-
- /* CR50, bit 7,6,0 = 111, Use GBD.*/
- OUTREG8(CRT_ADDRESS_REG,0x50);
- byte = INREG8(CRT_DATA_REG) | 0xC1;
- OUTREG8(CRT_DATA_REG, byte);
-
- if (!psav->bTiled) {
- /*
- * Do not enable block_write even for non-tiling modes, because
- * the driver cannot determine if the memory type is the certain
- * type of SGRAM for which block_write can be used.
- */
- psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */
-
- }
- else if (pScrn->bitsPerPixel == 16) {
- psav->GlobalBD.bd1.HighPart.ResBWTile = tile16;/* tile format destination */
-
- ulTmp = (((pScrn->virtualX + 0x3f) & 0x0000ffc0) >> 6) << 20;
- OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16);
- }
- else if (pScrn->bitsPerPixel == 32) {
- psav->GlobalBD.bd1.HighPart.ResBWTile = tile32;/* tile format destination */
-
- ulTmp = (((pScrn->virtualX + 0x1f) & 0x0000ffe0) >> 5) << 20;
- OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32);
- }
-
- psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write */
- /* HW uses width */
- psav->GlobalBD.bd1.HighPart.Stride = (ushort)(psav->lDelta / (pScrn->bitsPerPixel >> 3));
- psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel);
- psav->GlobalBD.bd1.Offset = 0;
-
- /*
- * CR31, bit 0 = 0, Disable address offset bits(CR6A_6-0).
- * bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window
- * at A000:0.
- */
- OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG);
- byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000));
- OUTREG8(CRT_DATA_REG,byte);
-
- /* program the GBD and SBDs */
- OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart );
- OUTREG32(S3_GLB_BD_HIGH,(psav->GlobalBD.bd2.HiPart
- | bci_enable /* AGD: shouldn't BCI be enabled? */
- | S3_LITTLE_ENDIAN | 0x10000000 | S3_BD64));
- OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart);
- OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart);
- OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart);
- OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart);
-
- /* turn on screen */
- OUTREG8(SEQ_ADDRESS_REG,0x01);
- byte = INREG8(SEQ_DATA_REG) & ~0x20;
- OUTREG8(SEQ_DATA_REG,byte);
-}
-
-void SavageSetGBD_2000(ScrnInfoPtr pScrn)
+void
+SavageSetGBD( ScrnInfoPtr pScrn )
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
SavagePtr psav = SAVPTR(pScrn);
@@ -1003,9 +330,6 @@ void SavageSetGBD_2000(ScrnInfoPtr pScrn)
unsigned int vgaCRReg = hwp->IOBase + 5;
unsigned long GlobalBitmapDescriptor;
-
-/* AGD: no idea how to program savage2000 GBD... for now default to Tim's method */
-
GlobalBitmapDescriptor = 1 | 8 | BCI_BD_BW_DISABLE;
BCI_BD_SET_BPP(GlobalBitmapDescriptor, pScrn->bitsPerPixel);
BCI_BD_SET_STRIDE(GlobalBitmapDescriptor, pScrn->displayWidth);
@@ -1034,9 +358,10 @@ void SavageSetGBD_2000(ScrnInfoPtr pScrn)
OUTREG(0x817C, GlobalBitmapDescriptor);
OUTREG(PRI_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3);
- OUTREG(SEC_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3);
+ OUTREG(SEC_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3);
}
+
/* Acceleration init function, sets up pointers to our accelerated functions */
Bool
@@ -1096,7 +421,7 @@ SavageInitAccel(ScreenPtr pScreen)
#if 1
xaaptr->SetupForScreenToScreenCopy = SavageSetupForScreenToScreenCopy;
xaaptr->SubsequentScreenToScreenCopy = SavageSubsequentScreenToScreenCopy;
- xaaptr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | ROP_NEEDS_SOURCE;
+ xaaptr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | NO_PLANEMASK | ROP_NEEDS_SOURCE;
#endif
@@ -1117,6 +442,7 @@ SavageInitAccel(ScreenPtr pScreen)
xaaptr->Mono8x8PatternFillFlags = 0
| HARDWARE_PATTERN_PROGRAMMED_BITS
| HARDWARE_PATTERN_SCREEN_ORIGIN
+ | ROP_NEEDS_SOURCE
| BIT_ORDER_IN_BYTE_MSBFIRST
;
if( psav->Chipset == S3_SAVAGE4 )
@@ -1135,9 +461,13 @@ SavageInitAccel(ScreenPtr pScreen)
* We could double the width ourselves into a reserved frame buffer
* section, but since I went 18 months with only ONE report of this
* error, it seems hardly worth the trouble.
+ * Savage4 seems to have problems with 8x8 color patterns.
+ * Not sending the pattern offsetsfixes the lockup but the
+ * drawing problems remain.
+ * Until further investigation we have to disable this.
*/
-#if 1
+#if 0
if( (psav->Chipset == S3_SAVAGE3D) || (psav->Chipset == S3_SAVAGE4) )
{
xaaptr->SetupForColor8x8PatternFill =
@@ -1146,8 +476,8 @@ SavageInitAccel(ScreenPtr pScreen)
SavageSubsequentColor8x8PatternFillRect;
xaaptr->Color8x8PatternFillFlags = 0
| NO_TRANSPARENCY
- | HARDWARE_PATTERN_PROGRAMMED_BITS
- | HARDWARE_PATTERN_PROGRAMMED_ORIGIN
+ | HARDWARE_PATTERN_SCREEN_ORIGIN
+ | ROP_NEEDS_SOURCE
;
}
#endif
@@ -1155,10 +485,9 @@ SavageInitAccel(ScreenPtr pScreen)
/* Solid lines */
#if 1
- xaaptr->SolidLineFlags = NO_PLANEMASK;
+ xaaptr->SolidLineFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
xaaptr->SetupForSolidLine = SavageSetupForSolidFill;
xaaptr->SubsequentSolidBresenhamLine = SavageSubsequentSolidBresenhamLine;
- /*xaaptr->SubsequentSolidTwoPointLine = SavageSubsequentSolidTwoPointLine;*/
#if 0
xaaptr->SubsequentSolidFillTrap = SavageSubsequentSolidFillTrap;
#endif
@@ -1174,6 +503,7 @@ SavageInitAccel(ScreenPtr pScreen)
| SCANLINE_PAD_DWORD
| BIT_ORDER_IN_BYTE_MSBFIRST
| LEFT_EDGE_CLIPPING
+ | ROP_NEEDS_SOURCE
;
xaaptr->SetupForImageWrite = SavageSetupForImageWrite;
xaaptr->SubsequentImageWriteRect = SavageSubsequentImageWriteRect;
@@ -1184,7 +514,7 @@ SavageInitAccel(ScreenPtr pScreen)
/* WriteBitmap color expand */
#if 0
- xaaptr->WriteBitmapFlags = NO_PLANEMASK;
+ xaaptr->WriteBitmapFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
xaaptr->WriteBitmap = SavageWriteBitmapCPUToScreenColorExpand;
#endif
@@ -1233,281 +563,6 @@ SavageInitAccel(ScreenPtr pScreen)
* enabled the PIXMAP_CACHE flag, then these lines can be omitted.
*/
-#ifdef XF86DRI
- if (psav->directRenderingEnabled) {
- SAVAGEDRIServerPrivatePtr pSAVAGEDRIServer = psav->DRIServerInfo;
- BoxRec MemBox;
- int cpp = pScrn->bitsPerPixel / 8;
- /*int widthBytes = pScrn->displayWidth * cpp;*/
- int widthBytes = psav->lDelta;
- /*int widthBytes = psav->l3DDelta;*/
- int bufferSize = ((pScrn->virtualY * widthBytes + SAVAGE_BUFFER_ALIGN)
- & ~SAVAGE_BUFFER_ALIGN);
- int tiledwidthBytes,tiledBufferSize;
-
- pSAVAGEDRIServer->frontbufferSize = bufferSize;
- /*tiledwidthBytes = psav->lDelta;*/
- tiledwidthBytes = psav->l3DDelta;
-
- if (cpp == 2) {
- tiledBufferSize = ((pScrn->virtualX+63)/64)*((pScrn->virtualY+15)/16)
- *2048;
- } else {
- tiledBufferSize = ((pScrn->virtualX+31)/32)*((pScrn->virtualY+15)/16)
- *2048;
- }
- /*set Depth buffer to 32bpp*/
- /*tiledwidthBytes_Z = ((pScrn->virtualX + 31)& ~0x0000001F)*4;
- tiledBufferSize_Z = ((pScrn->virtualX+31)/32)*((pScrn->virtualY+15)/16)
- *2048;*/
-
- pSAVAGEDRIServer->backbufferSize = tiledBufferSize;
- /*pSAVAGEDRIServer->depthbufferSize = tiledBufferSize_Z;*/
- pSAVAGEDRIServer->depthbufferSize = tiledBufferSize;
-
- xf86DrvMsg(pScrn->scrnIndex,X_INFO,
- "virtualX:%d,virtualY:%d\n",
- pScrn->virtualX,pScrn->virtualY);
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "bpp:%d,tiledwidthBytes:%d,tiledBufferSize:%d \n",
- pScrn->bitsPerPixel,
- tiledwidthBytes,tiledBufferSize);
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "bpp:%d,widthBytes:%d,BufferSize:%d \n",
- pScrn->bitsPerPixel,
- widthBytes,bufferSize);
-
- pSAVAGEDRIServer->frontOffset = 0; /* AGD: should probably be pScrn->fbOffset */
- pSAVAGEDRIServer->frontPitch = widthBytes;
-
- /* Try for front, back, depth, and two framebuffers worth of
- * pixmap cache. Should be enough for a fullscreen background
- * image plus some leftovers.
- */
- /* pSAVAGEDRIServer->textureSize = psav->videoRambytes -
- tiledBufferSize -
- tiledBufferSize_Z -
- -0x602000;*/
- pSAVAGEDRIServer->textureSize = psav->videoRambytes -
- 4096 - /* hw cursor*/
- psav->cobSize - /*COB*/
- bufferSize-
- tiledBufferSize -
- tiledBufferSize -
- 0x200000;
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "videoRambytes:0x%08lx \n",
- psav->videoRambytes);
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "textureSize:0x%08lx \n",
- pSAVAGEDRIServer->textureSize);
-
- /* If that gives us less than half the available memory, let's
- * be greedy and grab some more. Sorry, I care more about 3D
- * performance than playing nicely, and you'll get around a full
- * framebuffer's worth of pixmap cache anyway.
- */
-#if 0
- if ( pSAVAGEDRIServer->textureSize < (int)psav->FbMapSize / 2 ) {
- pSAVAGEDRIServer->textureSize = psav->FbMapSize - 4 * bufferSize;
- }
-#endif
- /* Check to see if there is more room available after the maximum
- * scanline for textures.
- */
-#if 0
- if ( (int)psav->FbMapSize - maxlines * widthBytes - bufferSize * 2
- > pSAVAGEDRIServer->textureSize ) {
- pSAVAGEDRIServer->textureSize = (psav->FbMapSize -
- maxlines * widthBytes -
- bufferSize * 2);
- }
-#endif
- /* Set a minimum usable local texture heap size. This will fit
- * two 256x256x32bpp textures.
- */
- if ( pSAVAGEDRIServer->textureSize < 512 * 1024 ) {
- pSAVAGEDRIServer->textureOffset = 0;
- pSAVAGEDRIServer->textureSize = 0;
- }
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "textureSize:0x%08lx \n",
- pSAVAGEDRIServer->textureSize);
-
- /* Reserve space for textures */
- /* if (pSAVAGEDRIServer->textureSize)*/
- pSAVAGEDRIServer->textureOffset = (psav->videoRambytes -
- 4096 - /* hw cursor*/
- psav->cobSize - /*COB*/
- pSAVAGEDRIServer->textureSize) & ~SAVAGE_BUFFER_ALIGN;
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "textureOffset:0x%08lx \n",
- pSAVAGEDRIServer->textureOffset);
-
- /* Reserve space for the shared depth buffer */
- /*pSAVAGEDRIServer->depthOffset = (pSAVAGEDRIServer->textureOffset -
- tiledBufferSize_Z + SAVAGE_BUFFER_ALIGN) & ~SAVAGE_BUFFER_ALIGN;
- */
- pSAVAGEDRIServer->depthOffset = (pSAVAGEDRIServer->textureOffset -
- tiledBufferSize) & ~SAVAGE_BUFFER_ALIGN;
- /*pSAVAGEDRIServer->depthPitch = tiledwidthBytes_Z;*/
- pSAVAGEDRIServer->depthPitch = tiledwidthBytes;
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "depthOffset:0x%08lx,depthPitch:%d\n",
- pSAVAGEDRIServer->depthOffset,pSAVAGEDRIServer->depthPitch);
-
- /* Reserve space for the shared back buffer */
- pSAVAGEDRIServer->backOffset = (pSAVAGEDRIServer->depthOffset -
- tiledBufferSize ) & ~SAVAGE_BUFFER_ALIGN;
-
- pSAVAGEDRIServer->backPitch = tiledwidthBytes;
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "backOffset:0x%08lx,backPitch:%d\n",
- pSAVAGEDRIServer->backOffset,pSAVAGEDRIServer->backPitch);
-
- /*scanlines = pSAVAGEDRIServer->backOffset / widthBytes - 1;*/
- /*if ( scanlines > maxlines ) scanlines = maxlines;*/
- /* CR47983, XvMC do not work on system with frame buffer less than 32MB.
- * VBE reports frame buffer size a little less than 16MB, this makes the condition
- * truns out FALSE.
- * Now just reduce the level to 14.5MB, things should be OK, while the hwmc frame buffer layout
- * caculation need more understanding and should be fixed.
- */
- /*if total memory is less than 16M, there is no HWMC support */
- if((psav->videoRambytes < /*16*/(14*1024+512)*1024L) || psav->bDisableXvMC)
- {
- psav->hwmcOffset = 0;
- psav->hwmcSize = 0;
- }
- else
- {
- psav->hwmcSize = (10*1024+512)*1024; /* HWMC needs 10MB FB */
- psav->hwmcOffset = (psav->videoRambytes - 0x2000 - psav->hwmcSize) &
- ~SAVAGE_BUFFER_ALIGN;
- if (psav->hwmcOffset < bufferSize) {
- /* If hwmc buffer will lay in on-screen buffer. */
- psav->hwmcSize = 0;
- psav->hwmcOffset = 0;
- }
- }
-
- /* CR48438: Title: "Lots of garbage appear on the background when
- * drag the DVD player XINE window at 1024x768 or higher mode."
- * hwmc used xserver's memory, now xserver will get less memory.
- * Both 3D and hwmc's memory usage are considered now.
- */
-#if 0
- if (pSAVAGEDRIServer->backOffset < psav->hwmcOffset )
- psav->cyMemory = pSAVAGEDRIServer->backOffset / widthBytes - 1;
- else
- psav->cyMemory = psav->hwmcOffset / widthBytes -1;
-#endif
-
- psav->cyMemory = pSAVAGEDRIServer->backOffset / widthBytes - 1;
- if (psav->cyMemory > 0x7FFF) {
- psav->cyMemory = 0x7FFF;
- }
-
- MemBox.x1 = 0;
- MemBox.y1 = 0;
- MemBox.x2 = psav->cxMemory;
- MemBox.y2 = psav->cyMemory;
-
- if (!xf86InitFBManager(pScreen, &MemBox)) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Memory manager initialization to (%d,%d) (%d,%d) failed\n",
- MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2 );
- return FALSE;
- } else {
- int tmp,width, height;
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "Memory manager initialized to (%d,%d) (%d,%d)\n",
- MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2 );
- /*
- * because the alignment requirement,the on-screen need more memory
- * than (0,0,virtualX,virtualY), but xf86InitFBManager only subtract
- * (pScrn->virtualX * pScrn->virtualY from (0,0,cxMemory,cyMemory),so
- * here,we should reserve some memory for on-screen
- */
- tmp = ((psav->cxMemory * pScrn->virtualY - pScrn->virtualX * pScrn->virtualY)
- + psav->cxMemory -1) / (psav->cxMemory);
- if (tmp)
- xf86AllocateOffscreenArea(pScreen, psav->cxMemory,tmp, 0, NULL, NULL, NULL);
-
- if (xf86QueryLargestOffscreenArea(pScreen, &width,
- &height, 0, 0, 0 ) ) {
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "Largest offscreen area available: %d x %d\n",
- width, height );
- }
- }
- psav->reserved = 0;
-
- if(tiledBufferSize > bufferSize)
- {
- psav->reserved = xf86AllocateOffscreenLinear(pScreen,
- (tiledBufferSize - bufferSize),1,0,0,0);
-
- }
- if(psav->reserved)
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "Reserved for tiled front buffer at offset 0x%08lx ,size:0x%08lx\n",
- psav->reserved->offset, psav->reserved->size);
-
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "Reserved back buffer at offset 0x%x\n",
- pSAVAGEDRIServer->backOffset );
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "Reserved depth buffer at offset 0x%x\n",
- pSAVAGEDRIServer->depthOffset );
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "Reserved %d kb for textures at offset 0x%x\n",
- pSAVAGEDRIServer->textureSize/1024,
- pSAVAGEDRIServer->textureOffset );
- }
- else
-#endif
- {
- int tmp;
-
- /*
- * why this code? because BoxRec members are short int
- * if cyMemory is bigger than 0x7fff,then it will overflow
- */
- if (psav->cyMemory > 0x7FFF) {
- psav->cyMemory = 0x7FFF;
- }
-
- AvailFBArea.x1 = 0;
- AvailFBArea.y1 = 0;
- AvailFBArea.x2 = psav->cxMemory;
- AvailFBArea.y2 = psav->cyMemory;
- xf86InitFBManager(pScreen, &AvailFBArea);
- /*
- * because the alignment requirement,the on-screen need more memory
- * than (0,0,virtualX,virtualY), but xf86InitFBManager only subtract
- * (pScrn->virtualX * pScrn->virtualY from (0,0,cxMemory,cyMemory),so
- * here,we should reserver some memory for on-screen
- */
- tmp = ((psav->cxMemory * pScrn->virtualY - pScrn->virtualX * pScrn->virtualY)
- + psav->cxMemory -1) / (psav->cxMemory);
- if (tmp)
- xf86AllocateOffscreenArea(pScreen, psav->cxMemory,tmp, 0, NULL, NULL, NULL);
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %d lines for offscreen memory.\n",
- psav->cyMemory - pScrn->virtualY );
- }
-
-#if 0
AvailFBArea.x1 = 0;
AvailFBArea.y1 = 0;
AvailFBArea.x2 = pScrn->displayWidth;
@@ -1516,8 +571,6 @@ SavageInitAccel(ScreenPtr pScreen)
xf86DrvMsg( pScrn->scrnIndex, X_INFO,
"Using %d lines for offscreen memory.\n",
psav->ScissB - pScrn->virtualY );
-#endif
-
return XAAInit(pScreen, xaaptr);
}
@@ -1551,7 +604,7 @@ SavageHelpPatternROP(ScrnInfoPtr pScrn, int *fg, int *bg, int pm, int *rop)
if(pm == infoRec->FullPlanemask) {
if(!NO_SRC_ROP(*rop))
ret |= ROP_PAT;
- *rop = XAACopyROP[*rop];
+ *rop = XAAGetCopyROP(*rop);
} else {
switch(*rop) {
case GXnoop:
@@ -1568,7 +621,7 @@ SavageHelpPatternROP(ScrnInfoPtr pScrn, int *fg, int *bg, int pm, int *rop)
ret |= ROP_PAT | ROP_SRC;
break;
}
- *rop = XAACopyROP_PM[*rop];
+ *rop = XAAGetCopyROP_PM(*rop);
}
return ret;
@@ -1586,7 +639,7 @@ SavageHelpSolidROP(ScrnInfoPtr pScrn, int *fg, int pm, int *rop)
if(pm == infoRec->FullPlanemask) {
if(!NO_SRC_ROP(*rop))
ret |= ROP_PAT;
- *rop = XAACopyROP[*rop];
+ *rop = XAAGetCopyROP(*rop);
} else {
switch(*rop) {
case GXnoop:
@@ -1601,7 +654,7 @@ SavageHelpSolidROP(ScrnInfoPtr pScrn, int *fg, int pm, int *rop)
ret |= ROP_PAT | ROP_SRC;
break;
}
- *rop = XAACopyROP_PM[*rop];
+ *rop = XAAGetCopyROP_PM(*rop);
}
return ret;
@@ -1629,7 +682,7 @@ SavageSetupForScreenToScreenCopy(
int cmd;
cmd = BCI_CMD_RECT | BCI_CMD_DEST_GBD | BCI_CMD_SRC_GBD;
- BCI_CMD_SET_ROP( cmd, XAACopyROP[rop] );
+ BCI_CMD_SET_ROP( cmd, XAAGetCopyROP(rop) );
if (transparency_color != -1)
cmd |= BCI_CMD_SEND_COLOR | BCI_CMD_SRC_TRANSPARENT;
@@ -1939,6 +992,7 @@ SavageSubsequentMono8x8PatternFillRect(
}
+#if 0
static void
SavageSetupForColor8x8PatternFill(
ScrnInfoPtr pScrn,
@@ -1951,7 +1005,6 @@ SavageSetupForColor8x8PatternFill(
SavagePtr psav = SAVPTR(pScrn);
int cmd;
- int mix;
unsigned int bd;
int pat_offset;
@@ -1963,8 +1016,7 @@ SavageSetupForColor8x8PatternFill(
cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP
| BCI_CMD_DEST_GBD | BCI_CMD_PAT_PBD_COLOR_NEW;
- /*mix = XAAHelpSolidROP( pScrn, &trans_col, planemask, &rop );*/
- mix = SavageHelpSolidROP( pScrn, &trans_col, planemask, &rop );
+ (void) XAAHelpSolidROP( pScrn, &trans_col, planemask, &rop );
BCI_CMD_SET_ROP(cmd, rop);
bd = BCI_BD_BW_DISABLE;
@@ -1994,14 +1046,14 @@ SavageSubsequentColor8x8PatternFillRect(
if( !w || !h )
return;
- psav->WaitQueue(psav,6);
+ psav->WaitQueue(psav,5);
BCI_SEND(psav->SavedBciCmd);
BCI_SEND(psav->SavedSbdOffset);
BCI_SEND(psav->SavedSbd);
- BCI_SEND(BCI_X_Y(patternx,patterny));
BCI_SEND(BCI_X_Y(x, y));
BCI_SEND(BCI_W_H(w, h));
}
+#endif
static void
@@ -2040,6 +1092,7 @@ SavageSubsequentSolidBresenhamLine(
e2+err));
}
+
#if 0
static void
SavageSubsequentSolidTwoPointLine(
@@ -2103,6 +1156,7 @@ SavageSubsequentSolidTwoPointLine(
#endif
+
static void
SavageSetClippingRectangle(
ScrnInfoPtr pScrn,