diff options
| -rw-r--r-- | src/savage_accel.c | 1028 | ||||
| -rw-r--r-- | src/savage_dri.c | 2 | ||||
| -rw-r--r-- | src/savage_driver.c | 860 | ||||
| -rw-r--r-- | src/savage_image.c | 6 |
4 files changed, 231 insertions, 1665 deletions
diff --git a/src/savage_accel.c b/src/savage_accel.c index 59aede6..9cf3fdc 100644 --- a/src/savage_accel.c +++ b/src/savage_accel.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c,v 1.14 2001/12/13 18:01:50 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c,v 1.23 2003/12/22 17:48:10 tsi Exp $ */ /* * @@ -11,7 +11,6 @@ * * Created 20/03/97 by Sebastien Marineau for 3.3.6 * Modified 17-Nov-2000 by Tim Roberts for 4.0.1 - * Modified Feb-2004 by Alex Deucher - integrating DRI support * Revision: * */ @@ -24,12 +23,6 @@ #include "savage_driver.h" #include "savage_regs.h" #include "savage_bci.h" -#include "savage_dri.h" - -#ifdef XF86DRI -#define _XF86DRI_SERVER_ -#include "savage_dri.h" -#endif /* Forward declaration of functions used in the driver */ @@ -72,6 +65,7 @@ static void SavageSubsequentSolidBresenhamLine( int err, int length, int octant); + #if 0 static void SavageSubsequentSolidTwoPointLine( ScrnInfoPtr pScrn, @@ -81,6 +75,7 @@ static void SavageSubsequentSolidTwoPointLine( int y2, int bias); #endif + #if 0 static void SavageSetupForScreenToScreenColorExpand( ScrnInfoPtr pScrn, @@ -135,6 +130,7 @@ static void SavageSubsequentMono8x8PatternFillRect( int w, int h); +#if 0 static void SavageSetupForColor8x8PatternFill( ScrnInfoPtr pScrn, int patternx, @@ -151,6 +147,7 @@ static void SavageSubsequentColor8x8PatternFillRect( int y, int w, int h); +#endif static void SavageSetClippingRectangle( ScrnInfoPtr pScrn, @@ -211,11 +208,6 @@ unsigned long readfb( unsigned long addr ); unsigned long writefb( unsigned long addr, unsigned long value ); void writescan( unsigned long scan, unsigned long color ); -static int GetTileAperturePitch(ulong dwWidth, ulong dwBpp); -void SavageSetGBD_M7(ScrnInfoPtr pScrn); -void SavageSetGBD_Twister(ScrnInfoPtr pScrn); -void SavageSetGBD_PM(ScrnInfoPtr pScrn); -void SavageSetGBD_2000(ScrnInfoPtr pScrn); /* * This is used to cache the last known value for routines we want to @@ -224,29 +216,8 @@ void SavageSetGBD_2000(ScrnInfoPtr pScrn); ScrnInfoPtr gpScrn = 0; -/* - * returns the aperture pitch for tiled mode. - * if MM850C_15 = 0 (use NB linear tile mode) the pitch is screen stride aligned to 128bytes - * if MM850C_15 = 1 (use MS-1 128bit non-linear tile mode),we should do it as follows - * we now only support the later, and don't use Y range flag,see tile surface register -*/ -static int GetTileAperturePitch(ulong dwWidth, ulong dwBpp) -{ - switch (dwBpp) { - case 4: - case 8: - return(0x2000); - break; - case 16: - return(0x1000); - break; - case 32: - return(0x2000); - break; - default: - return(0x2000); - } -} + + void SavageInitialize2DEngine(ScrnInfoPtr pScrn) @@ -275,8 +246,7 @@ SavageInitialize2DEngine(ScrnInfoPtr pScrn) /* Disable BCI */ OUTREG(0x48C18, INREG(0x48C18) & 0x3FF0); /* Setup BCI command overflow buffer */ - OUTREG(0x48C14, (psav->cobOffset >> 11) | (psav->cobIndex << 29)); /* tim */ - /*OUTREG(S3_OVERFLOW_BUFFER, psav->cobOffset >> 11 | 0xE0000000);*/ /* S3 */ + OUTREG(0x48C14, (psav->cobOffset >> 11) | (psav->cobIndex << 29)); /* Program shadow status update. */ OUTREG(0x48C10, 0x78207220); if( psav->ShadowStatus ) @@ -294,38 +264,23 @@ SavageInitialize2DEngine(ScrnInfoPtr pScrn) break; case S3_SAVAGE4: - case S3_TWISTER: case S3_PROSAVAGE: - case S3_PROSAVAGEDDR: case S3_SUPERSAVAGE: /* Disable BCI */ OUTREG(0x48C18, INREG(0x48C18) & 0x3FF0); - if (!psav->disableCOB) { - /* Setup BCI command overflow buffer */ - OUTREG(0x48C14, (psav->cobOffset >> 11) | (psav->cobIndex << 29)); - } - /* Program shadow status update */ /* AGD: what should this be? */ - OUTREG(0x48C10, 0x00700040); /* tim */ - /*OUTREG(0x48C10, 0x0e440f04L);*/ /* S3 */ + /* Program shadow status update */ + OUTREG(0x48C10, 0x00700040); if( psav->ShadowStatus ) { OUTREG(0x48C0C, psav->ShadowPhysical | 1 ); - if (psav->disableCOB) { - /* Enable BCI without the COB */ - OUTREG(0x48C18, INREG(0x48C18) | 0x0a); - } else { - OUTREG32(0x48C18, INREG32(0x48C18) | 0x0E); - } + /* Enable BCI without the COB */ + OUTREG(0x48C18, INREG(0x48C18) | 0x0a); } else { OUTREG(0x48C0C, 0); - if (psav->disableCOB) { - /* Enable BCI without the COB */ - OUTREG(0x48C18, INREG(0x48C18) | 0x08); - } else { - OUTREG32(0x48C18, INREG32(0x48C18) | 0x0C); - } + /* Enable BCI without the COB */ + OUTREG(0x48C18, INREG(0x48C18) | 0x08); } break; @@ -365,637 +320,9 @@ SavageInitialize2DEngine(ScrnInfoPtr pScrn) SavageSetGBD(pScrn); } -void -SavageSetGBD(ScrnInfoPtr pScrn) -{ - SavagePtr psav = SAVPTR(pScrn); - - UnProtectCRTC(); - UnLockExtRegs(); - VerticalRetraceWait(); - - psav->lDelta = pScrn->virtualX * (pScrn->bitsPerPixel >> 3); - - /* - * we can use Option "DisableTile" "TRUE" to disable tile mode - * if don't disable tile,we only support tile mode under 16/32bpp - */ - if ((!psav->bDisableTile) && ((pScrn->bitsPerPixel == 16) || (pScrn->bitsPerPixel == 32))) { - /* tileing in 16/32 BPP */ - psav->bTiled = TRUE; - psav->lDelta = ((psav->lDelta + 127) >> 7) << 7; - - if (psav->Chipset == S3_SAVAGE_MX || psav->Chipset == S3_SAVAGE3D) - psav->ulAperturePitch = 0x2000; - else - psav->ulAperturePitch = GetTileAperturePitch(pScrn->virtualX,pScrn->bitsPerPixel); - - /* Use the aperture for linear screen */ - psav->FBStart = psav->ApertureMap; - } else { - psav->bTiled = FALSE; - /* 32: Alignment for nontiled mode */ - psav->lDelta = ((psav->lDelta + 31) >> 5) << 5; - psav->ulAperturePitch = psav->lDelta; - } - - /* if you are using linear mode for 2D, 3D still needs to be tiled, linear AperturePitch/Delta - seem to be wrong for savagespan */ - if (psav->Chipset == S3_SAVAGE_MX || psav->Chipset == S3_SAVAGE3D) - psav->ul3DAperturePitch = 0x2000; - else - psav->ul3DAperturePitch = GetTileAperturePitch(pScrn->virtualX,pScrn->bitsPerPixel); - - psav->l3DDelta = (((pScrn->virtualX * (pScrn->bitsPerPixel >> 3)) + 127) >> 7) << 7; - - psav->Bpp = pScrn->bitsPerPixel >> 3; - psav->cxMemory = psav->lDelta / (psav->Bpp); - psav->cyMemory = psav->endfb / psav->lDelta - 1; - /*psav->cyMemory = (psav->CursorKByte << 10) / (pScrn->displayWidth * (pScrn->bitsPerPixel / 8));*/ - /* ??????????? */ - if (psav->cyMemory > 2048) - psav->cyMemory = 2048; - - /* - * If tiling, adjust down psav->cyMemory to the last multiple - * of a tileheight, so that we don't try to use partial tiles. - */ - if (psav->bTiled) { - psav->cyMemory -= (psav->cyMemory % 16); - } - - /* - * Initialization per GX-3. - * - * 1. MM48C18 - Disable BCI. - * 2. MM48C0C - Enable updating shadow status - * and initialize shadow memory address. - * 2b. MM48C18 - bit 1 = 1, Enable Command Buffer status updates - * (S3_OVERFLOW_BUFFER_PTR) - * 3. MM48C10 - Initialize command buffer threshold - * (S3_BUFFER_THRESHOLD) - * 4. MM48C14 - Setup command buffer offset and size - * (S3_OVERFLOW_BUFFER) - * 5. MM816C - Enable BCI. - * 6. MM48C40 - Setup tiled surface 0 register. - * 7. CR31 - bit 0 = 0, Disable address offset bits(CR6A_6-0). - * 8. CR50 - bit 7,6,0 = 111, Use Global Bitmap Descriptor. - * 9. CR88 - bit 4 = 0, Block write on (linear mode) IFF we know we - * have the right kind of SGRAM memory, - * bit 4 = 1, Block write off (always off if tiling) - * 10.CR69 - Bit 7 = 1, MM81C0 and 81C4 are used to control - * primary stream. - * 11.MM8128, MM812c - Setup read/write mask registers - * 12.MM816C, MM8168 - Set up Global Bitmap Descriptor 1 and 2. - */ - switch (psav->Chipset) { - case S3_SAVAGE3D: - case S3_SAVAGE_MX: - SavageSetGBD_M7(pScrn); - break; - case S3_SAVAGE4: - case S3_TWISTER: - case S3_PROSAVAGE: - case S3_PROSAVAGEDDR: - SavageSetGBD_Twister(pScrn); - break; - case S3_SUPERSAVAGE: - SavageSetGBD_PM(pScrn); - break; - case S3_SAVAGE2000: - SavageSetGBD_2000(pScrn); - break; - } -} - -void SavageSetGBD_Twister(ScrnInfoPtr pScrn) -{ - SavagePtr psav = SAVPTR(pScrn); - ulong ulTmp; - uchar byte; - int bci_enable, tile16, tile32; - - if (psav->Chipset == S3_SAVAGE4) { - bci_enable = BCI_ENABLE; - tile16 = TILE_FORMAT_DESTINATION16; - tile32 = TILE_FORMAT_DESTINATION32; - } else { - bci_enable = BCI_ENABLE_TWISTER; - tile16 = TILE_DESTINATION; - tile32 = TILE_DESTINATION; - } - - /* MM81C0 and 81C4 are used to control primary stream. */ - OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000); - - /* - * Program Primary Stream Stride Register. - * - * Tell engine if tiling on or off, set primary stream stride, and - * if tiling, set tiling bits/pixel and primary stream tile offset. - * Note that tile offset (bits 16 - 29) must be scanline width in - * bytes/128bytespertile * 256 Qwords/tile. This is equivalent to - * lDelta * 2. Remember that if tiling, lDelta is screenwidth in - * bytes padded up to an even number of tilewidths. - */ - if (!psav->bTiled) { - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFFE000) | - (psav->lDelta & 0x00001fff)); - } - else if (pScrn->bitsPerPixel == 16) { - /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */ - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFFE000) - | 0x80000000 | (psav->lDelta & 0x00001fff)); - } - else if (pScrn->bitsPerPixel == 32) { - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFFE000) - | 0xC0000000 | (psav->lDelta & 0x00001fff)); - } - - /* - * CR69, bit 7 = 1 - * to use MM streams processor registers to control primary stream. - */ - OUTREG8(CRT_ADDRESS_REG,0x69); - byte = INREG8(CRT_DATA_REG) | 0x80; - OUTREG8(CRT_DATA_REG,byte); - - OUTREG32(0x8128, 0xFFFFFFFFL); - OUTREG32(0x812C, 0xFFFFFFFFL); - - OUTREG32(S3_BCI_GLB_BD_HIGH, bci_enable | S3_LITTLE_ENDIAN | S3_BD64); - - - /* CR50, bit 7,6,0 = 111, Use GBD.*/ - OUTREG8(CRT_ADDRESS_REG,0x50); - byte = INREG8(CRT_DATA_REG) | 0xC1; - OUTREG8(CRT_DATA_REG, byte); - - /* - * if MS1NB style linear tiling mode. - * bit MM850C[15] = 0 select NB linear tile mode. - * bit MM850C[15] = 1 select MS-1 128-bit non-linear tile mode. - */ - ulTmp = INREG32(ADVANCED_FUNC_CTRL) | 0x8000; /* use MS-s style tile mode*/ - OUTREG32(ADVANCED_FUNC_CTRL,ulTmp); - - /* - * Set up Tiled Surface Registers - * Bit 25:20 - Surface width in tiles. - * Bit 29 - Y Range Flag. - * Bit 31:30 = 00, 4 bpp. - * = 01, 8 bpp. - * = 10, 16 bpp. - * = 11, 32 bpp. - */ - /* - * Global Bitmap Descriptor Register MM816C - twister/prosavage - * bit 24~25: tile format - * 00: linear - * 01: destination tiling format - * 10: texture tiling format - * 11: reserved - * bit 28: block write disble/enable - * 0: disable - * 1: enable - */ - /* - * Global Bitmap Descriptor Register MM816C - savage4 - * bit 24~25: tile format - * 00: linear - * 01: reserved - * 10: 16 bpp tiles - * 11: 32 bpp tiles - * bit 28: block write disable/enable - * 0: enable - * 1: disable - */ - if (!psav->bTiled) { - /* - * Do not enable block_write even for non-tiling modes, because - * the driver cannot determine if the memory type is the certain - * type of SGRAM for which block_write can be used. - */ - psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */ - } - else if (pScrn->bitsPerPixel == 16) { - psav->GlobalBD.bd1.HighPart.ResBWTile = tile16; /* 16 bpp/destination tiling format */ - - ulTmp = (((pScrn->virtualX + 0x3F) & 0x0000FFC0) >> 6) << 20; - OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16); - } - else if (pScrn->bitsPerPixel == 32) { - psav->GlobalBD.bd1.HighPart.ResBWTile = tile32; /* 32 bpp/destination tiling format */ - - ulTmp = ( ((pScrn->virtualX + 0x1F) & 0x0000FFE0) >> 5) << 20; - OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32); - } - - psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write - was 0 */ - /* HW uses width */ - psav->GlobalBD.bd1.HighPart.Stride = (ushort) psav->lDelta / (pScrn->bitsPerPixel >> 3); - psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel); - psav->GlobalBD.bd1.Offset = 0; - - - /* - * CR88, bit 4 - Block write enabled/disabled. - * - * Note: Block write must be disabled when writing to tiled - * memory. Even when writing to non-tiled memory, block - * write should only be enabled for certain types of SGRAM. - */ - OUTREG8(CRT_ADDRESS_REG,0x88); - byte = INREG8(CRT_DATA_REG) | DISABLE_BLOCK_WRITE_2D; - OUTREG8(CRT_DATA_REG,byte); - - /* - * CR31, bit 0 = 0, Disable address offset bits(CR6A_6-0). - * bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window - * at A000:0. - */ - OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG); /* cr31 */ - byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000)); - OUTREG8(CRT_DATA_REG,byte); /* perhaps this should be 0x0c */ - - /* turn on screen */ - OUTREG8(SEQ_ADDRESS_REG,0x01); - byte = INREG8(SEQ_DATA_REG) & ~0x20; - OUTREG8(SEQ_DATA_REG,byte); - - /* program the GBD and SBD's */ - OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart); - OUTREG32(S3_GLB_BD_HIGH,psav->GlobalBD.bd2.HiPart | bci_enable | S3_LITTLE_ENDIAN | S3_BD64); - OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart); - OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart); - OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart); - OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart); -} - -void SavageSetGBD_M7(ScrnInfoPtr pScrn) -{ - SavagePtr psav = SAVPTR(pScrn); - ulong ulTmp; - uchar byte; - int bci_enable, tile16, tile32; - - bci_enable = BCI_ENABLE; - tile16 = TILE_FORMAT_DESTINATION16; - tile32 = TILE_FORMAT_DESTINATION32; - - - /* following is the enable case */ - - /* SR01:turn off screen */ - OUTREG8 (SEQ_ADDRESS_REG,0x01); - byte = INREG8(SEQ_DATA_REG) | 0x20; - OUTREG8(SEQ_DATA_REG,byte); - - /* - * CR67_3: - * = 1 stream processor MMIO address and stride register - * are used to control the primary stream - * = 0 standard VGA address and stride registers - * are used to control the primary streams - */ - OUTREG8(CRT_ADDRESS_REG,0x67); - byte = INREG8(CRT_DATA_REG) | 0x08; - OUTREG8(CRT_DATA_REG,byte); - - /* IGA 2 */ - OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA2_READS_WRITES); - - OUTREG8(CRT_ADDRESS_REG,0x67); - byte = INREG8(CRT_DATA_REG) | 0x08; - OUTREG8(CRT_DATA_REG,byte); - - OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1); - - /* - * load ps1 active registers as determined by MM81C0/81C4 - * load ps2 active registers as determined by MM81B0/81B4 - */ - OUTREG8(CRT_ADDRESS_REG,0x65); - byte = INREG8(CRT_DATA_REG) | 0x03; - OUTREG8(CRT_DATA_REG,byte); - -#if 0 - /* Set primary stream to bank 0 */ - OUTREG8(CRT_ADDRESS_REG, MEMORY_CTRL0_REG);/* CRCA */ - byte = INREG8(CRT_DATA_REG) & ~(MEM_PS1 + MEM_PS2) ; - OUTREG8(CRT_DATA_REG,byte); - /* - * if we have 8MB of frame buffer here then we must really be a 16MB - * card and that means that the second device is always in the upper - * bank of memory (MHS) - */ - if (psav->videoRambytes >= 0x800000) { - /* 16MB Video Memory cursor is at the end in Bank 1 */ - byte |= 0x3; - OUTREG16(CRT_ADDRESS_REG, (byte << 8) | MEMORY_CTRL0_REG); - } -#endif - - /* MM81C0 and 81C4 are used to control primary stream. */ - OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000); - /* - * Program Primary Stream Stride Register. - * - * Tell engine if tiling on or off, set primary stream stride, and - * if tiling, set tiling bits/pixel and primary stream tile offset. - * Note that tile offset (bits 16 - 29) must be scanline width in - * bytes/128bytespertile * 256 Qwords/tile. This is equivalent to - * lDelta * 2. Remember that if tiling, lDelta is screenwidth in - * bytes padded up to an even number of tilewidths. - */ - if (!psav->bTiled) { - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) | - (psav->lDelta & 0x00003fff)); - OUTREG32(PRI_STREAM2_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) | - (psav->lDelta & 0x00003fff)); - } else if (pScrn->bitsPerPixel == 16) { - /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */ - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0x80000000 | (psav->lDelta & 0x00003fff)); - OUTREG32(PRI_STREAM2_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0x80000000 | (psav->lDelta & 0x00003fff)); - - } else if (pScrn->bitsPerPixel == 32) { - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0xC0000000 | (psav->lDelta & 0x00003fff)); - OUTREG32(PRI_STREAM2_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0xC0000000 | (psav->lDelta & 0x00003fff)); - } - - OUTREG32(0x8128, 0xFFFFFFFFL); - OUTREG32(0x812C, 0xFFFFFFFFL); - - OUTREG32(S3_BCI_GLB_BD_HIGH, bci_enable | S3_LITTLE_ENDIAN | S3_BD64); - - /* CR50, bit 7,6,0 = 111, Use GBD.*/ - OUTREG8(CRT_ADDRESS_REG,0x50); - byte = INREG8(CRT_DATA_REG) | 0xC1; - OUTREG8(CRT_DATA_REG, byte); - - /* - * CR78, bit 3 - Block write enabled(1)/disabled(0). - * bit 2 - Block write cycle time(0:2 cycles,1: 1 cycle) - * Note: Block write must be disabled when writing to tiled - * memory. Even when writing to non-tiled memory, block - * write should only be enabled for certain types of SGRAM. - */ - OUTREG8(CRT_ADDRESS_REG,0x78); - /*byte = INREG8(CRT_DATA_REG) & ~0x0C;*/ - byte = INREG8(CRT_DATA_REG) | 0xfb; - OUTREG8(CRT_DATA_REG,byte); - - /* - * Tiled Surface 0 Registers MM48C40: - * bit 0~23: tile surface 0 frame buffer offset - * bit 24~29:tile surface 0 width - * bit 30~31:tile surface 0 bits/pixel - * 00: reserved - * 01, 8 bits - * 10, 16 Bits. - * 11, 32 Bits. - */ - /* - * Global Bitmap Descriptor Register MM816C - * bit 24~25: tile format - * 00: linear - * 01: reserved - * 10: 16 bit - * 11: 32 bit - * bit 28: block write disble/enable - * 0: enable - * 1: disable - */ - if (!psav->bTiled) { - /* - * Do not enable block_write even for non-tiling modes, because - * the driver cannot determine if the memory type is the certain - * type of SGRAM for which block_write can be used. - */ - psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */ - - } - else if (pScrn->bitsPerPixel == 16) { - psav->GlobalBD.bd1.HighPart.ResBWTile = tile16;/* 16 bit */ - - ulTmp = ((psav->lDelta / 2) >> 6) << 24; - OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16); - } - else if (pScrn->bitsPerPixel == 32) { - psav->GlobalBD.bd1.HighPart.ResBWTile = tile32;/* 32 bit */ - - ulTmp = ((psav->lDelta / 4) >> 5) << 24; - OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32); - } - - psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write */ - /* HW uses width */ - psav->GlobalBD.bd1.HighPart.Stride = (ushort)(psav->lDelta / (pScrn->bitsPerPixel >> 3)); - psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel); - psav->GlobalBD.bd1.Offset = 0; - - - /* - * CR31, bit 0 = 0, Disable address offset bits(CR6A_6-0). - * bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window - * at A000:0. - */ - OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG); /* cr31 */ - byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000)); - OUTREG8(CRT_DATA_REG,byte); - - /* program the GBD and SBD's */ - OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart ); - /* 8: bci enable */ - OUTREG32(S3_GLB_BD_HIGH,(psav->GlobalBD.bd2.HiPart - | bci_enable | S3_LITTLE_ENDIAN | S3_BD64)); - OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart); - OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart); - OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart); - OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart); - - /* turn on screen */ - OUTREG8(SEQ_ADDRESS_REG,0x01); - byte = INREG8(SEQ_DATA_REG) & ~0X20; - OUTREG8(SEQ_DATA_REG,byte); -} - -void SavageSetGBD_PM(ScrnInfoPtr pScrn) -{ - SavagePtr psav = SAVPTR(pScrn); - ulong ulTmp; - uchar byte; - int bci_enable, tile16, tile32; - - /* Is supersavage like savage4 or twister? - * change the bci_enable and tile bits here. - */ - bci_enable = BCI_ENABLE_TWISTER; - tile16 = TILE_DESTINATION; - tile32 = TILE_DESTINATION; - - - /* following is the enable case */ - - /* SR01:turn off screen */ - OUTREG8 (SEQ_ADDRESS_REG,0x01); - byte = INREG8(SEQ_DATA_REG) | 0x20; - OUTREG8(SEQ_DATA_REG,byte); - - /* - * CR67_3: - * = 1 stream processor MMIO address and stride register - * are used to control the primary stream - * = 0 standard VGA address and stride registers - * are used to control the primary streams - */ - OUTREG8(CRT_ADDRESS_REG,0x67); - byte = INREG8(CRT_DATA_REG) | 0x08; - OUTREG8(CRT_DATA_REG,byte); - - /* IGA 2 */ - OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA2_READS_WRITES); - - OUTREG8(CRT_ADDRESS_REG,0x67); - byte = INREG8(CRT_DATA_REG) | 0x08; - OUTREG8(CRT_DATA_REG,byte); - - OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1); - - /* - * load ps1 active registers as determined by MM81C0/81C4 - * load ps2 active registers as determined by MM81B0/81B4 - */ - OUTREG8(CRT_ADDRESS_REG,0x65); - byte = INREG8(CRT_DATA_REG) | 0x03; - OUTREG8(CRT_DATA_REG,byte); - - /* - * Program Primary Stream Stride Register. - * - * Tell engine if tiling on or off, set primary stream stride, and - * if tiling, set tiling bits/pixel and primary stream tile offset. - * Note that tile offset (bits 16 - 29) must be scanline width in - * bytes/128bytespertile * 256 Qwords/tile. This is equivalent to - * lDelta * 2. Remember that if tiling, lDelta is screenwidth in - * bytes padded up to an even number of tilewidths. - */ - if (!psav->bTiled) { - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) | - (psav->lDelta & 0x00001fff)); - OUTREG32(PRI_STREAM2_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) | - (psav->lDelta & 0x00001fff)); - } else if (pScrn->bitsPerPixel == 16) { - /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */ - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0x80000000 | (psav->lDelta & 0x00001fff)); - OUTREG32(PRI_STREAM2_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0x80000000 | (psav->lDelta & 0x00001fff)); - - } else if (pScrn->bitsPerPixel == 32) { - OUTREG32(PRI_STREAM_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0xC0000000 | (psav->lDelta & 0x00001fff)); - OUTREG32(PRI_STREAM2_STRIDE, - (((psav->lDelta * 2) << 16) & 0x3FFF0000) - | 0xC0000000 | (psav->lDelta & 0x00001fff)); - } - - /* MM81C0 and 81C4 are used to control primary stream. */ - /*OUTREG32(PRI_STREAM_FBUF_ADDR0,0x80000000);*/ - OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000); - /*OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x80000000);*/ - OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000); - - OUTREG32(0x8128, 0xFFFFFFFFL); - OUTREG32(0x812C, 0xFFFFFFFFL); - - /* bit 28:block write disable */ - OUTREG32(S3_GLB_BD_HIGH, bci_enable | S3_BD64 | 0x10000000); - - /* CR50, bit 7,6,0 = 111, Use GBD.*/ - OUTREG8(CRT_ADDRESS_REG,0x50); - byte = INREG8(CRT_DATA_REG) | 0xC1; - OUTREG8(CRT_DATA_REG, byte); - - if (!psav->bTiled) { - /* - * Do not enable block_write even for non-tiling modes, because - * the driver cannot determine if the memory type is the certain - * type of SGRAM for which block_write can be used. - */ - psav->GlobalBD.bd1.HighPart.ResBWTile = TILE_FORMAT_LINEAR;/* linear */ - - } - else if (pScrn->bitsPerPixel == 16) { - psav->GlobalBD.bd1.HighPart.ResBWTile = tile16;/* tile format destination */ - - ulTmp = (((pScrn->virtualX + 0x3f) & 0x0000ffc0) >> 6) << 20; - OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP16); - } - else if (pScrn->bitsPerPixel == 32) { - psav->GlobalBD.bd1.HighPart.ResBWTile = tile32;/* tile format destination */ - - ulTmp = (((pScrn->virtualX + 0x1f) & 0x0000ffe0) >> 5) << 20; - OUTREG32(TILED_SURFACE_REGISTER_0,ulTmp | TILED_SURF_BPP32); - } - - psav->GlobalBD.bd1.HighPart.ResBWTile |= 0x10;/* disable block write */ - /* HW uses width */ - psav->GlobalBD.bd1.HighPart.Stride = (ushort)(psav->lDelta / (pScrn->bitsPerPixel >> 3)); - psav->GlobalBD.bd1.HighPart.Bpp = (uchar) (pScrn->bitsPerPixel); - psav->GlobalBD.bd1.Offset = 0; - - /* - * CR31, bit 0 = 0, Disable address offset bits(CR6A_6-0). - * bit 0 = 1, Enable 8 Mbytes of display memory thru 64K window - * at A000:0. - */ - OUTREG8(CRT_ADDRESS_REG,MEMORY_CONFIG_REG); - byte = INREG8(CRT_DATA_REG) & (~(ENABLE_CPUA_BASE_A0000)); - OUTREG8(CRT_DATA_REG,byte); - - /* program the GBD and SBDs */ - OUTREG32(S3_GLB_BD_LOW,psav->GlobalBD.bd2.LoPart ); - OUTREG32(S3_GLB_BD_HIGH,(psav->GlobalBD.bd2.HiPart - | bci_enable /* AGD: shouldn't BCI be enabled? */ - | S3_LITTLE_ENDIAN | 0x10000000 | S3_BD64)); - OUTREG32(S3_PRI_BD_LOW,psav->GlobalBD.bd2.LoPart); - OUTREG32(S3_PRI_BD_HIGH,psav->GlobalBD.bd2.HiPart); - OUTREG32(S3_SEC_BD_LOW,psav->GlobalBD.bd2.LoPart); - OUTREG32(S3_SEC_BD_HIGH,psav->GlobalBD.bd2.HiPart); - - /* turn on screen */ - OUTREG8(SEQ_ADDRESS_REG,0x01); - byte = INREG8(SEQ_DATA_REG) & ~0x20; - OUTREG8(SEQ_DATA_REG,byte); -} - -void SavageSetGBD_2000(ScrnInfoPtr pScrn) +void +SavageSetGBD( ScrnInfoPtr pScrn ) { vgaHWPtr hwp = VGAHWPTR(pScrn); SavagePtr psav = SAVPTR(pScrn); @@ -1003,9 +330,6 @@ void SavageSetGBD_2000(ScrnInfoPtr pScrn) unsigned int vgaCRReg = hwp->IOBase + 5; unsigned long GlobalBitmapDescriptor; - -/* AGD: no idea how to program savage2000 GBD... for now default to Tim's method */ - GlobalBitmapDescriptor = 1 | 8 | BCI_BD_BW_DISABLE; BCI_BD_SET_BPP(GlobalBitmapDescriptor, pScrn->bitsPerPixel); BCI_BD_SET_STRIDE(GlobalBitmapDescriptor, pScrn->displayWidth); @@ -1034,9 +358,10 @@ void SavageSetGBD_2000(ScrnInfoPtr pScrn) OUTREG(0x817C, GlobalBitmapDescriptor); OUTREG(PRI_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3); - OUTREG(SEC_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3); + OUTREG(SEC_STREAM_STRIDE, pScrn->displayWidth * pScrn->bitsPerPixel >> 3); } + /* Acceleration init function, sets up pointers to our accelerated functions */ Bool @@ -1096,7 +421,7 @@ SavageInitAccel(ScreenPtr pScreen) #if 1 xaaptr->SetupForScreenToScreenCopy = SavageSetupForScreenToScreenCopy; xaaptr->SubsequentScreenToScreenCopy = SavageSubsequentScreenToScreenCopy; - xaaptr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | ROP_NEEDS_SOURCE; + xaaptr->ScreenToScreenCopyFlags = NO_TRANSPARENCY | NO_PLANEMASK | ROP_NEEDS_SOURCE; #endif @@ -1117,6 +442,7 @@ SavageInitAccel(ScreenPtr pScreen) xaaptr->Mono8x8PatternFillFlags = 0 | HARDWARE_PATTERN_PROGRAMMED_BITS | HARDWARE_PATTERN_SCREEN_ORIGIN + | ROP_NEEDS_SOURCE | BIT_ORDER_IN_BYTE_MSBFIRST ; if( psav->Chipset == S3_SAVAGE4 ) @@ -1135,9 +461,13 @@ SavageInitAccel(ScreenPtr pScreen) * We could double the width ourselves into a reserved frame buffer * section, but since I went 18 months with only ONE report of this * error, it seems hardly worth the trouble. + * Savage4 seems to have problems with 8x8 color patterns. + * Not sending the pattern offsetsfixes the lockup but the + * drawing problems remain. + * Until further investigation we have to disable this. */ -#if 1 +#if 0 if( (psav->Chipset == S3_SAVAGE3D) || (psav->Chipset == S3_SAVAGE4) ) { xaaptr->SetupForColor8x8PatternFill = @@ -1146,8 +476,8 @@ SavageInitAccel(ScreenPtr pScreen) SavageSubsequentColor8x8PatternFillRect; xaaptr->Color8x8PatternFillFlags = 0 | NO_TRANSPARENCY - | HARDWARE_PATTERN_PROGRAMMED_BITS - | HARDWARE_PATTERN_PROGRAMMED_ORIGIN + | HARDWARE_PATTERN_SCREEN_ORIGIN + | ROP_NEEDS_SOURCE ; } #endif @@ -1155,10 +485,9 @@ SavageInitAccel(ScreenPtr pScreen) /* Solid lines */ #if 1 - xaaptr->SolidLineFlags = NO_PLANEMASK; + xaaptr->SolidLineFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE; xaaptr->SetupForSolidLine = SavageSetupForSolidFill; xaaptr->SubsequentSolidBresenhamLine = SavageSubsequentSolidBresenhamLine; - /*xaaptr->SubsequentSolidTwoPointLine = SavageSubsequentSolidTwoPointLine;*/ #if 0 xaaptr->SubsequentSolidFillTrap = SavageSubsequentSolidFillTrap; #endif @@ -1174,6 +503,7 @@ SavageInitAccel(ScreenPtr pScreen) | SCANLINE_PAD_DWORD | BIT_ORDER_IN_BYTE_MSBFIRST | LEFT_EDGE_CLIPPING + | ROP_NEEDS_SOURCE ; xaaptr->SetupForImageWrite = SavageSetupForImageWrite; xaaptr->SubsequentImageWriteRect = SavageSubsequentImageWriteRect; @@ -1184,7 +514,7 @@ SavageInitAccel(ScreenPtr pScreen) /* WriteBitmap color expand */ #if 0 - xaaptr->WriteBitmapFlags = NO_PLANEMASK; + xaaptr->WriteBitmapFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE; xaaptr->WriteBitmap = SavageWriteBitmapCPUToScreenColorExpand; #endif @@ -1233,281 +563,6 @@ SavageInitAccel(ScreenPtr pScreen) * enabled the PIXMAP_CACHE flag, then these lines can be omitted. */ -#ifdef XF86DRI - if (psav->directRenderingEnabled) { - SAVAGEDRIServerPrivatePtr pSAVAGEDRIServer = psav->DRIServerInfo; - BoxRec MemBox; - int cpp = pScrn->bitsPerPixel / 8; - /*int widthBytes = pScrn->displayWidth * cpp;*/ - int widthBytes = psav->lDelta; - /*int widthBytes = psav->l3DDelta;*/ - int bufferSize = ((pScrn->virtualY * widthBytes + SAVAGE_BUFFER_ALIGN) - & ~SAVAGE_BUFFER_ALIGN); - int tiledwidthBytes,tiledBufferSize; - - pSAVAGEDRIServer->frontbufferSize = bufferSize; - /*tiledwidthBytes = psav->lDelta;*/ - tiledwidthBytes = psav->l3DDelta; - - if (cpp == 2) { - tiledBufferSize = ((pScrn->virtualX+63)/64)*((pScrn->virtualY+15)/16) - *2048; - } else { - tiledBufferSize = ((pScrn->virtualX+31)/32)*((pScrn->virtualY+15)/16) - *2048; - } - /*set Depth buffer to 32bpp*/ - /*tiledwidthBytes_Z = ((pScrn->virtualX + 31)& ~0x0000001F)*4; - tiledBufferSize_Z = ((pScrn->virtualX+31)/32)*((pScrn->virtualY+15)/16) - *2048;*/ - - pSAVAGEDRIServer->backbufferSize = tiledBufferSize; - /*pSAVAGEDRIServer->depthbufferSize = tiledBufferSize_Z;*/ - pSAVAGEDRIServer->depthbufferSize = tiledBufferSize; - - xf86DrvMsg(pScrn->scrnIndex,X_INFO, - "virtualX:%d,virtualY:%d\n", - pScrn->virtualX,pScrn->virtualY); - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "bpp:%d,tiledwidthBytes:%d,tiledBufferSize:%d \n", - pScrn->bitsPerPixel, - tiledwidthBytes,tiledBufferSize); - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "bpp:%d,widthBytes:%d,BufferSize:%d \n", - pScrn->bitsPerPixel, - widthBytes,bufferSize); - - pSAVAGEDRIServer->frontOffset = 0; /* AGD: should probably be pScrn->fbOffset */ - pSAVAGEDRIServer->frontPitch = widthBytes; - - /* Try for front, back, depth, and two framebuffers worth of - * pixmap cache. Should be enough for a fullscreen background - * image plus some leftovers. - */ - /* pSAVAGEDRIServer->textureSize = psav->videoRambytes - - tiledBufferSize - - tiledBufferSize_Z - - -0x602000;*/ - pSAVAGEDRIServer->textureSize = psav->videoRambytes - - 4096 - /* hw cursor*/ - psav->cobSize - /*COB*/ - bufferSize- - tiledBufferSize - - tiledBufferSize - - 0x200000; - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "videoRambytes:0x%08lx \n", - psav->videoRambytes); - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "textureSize:0x%08lx \n", - pSAVAGEDRIServer->textureSize); - - /* If that gives us less than half the available memory, let's - * be greedy and grab some more. Sorry, I care more about 3D - * performance than playing nicely, and you'll get around a full - * framebuffer's worth of pixmap cache anyway. - */ -#if 0 - if ( pSAVAGEDRIServer->textureSize < (int)psav->FbMapSize / 2 ) { - pSAVAGEDRIServer->textureSize = psav->FbMapSize - 4 * bufferSize; - } -#endif - /* Check to see if there is more room available after the maximum - * scanline for textures. - */ -#if 0 - if ( (int)psav->FbMapSize - maxlines * widthBytes - bufferSize * 2 - > pSAVAGEDRIServer->textureSize ) { - pSAVAGEDRIServer->textureSize = (psav->FbMapSize - - maxlines * widthBytes - - bufferSize * 2); - } -#endif - /* Set a minimum usable local texture heap size. This will fit - * two 256x256x32bpp textures. - */ - if ( pSAVAGEDRIServer->textureSize < 512 * 1024 ) { - pSAVAGEDRIServer->textureOffset = 0; - pSAVAGEDRIServer->textureSize = 0; - } - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "textureSize:0x%08lx \n", - pSAVAGEDRIServer->textureSize); - - /* Reserve space for textures */ - /* if (pSAVAGEDRIServer->textureSize)*/ - pSAVAGEDRIServer->textureOffset = (psav->videoRambytes - - 4096 - /* hw cursor*/ - psav->cobSize - /*COB*/ - pSAVAGEDRIServer->textureSize) & ~SAVAGE_BUFFER_ALIGN; - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "textureOffset:0x%08lx \n", - pSAVAGEDRIServer->textureOffset); - - /* Reserve space for the shared depth buffer */ - /*pSAVAGEDRIServer->depthOffset = (pSAVAGEDRIServer->textureOffset - - tiledBufferSize_Z + SAVAGE_BUFFER_ALIGN) & ~SAVAGE_BUFFER_ALIGN; - */ - pSAVAGEDRIServer->depthOffset = (pSAVAGEDRIServer->textureOffset - - tiledBufferSize) & ~SAVAGE_BUFFER_ALIGN; - /*pSAVAGEDRIServer->depthPitch = tiledwidthBytes_Z;*/ - pSAVAGEDRIServer->depthPitch = tiledwidthBytes; - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "depthOffset:0x%08lx,depthPitch:%d\n", - pSAVAGEDRIServer->depthOffset,pSAVAGEDRIServer->depthPitch); - - /* Reserve space for the shared back buffer */ - pSAVAGEDRIServer->backOffset = (pSAVAGEDRIServer->depthOffset - - tiledBufferSize ) & ~SAVAGE_BUFFER_ALIGN; - - pSAVAGEDRIServer->backPitch = tiledwidthBytes; - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "backOffset:0x%08lx,backPitch:%d\n", - pSAVAGEDRIServer->backOffset,pSAVAGEDRIServer->backPitch); - - /*scanlines = pSAVAGEDRIServer->backOffset / widthBytes - 1;*/ - /*if ( scanlines > maxlines ) scanlines = maxlines;*/ - /* CR47983, XvMC do not work on system with frame buffer less than 32MB. - * VBE reports frame buffer size a little less than 16MB, this makes the condition - * truns out FALSE. - * Now just reduce the level to 14.5MB, things should be OK, while the hwmc frame buffer layout - * caculation need more understanding and should be fixed. - */ - /*if total memory is less than 16M, there is no HWMC support */ - if((psav->videoRambytes < /*16*/(14*1024+512)*1024L) || psav->bDisableXvMC) - { - psav->hwmcOffset = 0; - psav->hwmcSize = 0; - } - else - { - psav->hwmcSize = (10*1024+512)*1024; /* HWMC needs 10MB FB */ - psav->hwmcOffset = (psav->videoRambytes - 0x2000 - psav->hwmcSize) & - ~SAVAGE_BUFFER_ALIGN; - if (psav->hwmcOffset < bufferSize) { - /* If hwmc buffer will lay in on-screen buffer. */ - psav->hwmcSize = 0; - psav->hwmcOffset = 0; - } - } - - /* CR48438: Title: "Lots of garbage appear on the background when - * drag the DVD player XINE window at 1024x768 or higher mode." - * hwmc used xserver's memory, now xserver will get less memory. - * Both 3D and hwmc's memory usage are considered now. - */ -#if 0 - if (pSAVAGEDRIServer->backOffset < psav->hwmcOffset ) - psav->cyMemory = pSAVAGEDRIServer->backOffset / widthBytes - 1; - else - psav->cyMemory = psav->hwmcOffset / widthBytes -1; -#endif - - psav->cyMemory = pSAVAGEDRIServer->backOffset / widthBytes - 1; - if (psav->cyMemory > 0x7FFF) { - psav->cyMemory = 0x7FFF; - } - - MemBox.x1 = 0; - MemBox.y1 = 0; - MemBox.x2 = psav->cxMemory; - MemBox.y2 = psav->cyMemory; - - if (!xf86InitFBManager(pScreen, &MemBox)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Memory manager initialization to (%d,%d) (%d,%d) failed\n", - MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2 ); - return FALSE; - } else { - int tmp,width, height; - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "Memory manager initialized to (%d,%d) (%d,%d)\n", - MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2 ); - /* - * because the alignment requirement,the on-screen need more memory - * than (0,0,virtualX,virtualY), but xf86InitFBManager only subtract - * (pScrn->virtualX * pScrn->virtualY from (0,0,cxMemory,cyMemory),so - * here,we should reserve some memory for on-screen - */ - tmp = ((psav->cxMemory * pScrn->virtualY - pScrn->virtualX * pScrn->virtualY) - + psav->cxMemory -1) / (psav->cxMemory); - if (tmp) - xf86AllocateOffscreenArea(pScreen, psav->cxMemory,tmp, 0, NULL, NULL, NULL); - - if (xf86QueryLargestOffscreenArea(pScreen, &width, - &height, 0, 0, 0 ) ) { - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "Largest offscreen area available: %d x %d\n", - width, height ); - } - } - psav->reserved = 0; - - if(tiledBufferSize > bufferSize) - { - psav->reserved = xf86AllocateOffscreenLinear(pScreen, - (tiledBufferSize - bufferSize),1,0,0,0); - - } - if(psav->reserved) - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "Reserved for tiled front buffer at offset 0x%08lx ,size:0x%08lx\n", - psav->reserved->offset, psav->reserved->size); - - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "Reserved back buffer at offset 0x%x\n", - pSAVAGEDRIServer->backOffset ); - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "Reserved depth buffer at offset 0x%x\n", - pSAVAGEDRIServer->depthOffset ); - xf86DrvMsg( pScrn->scrnIndex, X_INFO, - "Reserved %d kb for textures at offset 0x%x\n", - pSAVAGEDRIServer->textureSize/1024, - pSAVAGEDRIServer->textureOffset ); - } - else -#endif - { - int tmp; - - /* - * why this code? because BoxRec members are short int - * if cyMemory is bigger than 0x7fff,then it will overflow - */ - if (psav->cyMemory > 0x7FFF) { - psav->cyMemory = 0x7FFF; - } - - AvailFBArea.x1 = 0; - AvailFBArea.y1 = 0; - AvailFBArea.x2 = psav->cxMemory; - AvailFBArea.y2 = psav->cyMemory; - xf86InitFBManager(pScreen, &AvailFBArea); - /* - * because the alignment requirement,the on-screen need more memory - * than (0,0,virtualX,virtualY), but xf86InitFBManager only subtract - * (pScrn->virtualX * pScrn->virtualY from (0,0,cxMemory,cyMemory),so - * here,we should reserver some memory for on-screen - */ - tmp = ((psav->cxMemory * pScrn->virtualY - pScrn->virtualX * pScrn->virtualY) - + psav->cxMemory -1) / (psav->cxMemory); - if (tmp) - xf86AllocateOffscreenArea(pScreen, psav->cxMemory,tmp, 0, NULL, NULL, NULL); - - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Using %d lines for offscreen memory.\n", - psav->cyMemory - pScrn->virtualY ); - } - -#if 0 AvailFBArea.x1 = 0; AvailFBArea.y1 = 0; AvailFBArea.x2 = pScrn->displayWidth; @@ -1516,8 +571,6 @@ SavageInitAccel(ScreenPtr pScreen) xf86DrvMsg( pScrn->scrnIndex, X_INFO, "Using %d lines for offscreen memory.\n", psav->ScissB - pScrn->virtualY ); -#endif - return XAAInit(pScreen, xaaptr); } @@ -1551,7 +604,7 @@ SavageHelpPatternROP(ScrnInfoPtr pScrn, int *fg, int *bg, int pm, int *rop) if(pm == infoRec->FullPlanemask) { if(!NO_SRC_ROP(*rop)) ret |= ROP_PAT; - *rop = XAACopyROP[*rop]; + *rop = XAAGetCopyROP(*rop); } else { switch(*rop) { case GXnoop: @@ -1568,7 +621,7 @@ SavageHelpPatternROP(ScrnInfoPtr pScrn, int *fg, int *bg, int pm, int *rop) ret |= ROP_PAT | ROP_SRC; break; } - *rop = XAACopyROP_PM[*rop]; + *rop = XAAGetCopyROP_PM(*rop); } return ret; @@ -1586,7 +639,7 @@ SavageHelpSolidROP(ScrnInfoPtr pScrn, int *fg, int pm, int *rop) if(pm == infoRec->FullPlanemask) { if(!NO_SRC_ROP(*rop)) ret |= ROP_PAT; - *rop = XAACopyROP[*rop]; + *rop = XAAGetCopyROP(*rop); } else { switch(*rop) { case GXnoop: @@ -1601,7 +654,7 @@ SavageHelpSolidROP(ScrnInfoPtr pScrn, int *fg, int pm, int *rop) ret |= ROP_PAT | ROP_SRC; break; } - *rop = XAACopyROP_PM[*rop]; + *rop = XAAGetCopyROP_PM(*rop); } return ret; @@ -1629,7 +682,7 @@ SavageSetupForScreenToScreenCopy( int cmd; cmd = BCI_CMD_RECT | BCI_CMD_DEST_GBD | BCI_CMD_SRC_GBD; - BCI_CMD_SET_ROP( cmd, XAACopyROP[rop] ); + BCI_CMD_SET_ROP( cmd, XAAGetCopyROP(rop) ); if (transparency_color != -1) cmd |= BCI_CMD_SEND_COLOR | BCI_CMD_SRC_TRANSPARENT; @@ -1939,6 +992,7 @@ SavageSubsequentMono8x8PatternFillRect( } +#if 0 static void SavageSetupForColor8x8PatternFill( ScrnInfoPtr pScrn, @@ -1951,7 +1005,6 @@ SavageSetupForColor8x8PatternFill( SavagePtr psav = SAVPTR(pScrn); int cmd; - int mix; unsigned int bd; int pat_offset; @@ -1963,8 +1016,7 @@ SavageSetupForColor8x8PatternFill( cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | BCI_CMD_DEST_GBD | BCI_CMD_PAT_PBD_COLOR_NEW; - /*mix = XAAHelpSolidROP( pScrn, &trans_col, planemask, &rop );*/ - mix = SavageHelpSolidROP( pScrn, &trans_col, planemask, &rop ); + (void) XAAHelpSolidROP( pScrn, &trans_col, planemask, &rop ); BCI_CMD_SET_ROP(cmd, rop); bd = BCI_BD_BW_DISABLE; @@ -1994,14 +1046,14 @@ SavageSubsequentColor8x8PatternFillRect( if( !w || !h ) return; - psav->WaitQueue(psav,6); + psav->WaitQueue(psav,5); BCI_SEND(psav->SavedBciCmd); BCI_SEND(psav->SavedSbdOffset); BCI_SEND(psav->SavedSbd); - BCI_SEND(BCI_X_Y(patternx,patterny)); BCI_SEND(BCI_X_Y(x, y)); BCI_SEND(BCI_W_H(w, h)); } +#endif static void @@ -2040,6 +1092,7 @@ SavageSubsequentSolidBresenhamLine( e2+err)); } + #if 0 static void SavageSubsequentSolidTwoPointLine( @@ -2103,6 +1156,7 @@ SavageSubsequentSolidTwoPointLine( #endif + static void SavageSetClippingRectangle( ScrnInfoPtr pScrn, diff --git a/src/savage_dri.c b/src/savage_dri.c index de3b073..08fa24d 100644 --- a/src/savage_dri.c +++ b/src/savage_dri.c @@ -1920,7 +1920,7 @@ SAVAGEDRISetupForScreenToScreenCopy( int cmd =0; cmd = BCI_CMD_RECT | BCI_CMD_DEST_PBD | BCI_CMD_SRC_PBD_COLOR; - BCI_CMD_SET_ROP( cmd, XAACopyROP[rop] ); + BCI_CMD_SET_ROP( cmd, XAAGetCopyROP(rop) ); if (transparency_color != -1) cmd |= BCI_CMD_SEND_COLOR | BCI_CMD_SRC_TRANSPARENT; diff --git a/src/savage_driver.c b/src/savage_driver.c index 6dd59fa..4a6cc2c 100644 --- a/src/savage_driver.c +++ b/src/savage_driver.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c,v 1.24 2001/11/02 16:24:51 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c,v 1.48tsi Exp $ */ /* * vim: sw=4 ts=8 ai ic: * @@ -18,21 +18,12 @@ #include "globals.h" #define DPMS_SERVER #include "extensions/dpms.h" -/* -#ifdef XvExtension + #include "xf86xv.h" -#endif -*/ #include "savage_driver.h" -#include "savage_regs.h" #include "savage_bci.h" -#ifdef XF86DRI -#define _XF86DRI_SERVER_ -#include "savage_dri.h" -#endif - /* * prototypes @@ -81,15 +72,13 @@ static unsigned int SavageDDC1Read(ScrnInfoPtr pScrn); static void SavageProbeDDC(ScrnInfoPtr pScrn, int index); static void SavageGetTvMaxSize(SavagePtr psav); static Bool SavagePanningCheck(ScrnInfoPtr pScrn); -static Bool SavageCheckAvailableRamFor3D(ScrnInfoPtr pScrn); -static void SavageResetStreams(ScrnInfoPtr pScrn); extern ScrnInfoPtr gpScrn; #define iabs(a) ((int)(a)>0?(a):(-(a))) #define DRIVER_NAME "savage" -#define DRIVER_VERSION "1.1.27a" +#define DRIVER_VERSION "1.1.27" #define VERSION_MAJOR 1 #define VERSION_MINOR 1 #define PATCHLEVEL 27 @@ -152,8 +141,6 @@ static SymTabRec SavageChipsets[] = { { S3_SAVAGE2000, "Savage2000" }, { S3_SAVAGE_MX, "MobileSavage" }, { S3_PROSAVAGE, "ProSavage" }, - { S3_TWISTER, "Twister"}, - { S3_PROSAVAGEDDR, "ProSavageDDR"}, { S3_SUPERSAVAGE, "SuperSavage" }, { -1, NULL } }; @@ -171,10 +158,10 @@ static PciChipsets SavagePciChipsets[] = { { S3_SAVAGE_MX, PCI_CHIP_SAVAGE_IX, RES_SHARED_VGA }, { S3_PROSAVAGE, PCI_CHIP_PROSAVAGE_PM, RES_SHARED_VGA }, { S3_PROSAVAGE, PCI_CHIP_PROSAVAGE_KM, RES_SHARED_VGA }, - { S3_TWISTER, PCI_CHIP_S3TWISTER_P, RES_SHARED_VGA }, - { S3_TWISTER, PCI_CHIP_S3TWISTER_K, RES_SHARED_VGA }, - { S3_PROSAVAGEDDR, PCI_CHIP_PROSAVAGE_DDR, RES_SHARED_VGA }, - { S3_PROSAVAGEDDR, PCI_CHIP_PROSAVAGE_DDRK, RES_SHARED_VGA }, + { S3_PROSAVAGE, PCI_CHIP_S3TWISTER_P, RES_SHARED_VGA }, + { S3_PROSAVAGE, PCI_CHIP_S3TWISTER_K, RES_SHARED_VGA }, + { S3_PROSAVAGE, PCI_CHIP_PROSAVAGE_DDR, RES_SHARED_VGA }, + { S3_PROSAVAGE, PCI_CHIP_PROSAVAGE_DDRK, RES_SHARED_VGA }, { S3_SUPERSAVAGE, PCI_CHIP_SUPSAV_MX128, RES_SHARED_VGA }, { S3_SUPERSAVAGE, PCI_CHIP_SUPSAV_MX64, RES_SHARED_VGA }, { S3_SUPERSAVAGE, PCI_CHIP_SUPSAV_MX64C, RES_SHARED_VGA }, @@ -202,23 +189,16 @@ typedef enum { ,OPTION_ROTATE ,OPTION_USEBIOS ,OPTION_SHADOW_STATUS - ,OPTION_VIDEORAM ,OPTION_CRT_ONLY ,OPTION_TV_ON ,OPTION_TV_PAL ,OPTION_FORCE_INIT - ,OPTION_DISABLE_XVMC - ,OPTION_DISABLE_TILE - ,OPTION_DISABLE_COB - ,OPTION_BCI_FOR_XV - ,OPTION_AGP_MODE - ,OPTION_AGP_SIZE } SavageOpts; static const OptionInfoRec SavageOptions[] = { - { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_HWCURSOR, "HWCursor", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_SWCURSOR, "SWCursor", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE }, @@ -226,17 +206,10 @@ static const OptionInfoRec SavageOptions[] = { OPTION_USEBIOS, "UseBIOS", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_LCDCLOCK, "LCDClock", OPTV_FREQ, {0}, FALSE }, { OPTION_SHADOW_STATUS, "ShadowStatus", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_VIDEORAM, "VideoRAM", OPTV_INTEGER, {0}, FALSE }, { OPTION_CRT_ONLY, "CrtOnly", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_TV_ON, "TvOn", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_TV_PAL, "PAL", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_FORCE_INIT, "ForceInit", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_DISABLE_XVMC, "DisableXVMC", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_DISABLE_TILE, "DisableTile", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_DISABLE_COB, "DisableCOB", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_BCI_FOR_XV, "BCIforXv", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE }, - { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_FORCE_INIT,"ForceInit", OPTV_BOOLEAN, {0}, FALSE }, { -1, NULL, OPTV_NONE, {0}, FALSE } }; @@ -265,61 +238,6 @@ static const char *vgaHWSymbols[] = { NULL }; -#ifdef XF86DRI -static const char *drmSymbols[] = { - "drmAvailable", - "drmAddBufs", - "drmAddMap", - "drmCtlInstHandler", - "drmGetInterruptFromBusID", - "drmFreeVersion", - "drmGetVersion", - "drmMap", - "drmUnmap", - "drmMapBufs", - "drmUnmapBufs", - "drmAgpAcquire", - "drmAgpRelease", - "drmAgpEnable", - "drmAgpAlloc", - "drmAgpFree", - "drmAgpBind", - "drmAgpUnbind", - "drmAgpGetMode", - "drmAgpBase", - "drmAgpSize", - "drmAgpVendorId", - "drmAgpDeviceId", - "drmMGAInitDMA", - "drmMGACleanupDMA", - "drmMGAFlushDMA", - "drmMGAEngineReset", - NULL -}; - -static const char *driSymbols[] = { - "DRIGetDrawableIndex", - "DRIFinishScreenInit", - "DRIDestroyInfoRec", - "DRICloseScreen", - "DRIDestroyInfoRec", - "DRIScreenInit", - "DRIDestroyInfoRec", - "DRICreateInfoRec", - "DRILock", - "DRIUnlock", - "DRIGetSAREAPrivate", - "DRIGetContext", - "DRIQueryVersion", - "DRIAdjustFrame", - "DRIOpenFullScreen", - "DRICloseFullScreen", - "GlxSetVisualConfigs", - NULL -}; -#endif - - static const char *ramdacSymbols[] = { "xf86CreateCursorInfoRec", #if 0 @@ -338,6 +256,7 @@ static const char *vbeSymbols[] = { NULL }; +#ifdef XFree86LOADER static const char *vbeOptSymbols[] = { "vbeModeInit", "VBESetVBEMode", @@ -345,6 +264,7 @@ static const char *vbeOptSymbols[] = { "VBEFreeVBEInfo", NULL }; +#endif static const char *ddcSymbols[] = { "xf86DoEDID_DDC1", @@ -357,29 +277,17 @@ static const char *ddcSymbols[] = { static const char *i2cSymbols[] = { "xf86CreateI2CBusRec", "xf86I2CBusInit", - "xf86CreateI2CDevRec", - "xf86I2CDevInit", - "xf86I2CWriteByte", - "xf86I2CWriteBytes", - "xf86I2CReadByte", - "xf86I2CReadBytes", - "xf86I2CWriteRead", - "xf86DestroyI2CDevRec", NULL }; static const char *xaaSymbols[] = { - "XAACopyROP", - "XAACopyROP_PM", + "XAAGetCopyROP", + "XAAGetCopyROP_PM", "XAACreateInfoRec", "XAADestroyInfoRec", - "XAAFillSolidRects", "XAAHelpPatternROP", -#if 0 /* AGD: this is unresolved... */ "XAAHelpSolidROP", -#endif "XAAInit", - "XAAScreenIndex", NULL }; @@ -415,7 +323,7 @@ static XF86ModuleVersionInfo SavageVersRec = { MODULEVENDORSTRING, MODINFOSTRING1, MODINFOSTRING2, - XF86_VERSION_CURRENT, + XORG_VERSION_CURRENT, VERSION_MAJOR, VERSION_MINOR, PATCHLEVEL, ABI_CLASS_VIDEODRV, ABI_VIDEODRV_VERSION, @@ -435,9 +343,6 @@ static pointer SavageSetup(pointer module, pointer opts, int *errmaj, xf86AddDriver(&SAVAGE, module, 0); LoaderRefSymLists(vgaHWSymbols, fbSymbols, ramdacSymbols, xaaSymbols, shadowSymbols, vbeSymbols, vbeOptSymbols, -#ifdef XF86DRI - drmSymbols, driSymbols, -#endif int10Symbols, i2cSymbols, ddcSymbols, NULL); return (pointer) 1; } else { @@ -468,7 +373,8 @@ ResetBCI2K( SavagePtr psav ) ! (ALT_STATUS_WORD0 & 0x00200000) ) { - ErrorF( "Resetting BCI, stat = %08x...\n", ALT_STATUS_WORD0); + ErrorF( "Resetting BCI, stat = %08lx...\n", + (unsigned long) ALT_STATUS_WORD0); /* Turn off BCI */ OUTREG( 0x48c18, cob & ~8 ); usleep(10000); @@ -545,7 +451,8 @@ WaitQueue4( SavagePtr psav, int v ) return ShadowWait(psav); } else - while( ((ALT_STATUS_WORD0 & 0x001fffff) > slots) && (loop++ < MAXLOOP)); + while( ((ALT_STATUS_WORD0 & 0x001fffff) > slots) && (loop++ < MAXLOOP)) + ; return loop >= MAXLOOP; } @@ -584,7 +491,8 @@ WaitIdleEmpty3D(SavagePtr psav) return ShadowWait(psav); } loop &= STATUS_WORD0; - while( ((STATUS_WORD0 & 0x0008ffff) != 0x80000) && (loop++ < MAXLOOP) ); + while( ((STATUS_WORD0 & 0x0008ffff) != 0x80000) && (loop++ < MAXLOOP) ) + ; return loop >= MAXLOOP; } @@ -598,9 +506,8 @@ WaitIdleEmpty4(SavagePtr psav) psav->WaitIdleEmpty = ShadowWait; return ShadowWait(psav); } - /* which is right?*/ - /*while( ((ALT_STATUS_WORD0 & 0x00a1ffff) != 0x00a00000) && (loop++ < MAXLOOP) );*/ /* tim */ - while (((ALT_STATUS_WORD0 & 0x00e1ffff) != 0x00e00000) && (loop++ < MAXLOOP)); /* S3 */ + while( ((ALT_STATUS_WORD0 & 0x00a1ffff) != 0x00a00000) && (loop++ < MAXLOOP) ) + ; return loop >= MAXLOOP; } @@ -615,7 +522,8 @@ WaitIdleEmpty2K(SavagePtr psav) return ShadowWait(psav); } loop &= ALT_STATUS_WORD0; - while( ((ALT_STATUS_WORD0 & 0x009fffff) != 0) && (loop++ < MAXLOOP) ); + while( ((ALT_STATUS_WORD0 & 0x009fffff) != 0) && (loop++ < MAXLOOP) ) + ; if( loop >= MAXLOOP ) ResetBCI2K(psav); return loop >= MAXLOOP; @@ -633,7 +541,8 @@ WaitIdle3D(SavagePtr psav) psav->WaitIdle = ShadowWait; return ShadowWait(psav); } - while( (!(STATUS_WORD0 & 0x00080000)) && (loop++ < MAXLOOP) ); + while( (!(STATUS_WORD0 & 0x00080000)) && (loop++ < MAXLOOP) ) + ; return loop >= MAXLOOP; } @@ -647,9 +556,8 @@ WaitIdle4(SavagePtr psav) psav->WaitIdle = ShadowWait; return ShadowWait(psav); } - /* which is right?*/ - /*while( (!(ALT_STATUS_WORD0 & 0x00800000)) && (loop++ < MAXLOOP) );*/ /* tim */ - while (((ALT_STATUS_WORD0 & 0x00E00000)!=0x00E00000) && (loop++ < MAXLOOP)); /* S3 */ + while( (!(ALT_STATUS_WORD0 & 0x00800000)) && (loop++ < MAXLOOP) ) + ; return loop >= MAXLOOP; } @@ -664,7 +572,8 @@ WaitIdle2K(SavagePtr psav) return ShadowWait(psav); } loop &= ALT_STATUS_WORD0; - while( (ALT_STATUS_WORD0 & 0x00900000) && (loop++ < MAXLOOP) ); + while( (ALT_STATUS_WORD0 & 0x00900000) && (loop++ < MAXLOOP) ) + ; return loop >= MAXLOOP; } @@ -715,9 +624,12 @@ static Bool SavageProbe(DriverPtr drv, int flags) /* sanity checks */ if ((numDevSections = xf86MatchDevice("savage", &devSections)) <= 0) - return FALSE; - if (xf86GetPciVideoInfo() == NULL) - return FALSE; + return FALSE; + if (xf86GetPciVideoInfo() == NULL) { + if (devSections) + xfree(devSections); + return FALSE; + } numUsed = xf86MatchPciInstances("SAVAGE", PCI_VENDOR_S3, SavageChipsets, SavagePciChipsets, @@ -735,7 +647,7 @@ static Bool SavageProbe(DriverPtr drv, int flags) for (i=0; i<numUsed; i++) { ScrnInfoPtr pScrn = xf86AllocateScreen(drv, 0); - pScrn->driverVersion = (int)DRIVER_VERSION; + pScrn->driverVersion = SAVAGE_VERSION; pScrn->driverName = DRIVER_NAME; pScrn->name = "SAVAGE"; pScrn->Probe = SavageProbe; @@ -813,7 +725,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) * We support bpp of 8, 16, and 32. */ - if (!xf86SetDepthBpp(pScrn, 8, 8, 8, Support32bppFb)) + if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) return FALSE; else { int requiredBpp; @@ -952,55 +864,6 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) psav->NoAccel = TRUE; } - /* Set AGP Mode from config */ - /* We support 1X 2X and 4X */ -#ifdef XF86DRI - from = X_DEFAULT; - psav->agpMode = SAVAGE_DEFAULT_AGP_MODE; - /*psav->agpMode = SAVAGE_MAX_AGP_MODE;*/ - psav->agpSize = 16; - - /* temporatly remove by Jiayo */ - if (xf86GetOptValInteger(psav->Options, - OPTION_AGP_MODE, &(psav->agpMode))) { - if (psav->agpMode < 1) { - psav->agpMode = 1; - } - if (psav->agpMode > SAVAGE_MAX_AGP_MODE) { - psav->agpMode = SAVAGE_MAX_AGP_MODE; - } - if ((psav->agpMode > 2) && - (psav->Chipset == S3_SAVAGE3D || - psav->Chipset == S3_SAVAGE_MX)) - psav->agpMode = 2; /* old savages only support 2x */ - from = X_CONFIG; - } - - xf86DrvMsg(pScrn->scrnIndex, from, "Using AGP %dx mode\n", - psav->agpMode); - - if (xf86GetOptValInteger(psav->Options, - OPTION_AGP_SIZE, (int *)&(psav->agpSize))) { - switch (psav->agpSize) { - case 4: - case 8: - case 16: - case 32: - case 64: - case 128: - case 256: - break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Illegal AGP size: %d MB, defaulting to 16 MB\n", psav->agpSize); - psav->agpSize = 16; - } - } - - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Using %d MB AGP aperture\n", psav->agpSize); - -#endif /* * The SWCursor setting takes priority over HWCursor. The default @@ -1026,13 +889,6 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, from, "%ssing video BIOS to set modes\n", psav->UseBIOS ? "U" : "Not u" ); - pScrn->videoRam = 0; - if( xf86GetOptValInteger(psav->Options, OPTION_VIDEORAM, &pScrn->videoRam ) ) - { - xf86DrvMsg( pScrn->scrnIndex, X_CONFIG, - "Option: VideoRAM %dkB\n", pScrn->videoRam ); - } - psav->LCDClock = 0.0; if( xf86GetOptValFreq( psav->Options, OPTION_LCDCLOCK, OPTUNITS_MHZ, &psav->LCDClock ) ) xf86DrvMsg( pScrn->scrnIndex, X_CONFIG, @@ -1067,37 +923,6 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) xf86DrvMsg( pScrn->scrnIndex, X_CONFIG, "Option: ForceInit enabled\n" ); - /* we can use Option "DisableTile TRUE" to disable tile mode */ - psav->bDisableTile = FALSE; - if (xf86GetOptValBool(psav->Options, OPTION_DISABLE_TILE,&psav->bDisableTile)) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Option: %s Tile Mode and Program it \n",(psav->bDisableTile?"Disable":"Enable")); - } - psav->bDisableXvMC = FALSE; /* if you want to free up more mem for DRI,etc. */ - if (xf86GetOptValBool(psav->Options, OPTION_DISABLE_XVMC, &psav->bDisableXvMC)) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Option: %s Hardware XvMC support\n",(psav->bDisableXvMC?"Disable":"Enable")); - } - if (S3_SAVAGE3D_SERIES(psav->Chipset)) { - psav->bDisableXvMC = TRUE; /* no xvmc on old savages */ - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "No Hardware XvMC support on Savage3D based chips.\n"); - } - psav->disableCOB = FALSE; /* if you are having problems on savage4+ */ - if (xf86GetOptValBool(psav->Options, OPTION_DISABLE_COB, &psav->disableCOB)) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Option: %s the COB\n",(psav->disableCOB?"Disable":"Enable")); - } - if (psav->Chipset == S3_PROSAVAGE || - psav->Chipset == S3_TWISTER || - psav->Chipset == S3_PROSAVAGEDDR) - psav->BCIforXv = TRUE; - else - psav->BCIforXv = FALSE; /* use the BCI for Xv */ - if (xf86GetOptValBool(psav->Options, OPTION_BCI_FOR_XV, &psav->BCIforXv)) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Option: %s use of the BCI for Xv\n",(psav->BCIforXv?"Enable":"Disable")); - } - /* Add more options here. */ if (pScrn->numEntities > 1) { @@ -1161,6 +986,9 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) } else psav->ChipRev = psav->PciInfo->chipRev; + if (pEnt->device->videoRam != 0) + pScrn->videoRam = pEnt->device->videoRam; + xfree(pEnt); /* maybe throw in some more sanity checks here */ @@ -1172,6 +1000,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) if (!SavageMapMMIO(pScrn)) { + SavageFreeRec(pScrn); vbeFree(psav->pVbe); return FALSE; } @@ -1203,6 +1032,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) if (!xf86SetGamma(pScrn, zeros)) { vbeFree(psav->pVbe); + SavageFreeRec(pScrn); return FALSE; } } @@ -1251,8 +1081,6 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) break; case S3_PROSAVAGE: - case S3_PROSAVAGEDDR: - case S3_TWISTER: pScrn->videoRam = RamSavageNB[ (config1 & 0xE0) >> 5 ] * 1024; break; @@ -1293,45 +1121,51 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) psav->videoRambytes = pScrn->videoRam * 1024; } - /* - * If we're running with acceleration, compute the command overflow + * If we're running with acceleration, compute the command overflow * buffer location. The command overflow buffer must END at a * 4MB boundary; for all practical purposes, that means the very * end of the frame buffer. */ - if (psav->NoAccel) { - psav->cobIndex = 0; - psav->cobSize = 0; - } - else if( ((S3_SAVAGE4_SERIES(psav->Chipset)) || - (S3_SUPERSAVAGE == psav->Chipset)) && psav->disableCOB ) { - /* - * The Savage4 and ProSavage have COB coherency bugs which render - * the buffer useless. - */ + + if( psav->NoAccel ) { + psav->CursorKByte = pScrn->videoRam - 4; + psav->cobIndex = 0; + psav->cobSize = 0; + psav->cobOffset = psav->videoRambytes; + } + else if( (S3_SAVAGE4_SERIES(psav->Chipset)) || + (S3_SUPERSAVAGE == psav->Chipset) ) { /* - psav->cobIndex = 2; - psav->cobSize = 0x8000 << psav->cobIndex; - */ - psav->cobIndex = 0; - psav->cobSize = 0; - } else { - /* We use 128kB for the COB on all other chips. */ - psav->cobSize = 0x20000; - if (S3_SAVAGE3D_SERIES(psav->Chipset)) { - psav->cobIndex = 7; /* rev.A savage4 also uses 7 */ - } else { + * The Savage4 and ProSavage have COB coherency bugs which render + * the buffer useless. COB seems to make the SuperSavage slower. + * We disable it. + */ + psav->CursorKByte = pScrn->videoRam - 4; + psav->cobIndex = 2; + psav->cobSize = 0x8000 << psav->cobIndex; + psav->cobOffset = psav->videoRambytes; + } + else + { + /* We use 128kB for the COB on all other chips. */ + + psav->cobSize = 1 << 17; + if (psav->Chipset == S3_SUPERSAVAGE) { psav->cobIndex = 2; } + else { + psav->cobIndex = 7; + } + psav->cobOffset = psav->videoRambytes - psav->cobSize; } - - /* align cob to 128k */ - psav->cobOffset = (psav->videoRambytes - psav->cobSize) & ~0x1ffff; - - /* The cursor must be aligned on a 4k boundary. */ - psav->CursorKByte = (psav->cobOffset >> 10) - 4; - psav->endfb = (psav->CursorKByte << 10) - 1; + + /* + * We place the cursor in high memory, just before the command overflow + * buffer. The cursor must be aligned on a 4k boundary. + */ + + psav->CursorKByte = (psav->cobOffset >> 10) - 4; /* reset graphics engine to avoid memory corruption */ VGAOUT8(vgaCRIndex, 0x66); @@ -1356,8 +1190,6 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) case S3_SAVAGE4: case S3_PROSAVAGE: case S3_SUPERSAVAGE: - case S3_PROSAVAGEDDR: - case S3_TWISTER: psav->WaitQueue = WaitQueue4; psav->WaitIdle = WaitIdle4; psav->WaitIdleEmpty = WaitIdleEmpty4; @@ -1370,47 +1202,42 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) break; } - /* Do the DDC dance. */ /* S3/VIA's DDC code */ - ddc = xf86LoadSubModule(pScrn, "ddc"); - if (ddc) { - xf86LoaderReqSymLists(ddcSymbols, NULL); - switch( psav->Chipset ) { - case S3_SAVAGE3D: - case S3_SAVAGE_MX: - case S3_SUPERSAVAGE: - psav->DDCPort = 0xAA; - psav->I2CPort = 0xA0; - break; - - case S3_SAVAGE4: - case S3_PROSAVAGE: - case S3_TWISTER: - case S3_PROSAVAGEDDR: - psav->DDCPort = 0xB1; - psav->I2CPort = 0xA0; - break; - - case S3_SAVAGE2000: - psav->DDCPort = 0xAA; - psav->I2CPort = 0xA0; - break; - } - - if (!SavageDDC1(pScrn->scrnIndex)) { - /* DDC1 failed,switch to DDC2 */ - if (xf86LoadSubModule(pScrn, "i2c")) { - xf86LoaderReqSymLists(i2cSymbols,NULL); - if (SavageI2CInit(pScrn)) { - unsigned char tmp; - - InI2CREG(tmp,psav->DDCPort); - OutI2CREG(tmp | 0x13,psav->DDCPort); - xf86SetDDCproperties(pScrn,xf86PrintEDID( - xf86DoEDID_DDC2(pScrn->scrnIndex,psav->I2C))); - OutI2CREG(tmp,psav->DDCPort); - } - } - } + /* Do the DDC dance. */ + + if( psav->Chipset != S3_PROSAVAGE ) { + ddc = xf86LoadSubModule(pScrn, "ddc"); + if (ddc) { +#if 0 + xf86MonPtr pMon = NULL; +#endif + + xf86LoaderReqSymLists(ddcSymbols, NULL); +#if 0 +/* + * On many machines, the attempt to read DDC information via VBE puts the + * BIOS access into a state which prevents me from reading mode information. + * This is a complete mystery to me. + */ + if ((psav->pVbe) + && ((pMon = xf86PrintEDID(vbeDoEDID(psav->pVbe, ddc))) != NULL)) + xf86SetDDCproperties(pScrn,pMon); + else +#endif + if (!SavageDDC1(pScrn->scrnIndex)) { + if ( xf86LoadSubModule(pScrn, "i2c") ) { + xf86LoaderReqSymLists(i2cSymbols,NULL); + if (SavageI2CInit(pScrn)) { + unsigned char tmp; + + InI2CREG(psav,tmp); + OutI2CREG(psav,tmp | 0x13); + xf86SetDDCproperties(pScrn,xf86PrintEDID( + xf86DoEDID_DDC2(pScrn->scrnIndex,psav->I2C))); + OutI2CREG(psav,tmp); + } + } + } + } } /* Savage ramdac speeds */ @@ -1425,10 +1252,9 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) psav->dacSpeedBpp = pScrn->clock[3]; else if (pScrn->bitsPerPixel >= 24) psav->dacSpeedBpp = pScrn->clock[2]; - else if ((pScrn->bitsPerPixel > 8) && (pScrn->bitsPerPixel < 24)) + else if (pScrn->bitsPerPixel > 8) psav->dacSpeedBpp = pScrn->clock[1]; - else if (pScrn->bitsPerPixel <= 8) - psav->dacSpeedBpp = pScrn->clock[0]; + else psav->dacSpeedBpp = pScrn->clock[0]; } /* Set ramdac limits */ @@ -1460,8 +1286,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) /* Check LCD panel information */ - if( (S3_SAVAGE_MOBILE_SERIES(psav->Chipset) || - S3_MOBILE_TWISTER_SERIES(psav->Chipset)) && !psav->CrtOnly ) + if( S3_SAVAGE_MOBILE_SERIES(psav->Chipset) && !psav->CrtOnly ) { unsigned char cr6b = hwp->readCrtc( hwp, 0x6b ); @@ -1528,19 +1353,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) } } -#if 0 - if (psav->CrtOnly && !psav->UseBIOS) { - VGAOUT8(0x3c4, 0x31); /* SR31 bit 4 - FP enable */ - VGAOUT8(0x3c5, VGAIN8(0x3c5) & ~0x10); /* disable FP */ - if (S3_SAVAGE_MOBILE_SERIES(psav->Chipset) /*|| - S3_MOBILE_TWISTER_SERIES(psav->Chipset)*/) { /* not sure this works on mobile prosavage */ - VGAOUT8(0x3c4, 0x31); - VGAOUT8(0x3c5, VGAIN8(0x3c5) & ~0x04); /* make sure crtc1 is crt source */ - } - } -#endif - - clockRanges = xnfalloc(sizeof(ClockRange)); + clockRanges = xnfcalloc(sizeof(ClockRange),1); clockRanges->next = NULL; clockRanges->minClock = psav->minClock; clockRanges->maxClock = psav->maxClock; @@ -1663,26 +1476,18 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags) static Bool SavageEnterVT(int scrnIndex, int flags) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; -#ifdef XF86DRI - SavagePtr psav= SAVPTR(pScrn); - ScreenPtr pScreen; -#endif - TRACE(("SavageEnterVT(%d)\n", flags)); gpScrn = pScrn; SavageEnableMMIO(pScrn); - -#ifdef XF86DRI - if (psav->directRenderingEnabled) { - pScreen = screenInfo.screens[scrnIndex]; - DRIUnlock(pScreen); - psav->LockHeld = 0; - } -#endif - SavageSave(pScrn); - return SavageModeInit(pScrn, pScrn->currentMode); + if(SavageModeInit(pScrn, pScrn->currentMode)) { + /* some BIOSes seem to enable HW cursor on PM resume */ + if (!SAVPTR(pScrn)->hwc_on) + SavageHideCursor( pScrn ); + return TRUE; + } + return FALSE; } @@ -1693,25 +1498,11 @@ static void SavageLeaveVT(int scrnIndex, int flags) SavagePtr psav = SAVPTR(pScrn); vgaRegPtr vgaSavePtr = &hwp->SavedReg; SavageRegPtr SavageSavePtr = &psav->SavedReg; -#ifdef XF86DRI - ScreenPtr pScreen; -#endif TRACE(("SavageLeaveVT(%d)\n", flags)); gpScrn = pScrn; - -#ifdef XF86DRI - if (psav->directRenderingEnabled) { - pScreen = screenInfo.screens[scrnIndex]; - DRILock(pScreen, 0); - psav->LockHeld = 1; - } -#endif - SavageWriteMode(pScrn, vgaSavePtr, SavageSavePtr, FALSE); - SavageResetStreams(pScrn); SavageDisableMMIO(pScrn); - } @@ -1853,8 +1644,7 @@ static void SavageSave(ScrnInfoPtr pScrn) /* Save flat panel expansion regsters. */ - if( S3_SAVAGE_MOBILE_SERIES(psav->Chipset) || - S3_MOBILE_TWISTER_SERIES(psav->Chipset)) { + if( S3_SAVAGE_MOBILE_SERIES(psav->Chipset) ) { int i; for( i = 0; i < 8; i++ ) { VGAOUT8(0x3c4, 0x54+i); @@ -1900,7 +1690,7 @@ static void SavageSave(ScrnInfoPtr pScrn) static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, SavageRegPtr restore, Bool Entering) { - unsigned char tmp, cr3a, cr66, cr67; + unsigned char tmp, cr3a, cr66; vgaHWPtr hwp = VGAHWPTR(pScrn); SavagePtr psav = SAVPTR(pScrn); int vgaCRIndex, vgaCRReg, vgaIOBase; @@ -1912,13 +1702,6 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, TRACE(("SavageWriteMode(%x)\n", restore->mode)); -#ifdef XF86DRI - if (psav->directRenderingEnabled) { - DRILock(screenInfo.screens[pScrn->scrnIndex], 0); - psav->LockHeld = 1; - } -#endif - if( Entering && (!S3_SAVAGE_MOBILE_SERIES(psav->Chipset) || (psav->ForceInit)) ) @@ -2087,18 +1870,12 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, } SavageInitialize2DEngine(pScrn); + SavageSetGBD(pScrn); VGAOUT16(vgaCRIndex, 0x0140); SavageSetGBD(pScrn); - -#ifdef XF86DRI - if (psav->directRenderingEnabled) - DRIUnlock(screenInfo.screens[pScrn->scrnIndex]); - psav->LockHeld = 0; -#endif - return; } @@ -2129,9 +1906,8 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, } VGAOUT8(vgaCRIndex, 0x67); - cr67 = VGAIN8(vgaCRReg); - /*VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c);*/ /* no STREAMS yet */ - VGAOUT8(vgaCRReg, restore->CR67 & ~0xf1); /* no streams for new and old streams engines */ + (void) VGAIN8(vgaCRReg); + VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c); /* no STREAMS yet */ /* restore extended regs */ VGAOUT8(vgaCRIndex, 0x66); @@ -2161,8 +1937,7 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, VGAOUT8(0x3c5, restore->SR15); /* Restore flat panel expansion regsters. */ - if( S3_SAVAGE_MOBILE_SERIES(psav->Chipset) || - S3_MOBILE_TWISTER_SERIES(psav->Chipset)) { + if( S3_SAVAGE_MOBILE_SERIES(psav->Chipset) ) { int i; for( i = 0; i < 8; i++ ) { VGAOUT8(0x3c4, 0x54+i); @@ -2194,8 +1969,7 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, /* restore the desired video mode with cr67 */ VGAOUT8(vgaCRIndex, 0x67); - /*VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c);*/ /* no STREAMS yet */ - VGAOUT8(vgaCRReg, restore->CR67 & ~0xf1); /* no streams for new and old streams engines */ + VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c); /* no STREAMS yet */ /* other mode timing and extended regs */ VGAOUT8(vgaCRIndex, 0x34); @@ -2218,7 +1992,6 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, VGAOUT8(vgaCRReg, restore->CR60); VGAOUT8(vgaCRIndex, 0x68); VGAOUT8(vgaCRReg, restore->CR68); - VerticalRetraceWait(); VGAOUT8(vgaCRIndex, 0x69); VGAOUT8(vgaCRReg, restore->CR69); VGAOUT8(vgaCRIndex, 0x6f); @@ -2293,7 +2066,7 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, VGAOUT8(0x3c5, restore->SR08); /* now write out cr67 in full, possibly starting STREAMS */ - VerticalRetraceWait(); + VerticalRetraceWait(psav); VGAOUT8(vgaCRIndex, 0x67); #if 0 VGAOUT8(vgaCRReg, 0x50); @@ -2314,7 +2087,7 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, if( !S3_SAVAGE_MOBILE_SERIES(psav->Chipset) ) { - VerticalRetraceWait(); + VerticalRetraceWait(psav); OUTREG(FIFO_CONTROL_REG, restore->MMPR0); OUTREG(MIU_CONTROL_REG, restore->MMPR1); OUTREG(STREAMS_TIMEOUT_REG, restore->MMPR2); @@ -2339,7 +2112,12 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, VGAOUT8(vgaCRReg, cr3a); if( Entering ) { + /* We reinit the engine here just as in the UseBIOS case + * as otherwise we lose performance because the engine + * isn't setup properly (Alan Hourihane - alanh@fairlite.demon.co.uk). + */ SavageInitialize2DEngine(pScrn); + SavageSetGBD(pScrn); VGAOUT16(vgaCRIndex, 0x0140); @@ -2348,13 +2126,6 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, vgaHWProtect(pScrn, FALSE); - -#ifdef XF86DRI - if (psav->directRenderingEnabled) - DRIUnlock(screenInfo.screens[pScrn->scrnIndex]); - psav->LockHeld = 0; -#endif - return; } @@ -2377,7 +2148,7 @@ static Bool SavageMapMMIO(ScrnInfoPtr pScrn) } xf86DrvMsg( pScrn->scrnIndex, X_PROBED, - "mapping MMIO @ 0x%x with size 0x%x\n", + "mapping MMIO @ 0x%lx with size 0x%x\n", psav->MmioBase, SAVAGE_NEWMMIO_REGSIZE); psav->MapBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, psav->PciTag, @@ -2403,6 +2174,7 @@ static Bool SavageMapMMIO(ScrnInfoPtr pScrn) } + static Bool SavageMapFB(ScrnInfoPtr pScrn) { SavagePtr psav = SAVPTR(pScrn); @@ -2410,7 +2182,7 @@ static Bool SavageMapFB(ScrnInfoPtr pScrn) TRACE(("SavageMapFB()\n")); xf86DrvMsg( pScrn->scrnIndex, X_PROBED, - "mapping framebuffer @ 0x%x with size 0x%x\n", + "mapping framebuffer @ 0x%lx with size 0x%x\n", psav->FrameBufferBase, psav->videoRambytes); if (psav->videoRambytes) { @@ -2424,28 +2196,6 @@ static Bool SavageMapFB(ScrnInfoPtr pScrn) } psav->FBStart = psav->FBBase; } - - if (psav->Chipset == S3_SUPERSAVAGE) - /* paramount aperture 0 is pci base 2 */ - psav->ApertureBase = psav->PciInfo->memBase[2]; - else - psav->ApertureBase = psav->FrameBufferBase + 0x02000000; - - psav->ApertureMap = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, - psav->PciTag, psav->ApertureBase, - 0x01000000 * 5); - if (!psav->ApertureMap) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Internal error: could not map aperture\n"); - return FALSE; - } - else - { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "map aperture:%p\n",psav->ApertureMap); - - } - pScrn->memPhysBase = psav->PciInfo->memBase[0]; pScrn->fbOffset = 0; @@ -2488,46 +2238,6 @@ static void SavageUnmapMem(ScrnInfoPtr pScrn, int All) return; } -static Bool SavageCheckAvailableRamFor3D(ScrnInfoPtr pScrn) -{ - SavagePtr psav = SAVPTR(pScrn); - int cpp = pScrn->bitsPerPixel / 8; - /*int widthBytes = pScrn->displayWidth * cpp;*/ - int widthBytes = psav->lDelta; - /*int widthBytes = psav->l3DDelta;*/ - int bufferSize = ((pScrn->virtualY * widthBytes + SAVAGE_BUFFER_ALIGN) - & ~SAVAGE_BUFFER_ALIGN); - int tiledwidthBytes, tiledBufferSize, RamNeededFor3D; - /*tiledwidthBytes = psav->lDelta;*/ - tiledwidthBytes = psav->l3DDelta; - - if (cpp == 2) { - tiledBufferSize = ((pScrn->virtualX+63)/64)*((pScrn->virtualY+15)/16) * 2048; - } else { - tiledBufferSize = ((pScrn->virtualX+31)/32)*((pScrn->virtualY+15)/16) * 2048; - } - - RamNeededFor3D = 4096 + /* hw cursor*/ - psav->cobSize + /*COB*/ - bufferSize + /* front buffer */ - tiledBufferSize + /* back buffer */ - tiledBufferSize; /* depth buffer */ - - xf86DrvMsg(pScrn->scrnIndex,X_INFO, - "%d kB of Videoram needed for 3D; %d kB of Videoram available\n", - RamNeededFor3D/1024, psav->videoRambytes/1024); - - if (RamNeededFor3D <= psav->videoRambytes) { - xf86DrvMsg(pScrn->scrnIndex,X_INFO,"Sufficient Videoram available for 3D\n"); - return TRUE; - } else { - xf86DrvMsg(pScrn->scrnIndex,X_ERROR,"Insufficient Videoram available for 3D\n"); - xf86DrvMsg(pScrn->scrnIndex,X_ERROR,"Try a lower color depth or smaller desktop.\n"); - xf86DrvMsg(pScrn->scrnIndex,X_ERROR, - "For integrated savages try increasing the videoram in the BIOS.\n"); - return FALSE; - } -} static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) @@ -2558,8 +2268,8 @@ static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen, (psav->FBBase + psav->CursorKByte*1024 + 4096 - 32); xf86DrvMsg( pScrn->scrnIndex, X_PROBED, - "Shadow area physical %08x, linear %08x\n", - psav->ShadowPhysical, psav->ShadowVirtual ); + "Shadow area physical %08lx, linear %p\n", + psav->ShadowPhysical, (void *)psav->ShadowVirtual ); psav->WaitQueue = ShadowWait1; psav->WaitIdle = ShadowWait; @@ -2579,29 +2289,6 @@ static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen, if (!SavageModeInit(pScrn, pScrn->currentMode)) return FALSE; -#ifdef XF86DRI - if (((psav->Chipset == S3_TWISTER) - || (psav->Chipset == S3_PROSAVAGE) - || (psav->Chipset == S3_SAVAGE4) - || (psav->Chipset == S3_SAVAGE_MX) - || (psav->Chipset == S3_SAVAGE3D) - || (psav->Chipset == S3_SUPERSAVAGE) - || (psav->Chipset == S3_PROSAVAGEDDR)) - && (!psav->NoAccel) - && (SavageCheckAvailableRamFor3D(pScrn))) { - /* Setup DRI after visuals have been established */ - psav->directRenderingEnabled = SAVAGEDRIScreenInit(pScreen); - } else - psav->directRenderingEnabled = FALSE; - - if(psav->directRenderingEnabled) { - xf86DrvMsg(pScrn->scrnIndex,X_CONFIG,"DRI is enabled\n"); - } - else { - xf86DrvMsg(pScrn->scrnIndex,X_ERROR,"DRI isn't enabled\n"); - } -#endif - miClearVisualTypes(); if (pScrn->bitsPerPixel == 16) { @@ -2707,29 +2394,8 @@ static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen, if (xf86DPMSInit(pScreen, SavageDPMS, 0) == FALSE) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "DPMS initialization failed\n"); -#ifdef XF86DRI - if (psav->directRenderingEnabled) { - /* complete the DRI setup.*/ - psav->directRenderingEnabled = SAVAGEDRIFinishScreenInit(pScreen); - } - if (psav->directRenderingEnabled) { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n"); - } else { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Direct rendering disabled\n"); - } -#endif - -#ifdef XvExtension if( !psav->NoAccel && !SavagePanningCheck(pScrn) ) SavageInitVideo( pScreen ); -#endif - - if ((psav->directRenderingEnabled) && (!psav->bDisableXvMC)) { - if (SAVAGEInitMC(pScreen)) - xf86DrvMsg(pScrn->scrnIndex,X_CONFIG,"XvMC is enabled\n"); - else - xf86DrvMsg(pScrn->scrnIndex,X_CONFIG,"XvMC is not enabled\n"); - } if (serverGeneration == 1) xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); @@ -2774,7 +2440,7 @@ static int SavageInternalScreenInit(int scrnIndex, ScreenPtr pScreen) ret = fbScreenInit(pScreen, FBStart, width, height, pScrn->xDpi, pScrn->yDpi, - psav->ulAperturePitch / (pScrn->bitsPerPixel >> 3), /*displayWidth,*/ + displayWidth, pScrn->bitsPerPixel); return ret; } @@ -2852,22 +2518,7 @@ static Bool SavageModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) - if (pScrn->bitsPerPixel == 8) - psav->HorizScaleFactor = 1; - else if (pScrn->bitsPerPixel == 16) - psav->HorizScaleFactor = 1; /* I don't think we ever want 2 */ - else - psav->HorizScaleFactor = 1; - - if (psav->HorizScaleFactor == 2) - if (!mode->CrtcHAdjusted) { - mode->CrtcHDisplay *= 2; - mode->CrtcHSyncStart *= 2; - mode->CrtcHSyncEnd *= 2; - mode->CrtcHTotal *= 2; - mode->CrtcHSkew *= 2; - mode->CrtcHAdjusted = TRUE; - } + psav->HorizScaleFactor = 1; if (!vgaHWInit(pScrn, mode)) return FALSE; @@ -2912,7 +2563,6 @@ static Bool SavageModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) break; } - if( psav->UseBIOS ) { int refresh; SavageModeEntryPtr pmt; @@ -3135,14 +2785,11 @@ static Bool SavageModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) new->CR36 = VGAIN8(vgaCRReg); VGAOUT8(vgaCRIndex, 0x68); new->CR68 = VGAIN8(vgaCRReg); - new->CR69 = 0; VGAOUT8(vgaCRIndex, 0x6f); new->CR6F = VGAIN8(vgaCRReg); - VGAOUT8(vgaCRIndex, 0x86); - new->CR86 = VGAIN8(vgaCRReg) | 0x08; VGAOUT8(vgaCRIndex, 0x88); - new->CR88 = VGAIN8(vgaCRReg) | DISABLE_BLOCK_WRITE_2D; + new->CR86 = VGAIN8(vgaCRReg) | 0x08; VGAOUT8(vgaCRIndex, 0xb0); new->CRB0 = VGAIN8(vgaCRReg) | 0x80; } @@ -3167,13 +2814,6 @@ static Bool SavageCloseScreen(int scrnIndex, ScreenPtr pScreen) TRACE(("SavageCloseScreen\n")); -#ifdef XF86DRI - if (psav->directRenderingEnabled) { - SAVAGEDRICloseScreen(pScreen); - psav->directRenderingEnabled=FALSE; - } -#endif - if (psav->pVbe) vbeFree(psav->pVbe); psav->pVbe = NULL; @@ -3191,7 +2831,6 @@ static Bool SavageCloseScreen(int scrnIndex, ScreenPtr pScreen) if (pScrn->vtSema) { SavageWriteMode(pScrn, vgaSavePtr, SavageSavePtr, FALSE); - SavageResetStreams(pScrn); vgaHWLock(hwp); SavageUnmapMem(pScrn, 0); } @@ -3205,71 +2844,22 @@ static Bool SavageCloseScreen(int scrnIndex, ScreenPtr pScreen) static Bool SavageSaveScreen(ScreenPtr pScreen, int mode) { -#if 0 ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -#endif TRACE(("SavageSaveScreen(0x%x)\n", mode)); -#if 0 - if( pScrn->vtSema && SAVPTR(pScrn)->hwcursor ) - { + + if( pScrn->vtSema && SAVPTR(pScrn)->hwcursor && SAVPTR(pScrn)->hwc_on) { + if( xf86IsUnblank(mode) ) SavageShowCursor( pScrn ); else SavageHideCursor( pScrn ); + SAVPTR(pScrn)->hwc_on = TRUE; } -#endif - return vgaHWSaveScreen(pScreen, mode); -} -void -SavageAdjustFrame(int scrnIndex, int x, int y, int flags) -{ - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - SavagePtr psav = SAVPTR(pScrn); - DisplayModePtr currentMode = pScrn->currentMode; - int address=0,top=0,left=0; - - TRACE(("SavageAdjustFrame(%d,%d,%x)\n", x, y, flags)); - - if (!psav->bTiled) { - left = x - x % 64; - top = y; - address = (top * psav->lDelta) + left * (pScrn->bitsPerPixel >> 3); - address = (address >> 5) << 5; - } else { - top = y - y % TILEHEIGHT; - if (pScrn->bitsPerPixel == 16) { - left = x - x % TILEWIDTH_16BPP; - address = top * psav->lDelta + left * TILE_SIZE_BYTE / TILEWIDTH_16BPP; - } else if (pScrn->bitsPerPixel == 32) { - left = x - x % TILEWIDTH_32BPP; - address = top * psav->lDelta + left * TILE_SIZE_BYTE / TILEWIDTH_32BPP; - } - } - - /* - * because we align the viewport to the width and height of one tile - * we shoud update the locate of frame - */ - pScrn->frameX0 = left; - pScrn->frameY0 = top; - pScrn->frameX1 = left + currentMode->HDisplay - 1; - pScrn->frameY1 = top+ currentMode->VDisplay - 1; - - if (S3_SAVAGE_MOBILE_SERIES(psav->Chipset)) { - OUTREG32(PRI_STREAM_FBUF_ADDR0,address | 0xFFFFFFFC); /* IGA1 */ - OUTREG32(PRI_STREAM_FBUF_ADDR1,address | 0x80000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR0,address | 0xFFFFFFFC); /* IGA2 */ - OUTREG32(PRI_STREAM2_FBUF_ADDR1,address | 0x80000000); - } else { - OUTREG32(PRI_STREAM_FBUF_ADDR0,address | 0xFFFFFFFC); - OUTREG32(PRI_STREAM_FBUF_ADDR1,address | 0x80000000); - } - - return; + return vgaHWSaveScreen(pScreen, mode); } -#if 0 + void SavageAdjustFrame(int scrnIndex, int x, int y, int flags) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; @@ -3296,7 +2886,7 @@ void SavageAdjustFrame(int scrnIndex, int x, int y, int flags) return; } -#endif + Bool SavageSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) { @@ -3373,9 +2963,7 @@ void SavageLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies, } } -#if 0 #define inStatus1() (hwp->readST01( hwp )) -#endif void SavageLoadPaletteSavage4(ScrnInfoPtr pScrn, int numColors, int *indicies, LOCO *colors, VisualPtr pVisual) @@ -3384,15 +2972,11 @@ void SavageLoadPaletteSavage4(ScrnInfoPtr pScrn, int numColors, int *indicies, int i, index; vgaHWPtr hwp = VGAHWPTR(pScrn); - int vgaCRIndex, vgaCRReg, vgaIOBase; - vgaIOBase = hwp->IOBase; - vgaCRIndex = vgaIOBase + 4; - vgaCRReg = vgaIOBase + 5; - VerticalRetraceWait(); + VerticalRetraceWait(psav); for (i=0; i<numColors; i++) { if (!(inStatus1()) & 0x08) - VerticalRetraceWait(); + VerticalRetraceWait(psav); index = indicies[i]; VGAOUT8(0x3c8, index); VGAOUT8(0x3c9, colors[index].red); @@ -3514,8 +3098,6 @@ void SavageGEReset(ScrnInfoPtr pScrn, int from_timeout, int line, char *file) break; case S3_SAVAGE4: case S3_PROSAVAGE: - case S3_PROSAVAGEDDR: - case S3_TWISTER: case S3_SUPERSAVAGE: success = (ALT_STATUS_WORD0 & 0x0081ffff) == 0x00800000; break; @@ -3549,7 +3131,6 @@ void SavageGEReset(ScrnInfoPtr pScrn, int from_timeout, int line, char *file) OUTREG(MONO_PAT_1, ~0); SavageSetGBD(pScrn); - } @@ -3620,52 +3201,26 @@ static void SavageDPMS(ScrnInfoPtr pScrn, int mode, int flags) break; } - if ( (!psav->CrtOnly) && psav->UseBIOS && psav->PanelX ) { - SavageSetPanelEnabled(psav, (mode == DPMSModeOn)); - } - else if ((!psav->CrtOnly) && psav->PanelX) { - switch (mode) { - case DPMSModeOn: - VGAOUT8(0x3c4, 0x31); /* SR31 bit 4 - FP enable */ - VGAOUT8(0x3c5, VGAIN8(0x3c5) | 0x10); - break; - case DPMSModeStandby: - case DPMSModeSuspend: - case DPMSModeOff: - VGAOUT8(0x3c4, 0x31); /* SR31 bit 4 - FP enable */ - VGAOUT8(0x3c5, VGAIN8(0x3c5) & ~0x10); - break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid DPMS mode %d\n", mode); - break; - } - } - VGAOUT8(0x3c4, 0x0d); VGAOUT8(0x3c5, srd); return; } -static void -SavageProbeDDC(ScrnInfoPtr pScrn, int index) -{ - SavagePtr psav = SAVPTR(pScrn); - ConfiguredMonitor = vbeDoEDID(psav->pVbe, NULL); -} static unsigned int SavageDDC1Read(ScrnInfoPtr pScrn) { + register vgaHWPtr hwp = VGAHWPTR(pScrn); register unsigned char tmp; SavagePtr psav = SAVPTR(pScrn); - UnLockExtRegs(); - - VerticalRetraceWait(); - - InI2CREG(tmp,psav->I2CPort); - + VerticalRetraceWait(psav); + + InI2CREG(psav,tmp); + while (hwp->readST01(hwp)&0x8) {}; + while (!(hwp->readST01(hwp)&0x8)) {}; + return ((unsigned int) (tmp & 0x08)); } @@ -3674,29 +3229,38 @@ SavageDDC1(int scrnIndex) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; SavagePtr psav = SAVPTR(pScrn); - uchar byte; + unsigned char tmp; + Bool success = FALSE; xf86MonPtr pMon; - - UnLockExtRegs(); /* initialize chipset */ - InI2CREG(byte,psav->I2CPort); - OutI2CREG(byte | 0x12,psav->I2CPort); - - pMon = xf86DoEDID_DDC1(scrnIndex,vgaHWddc1SetSpeed,SavageDDC1Read); - if (!pMon) - return FALSE; - - xf86PrintEDID(pMon); + InI2CREG(psav,tmp); + OutI2CREG(psav,tmp | 0x12); + if ((pMon = xf86PrintEDID( + xf86DoEDID_DDC1(scrnIndex,LoaderSymbol("vgaHWddc1SetSpeed"), + SavageDDC1Read))) != NULL) + success = TRUE; xf86SetDDCproperties(pScrn,pMon); /* undo initialization */ - OutI2CREG(byte,psav->I2CPort); + OutI2CREG(psav,tmp); + return success; +} - return TRUE; + +static void +SavageProbeDDC(ScrnInfoPtr pScrn, int index) +{ + vbeInfoPtr pVbe; + if (xf86LoadSubModule(pScrn, "vbe")) { + pVbe = VBEInit(NULL,index); + ConfiguredMonitor = vbeDoEDID(pVbe, NULL); + vbeFree(pVbe); + } } + static void SavageGetTvMaxSize(SavagePtr psav) { @@ -3720,62 +3284,10 @@ SavagePanningCheck(ScrnInfoPtr pScrn) pMode = pScrn->currentMode; psav->iResX = pMode->CrtcHDisplay; psav->iResY = pMode->CrtcVDisplay; - - if ((psav->iResX < psav->PanelX || psav->iResY < psav->PanelY)) - psav->FPExpansion = TRUE; - else - psav->FPExpansion = FALSE; - if( psav->iResX < pScrn->virtualX || psav->iResY < pScrn->virtualY ) return TRUE; else return FALSE; } -static void -SavageResetStreams(ScrnInfoPtr pScrn) -{ - SavagePtr psav = SAVPTR(pScrn); - uchar cr67; - uchar cr69; - /* disable streams */ - switch (psav->Chipset) { - case S3_SAVAGE3D: - case S3_SAVAGE_MX: - case S3_SUPERSAVAGE: - OUTREG32(PRI_STREAM_STRIDE,0); - OUTREG32(PRI_STREAM2_STRIDE, 0); - OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000); - OUTREG8(CRT_ADDRESS_REG, 0x67); - cr67 = INREG8(CRT_DATA_REG); - cr67 &= ~0x08; /* CR67[3] = 1 : Mem-mapped regs */ - cr67 &= ~0x04; /* CR67[2] = 1 : enable stream 1 */ - cr67 &= ~0x02; /* CR67[1] = 1 : enable stream 2 */ - OUTREG8(CRT_DATA_REG, cr67); - break; - case S3_SAVAGE4: - case S3_TWISTER: - case S3_PROSAVAGE: - case S3_PROSAVAGEDDR: - case S3_SAVAGE2000: /* don't know about savage2000 */ - OUTREG32(PRI_STREAM_STRIDE,0); - OUTREG32(PRI_STREAM_FBUF_ADDR0,0); - OUTREG32(PRI_STREAM_FBUF_ADDR1,0); - OUTREG8(CRT_ADDRESS_REG, 0x67); - cr67 = INREG8(CRT_DATA_REG); - cr67 &= ~0x0c; /* CR67[2] = 1 : enable stream 1 */ - OUTREG8(CRT_DATA_REG, cr67); - OUTREG8(CRT_ADDRESS_REG, 0x69); - cr69 = INREG8(CRT_DATA_REG); - cr69 &= ~0x80; /* CR69[0] = 1 : Mem-mapped regs */ - OUTREG8(CRT_DATA_REG, cr69); - break; - default: - break; - } - -} diff --git a/src/savage_image.c b/src/savage_image.c index 8354622..9cf4f0f 100644 --- a/src/savage_image.c +++ b/src/savage_image.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_image.c,v 1.6 2002/05/14 20:19:52 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_image.c,v 1.4 2001/05/18 23:35:32 dawes Exp $ */ #include "savage_driver.h" #include "xaarop.h" @@ -102,7 +102,7 @@ SavageWriteBitmapCPUToScreenColorExpand ( cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | BCI_CMD_SEND_COLOR | BCI_CMD_CLIP_LR | BCI_CMD_DEST_GBD | BCI_CMD_SRC_MONO; - cmd |= XAACopyROP[rop] << 16; + cmd |= XAAGetCopyROP(rop) << 16; if( bg == -1 ) cmd |= BCI_CMD_SRC_TRANSPARENT; @@ -160,7 +160,7 @@ SavageSetupForImageWrite( | BCI_CMD_CLIP_LR | BCI_CMD_DEST_GBD | BCI_CMD_SRC_COLOR; - cmd |= XAACopyROP[rop] << 16; + cmd |= XAAGetCopyROP(rop) << 16; if( transparency_color != -1 ) cmd |= BCI_CMD_SRC_TRANSPARENT; |