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authorFrancisco Jerez <currojerez@riseup.net>2009-05-10 01:53:05 +0200
committerFrancisco Jerez <currojerez@riseup.net>2009-05-10 01:53:05 +0200
commit962e0c4f08180ac51994aef8d6d042108d5841c1 (patch)
tree655895599a0027347ca22f8cdefcd188cec2e203
parent3cc1b9d4bcf1b7a756ea4426c93392ff6d82e9a6 (diff)
Widen the pixel clock readjust interval for SM712.
Set it to 3MHz so that the pixel clock frequency is overridden when it's found to be 49MHz, which is reported to be unstable.
-rw-r--r--src/smilynx_crtc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/smilynx_crtc.c b/src/smilynx_crtc.c
index a8c0a03..fb7183c 100644
--- a/src/smilynx_crtc.c
+++ b/src/smilynx_crtc.c
@@ -241,7 +241,7 @@ SMILynx_CrtcModeFixup(xf86CrtcPtr crtc,
/* Adjust the pixel clock in case it is near one of the known
stable frequencies (KHz) */
int stable_clocks[] = {46534,};
- int epsilon = 2000;
+ int epsilon = 3000;
int i;
for (i=0; i < sizeof(stable_clocks)/sizeof(int); i++) {