| Age | Commit message (Collapse) | Author |
|---|
|
|
|
Probably I misunderstood the usage of this register, as it will always
show the same value, regardless of having a crt connected to the "vga"
port or not. Only difference is that while the detect bit is set,
the crt will be blank. This patch should be more of a placeholder for
a possible correction, but it should not cause any side effects, unless
the data field can be zero on a valid situation.
In my test computer, this field, in base 2 is always 1000000010000100,
what doesn't really look like data in rgb 8:8:8...
|
|
Sample usage on sm502:
$ DISPLAY=:0 xrandr --output VGA --newmode 1280x1024 109.00 1280 1368 1496 1712 1024 1027 1034 1063 -hsync +vsync
$ DISPLAY=:0 xrandr --addmode VGA 1280x1024
$ DISPLAY=:0 xrandr --output VGA --mode 1280x1024 --pos 768x176
Last command assuming using XAA (with ``Virtual 2048 1024''), so that it
will have panel in top-left, and crt in bottom-right.
|
|
This code is an adaptation of SMI sample implementation.
CSCVideo is an alternate way to render video, that should reduce memory
bandwidth usage, and uses the color space conversion hardware to render
video directly to the framebuffer memory.
When using randr dual head mode, currently only XAA is supported. As it
has a fixed format framebuffer (when using the Virtual xorg.conf option).
This patch also ensures that pScrn->displayWidth, pScrn->virtualX and
pScrn->virtualY are only changed by the driver when using EXA.
|
|
|
|
Use "local memory" field of mmio 0x010 and not "system memory", as
it uses system memory values whenever there is a choice (just sets
bits to zero).
|
|
Other chipsets are doing the same. But this apparently is to circumvent
a problem in randr/cursor implementation, that appears to not work very
well with hardware that supports two hw cursors, but not argb cursors.
|
|
Use separate buffers for crt and panel hw cursors.
Describe, and workaround a problem with Dualhead and hw cursor enabled.
It still has the inconvenient of having a blinking X when exiting the server
or switching to a VT; maybe should also save the image currently configured
also (and restore on exit), or just disable hw cursor on dual head mode.
Also revert change to not initialize video on dualhead. Better to have
fully functional video only on panel, that can be resized, then non
resizable video..
|
|
pSmi->IsSecondary was not used, and there should not exist two
instances of the driver managing the same card.
Macro CHECK_SECONDARY() was dependant on a second instance of the driver
for the same card, and also removed.
Some rework should still be done in the cursor code, as it sometimes,
when displaying different data, will leave the hw cursor visible, while
using an argb cursor.
|
|
Also done some clean up, like removing unused/redundant members of the
screen private structure, and removing now unused configuration file
options.
|
|
|
|
Clip the video to the CRTC viewport by using
xf86_crtc_clip_video_helper, and allow XV in
dual head mode.
|
|
* Implementation of the PictOpSrc render operation with a
source coordinate transformation through 2D engine rotate-BITBLTs.
* Fix EXA Copy and Solid in 24 bpp packed color mode.
|
|
* Make screen resizing behave better with XAA.
* Move some local variable declarations to the top of
the function definition to conform ANSI C.
* Make the Lynx panel modesetting code to actually
program the panel sync pulse width in dualhead mode.
* Also, fix a crash when using libpciaccess
(the memory wasn't being unmapped).
|
|
Slightly change clock selection code to start using 501 compatible values,
before checking 502 values, if it is a 502.
DPMS for the VGA/second output was being set with bits inverted, that is
dpms-on was programmed as dpms-off and vice versa. This was one of the
reasons of dual head not working.
Corrected wrong vsync programming for the crt. Cut&paste/typo caused
programming vsync with hsync values, and thus, never getting the crt
to accept the mode being programmed.
If adding:
Option "Dualhead" "True"
to xorg.conf, now you should be able to do things like:
$ DISPLAY=:0.0 xrandr --output VGA --right-of LVDS
$ DISPLAY=:0.0 xrandr --output VGA --below LVDS
and so on.
*Iff* there is some way to not have any limitations for video playback,
this option should be made default or automatically configured.
|
|
It is mean't to be a fallback option, that as long as kernel boots
in framebuffer mode, the X Server should also work.
Correct incorrect value being checked when printing state of Dualhead
option.
The M value when programming PLL3 is actually an 8 bits integer,
so correct it and comments about it.
|
|
If Dualhead is set, it will attempt to use setups that allow different
outputs with different contents, instead of crt always cloning panel.
Still not fully functional.
|
|
Correct wrong clock calculation for the 501 clock setting, that is used
for pre 502 panel interface and crt.
Adds a few new programmable fields to MSOCRegRec:crt_display_ctl.
Call SMI501_CrtcAdjustFrame() after adjusting a mode, instead of
before changing registers.
|
|
Also add more complete description of programmable clocks.
|
|
Also print the value of sm502 registers (should be a noop on sm501).
Added the frequency field to the MSOCRegRec's misc_ctl, as it is
a read/write registers, and changing bit 24 may change the logic
of pll3 programming (needs clarification with SMI).
|
|
XAA was not initialized anymore in RandR patch, but it is still the
default accel method. Also reenable offscreen fb manager.
At least on the MSOC OEM sample (using X Server 1.4), needs some more
work as EXA is crashing in a call to exaPrepareAccess() when switching
to a terminal; this seems to be related to disabling exa offscreen
pixmaps on the smi501.
|
|
Double value must be truncated when calculating the difference from the
possible clock and requested clock.
|
|
The "prototype" computer no longer locks, and only "missing feature"
from before the patch is that video and Xaa don't work (only with Exa).
For the moment, just force crt as not connected, and set the proper
registers to make the secondary output clone the panel.
|
|
It actually was not added in a previous commit (due to using git reset
to remake a commit, and not readding it), but now, changed only call
xf86CVTMode if it is available in the X Server, otherwise, for older
X Servers, a modeline should be specified in xorg.conf.
|
|
Also correct printing information about MCLK in the smi501/502, it
should print M2CLK (aka M1CLK o the 502) as it is the clock that
controls video engine/memory.
|
|
Moved most of the Lynx-specific code out of the main
functions at smi_driver.c to some new files: smilynx_hw.c
(With CRTC-independent code like global hardware initialization and
mode saving/restoring), smilynx_crtc.c (With the CRTC-local
procedures) and smilynx_output.c (Output power management, DDC and
monitor detection, currently).
Done something similar with the SMI501 code: split
SMI501_ModeInit in three separate functions: SMI501_HWInit that does
the global initialization, and the CRTC mode_set callbacks
SMI501_ModeSet_crt and SMI501_ModeSet_lcd at smi501_crtc.c.
The SMI501_ModeSet code is divided into SMI501_WriteMode_common,
SMI501_WriteMode_lcd and SMI501_WriteMode_crt, each one updates a
different register set in the hardware.
Inside smi_crtc.c, there is mainly hardware independent
code... Initial CRT controller allocation, shadows, rotation and
framebuffer resizing code.
The shadow code currently relies on EXA... I'm not sure what are the
problems of the EXA implementation in MSOC. Does it work?
I think it would be a good thing to get rid of XAA soon: The next
thing I'll be working on will be EXA Composite... I hope it's possible
to get EXA acceleration working at least as fast as the current
XAA. (Although Teddy Wang confirmed me that the SMI720 DMA engine is
broken...)
So, the patch adds some features like new Lynx dualhead modesetting
code, but it probably breaks some other things:
* Video Overlay: I suppose it does work with EXA activated. It seems
it is also possible to have simultaneous overlays in both CRTCs with the
Lynx hardware (I have some code for this, but still work in progress).
* Hardware Cursor (It needs more integration in the CRTC interfaces).
* The old Shadow FB / rotation code, which we should probably drop.
These are in my TODO list... Along with some more cleaning and other
minor issues in the modesetting code.
About the SMI501 RandR1.2 implementation... I suppose it's specially
lacking per-output DPMS (The DPMS field in the System Control register
only affects the CRT, doesn't it?).
|
|
This driver is expected to be used with XServer 1.4 or newer, but a
(probably temporary) copy of xf86cvt.c was also added to the build.
This modeline automatically added implies it would not be required
to specify one in xorg.conf, as it should not be uncommon "non standard"
modes, like 800x480 or 1024x600.
|
|
Instead of using a fixed 24Mhz input frequency, as "unofficially"
specified by SMI, a guess of using a 12 multiplier was used, and it
corrects the screen flicker problem as well as make a secondary output
work again.
|
|
WaitQueue() did receive an unused parameter, that was removed. The
parameter was unused since version 1.0 in XFree86 CVS, so probably
nobody knows for what it was used.
WaitIdle() now also replaces WaitIdleEmpty(), as an idle engine
should also have an empty fifo.
SMI_SubsequentScreenToScreenCopy() was changed to use WaitIdle()
instead of WaitQueue() before submitting the commands to the engine.
This fixes a nasty lockup when using XaaOffscreenPixmaps (what is
desired/wanted to help improve performance), and the lockup in the
MSOC was clearly due to an engine overrun, when sending commands
faster then the engine could process.
|
|
It is not in the specs, so don't use it on chipsets older then the 502.
Some review should be done in SMI501_FindPLLClock() as when hardcoding it
to use the clock selection code for older chips, it appears to choose a
better refresh rate (no flicking at 1024x600).
|
|
The values that should be used, should also have a more meaningful name,
as something like:
doesn't help much, and the fact that these "ports" can be accessed from
several "bases" may be confusing also, as there is SCRBase, DCRBase,
FPRBase, DPRBase, CPRBase (and IOBase). The 501 code should probably be
changed to just use IOBase, as currently it uses SCRBase, that happens
to be at pSmi->MapBase + 0x0000.
This patch also completely transforms the WaitQueue macro in a noop
for the MSOC. In SMI sample code it is almost the current code, just
that the macro body is commented out. Hopefully this will be addressed
soon.
|
|
|
|
These macros access vga registers, but don't make it clear in their name.
|
|
|
|
Also remove extra includes that were not used.
|
|
The new code is based on the file SM502Clock.pdf provide by SMI engineers
(many thanks). And now it is expected to work correctly. The few remaining
details that are unclear (for the extended 502 modesetting mode) should be
resolved soon, and those are:
* MMIO:0x74:bit15 (PLL Output Divided by 2)
0: Disable.
1: Enable.
(does this mean it can use a 12MHz clock instead of 24? or anything else?)
* Should bit 31 of "current clock" always be set when using the alternate
mode setting for the 502? The alternate modesetting allows a very closer
pixel clock programming option, usually with 0 difference from the
xf86 mode.
I will ask SMI to make SM502Clock.pdf also available in the ftp site, it
is just 3 pages, or possibly even better, an update for the existing
documentation.
|
|
Now access to bitfields looks like:
record->register.f.field
instead of:
field(record->register, field)
what should be easier to read and understand.
|
|
The 502 is a superset of the 501, also recognized as PCI_CHIP_SMI501.
The driver is only known to work with smi_501 chipset
"SM501 VoyagerGX Rev. AA (rev c0)".
|
|
This causes instabilities, and there was also a bug where it would
tell the crt to not select panel data (due to removing the "else").
|
|
Add missing divide by 1000 in smi_501.c, as well as a FIXME comment
about a crash, and possible cause as well as possible ways to program
other clocks.
|
|
Previous patch wasn't fully correct, just that the values were generating
the same register dump as the smi 2.2.5 driver version.
When correcting it to not mix Mhz and Khz in the math, the problems
returned.... Anyway, it just works when selecting the highest clock, and
the attached CRT will display the panel image. This is illogical, so maybe
the specs are outdated... The previous code has been #ifdef'ed out in
"CALC_CLOCK".
Note that it still changes the boot default clock, from the default
288Mhz to 336Mhz, and in this patch, it also always sets both, panel and
crt clocks (what happens here, is that most likely, by doing this, it
forces the hardware to "somehow" autoconfigure itself; will try to get
some information from SMI about this, but this is the boot default,
and what smi sources do...).
|
|
The clock that should be programmed is the bandwidth, and not the pixel
clock itself. Based on analysis of register contents, after "importing"
a slightly modified version of xf86ModeBandwidth() and properly converting
values, now it properly programs both, the LCD and a "clone" CRT or just
a secondary panel.
Modes generated by either gtf or cvt correctly works.
A (hopefully temporary) fallback was also added, and if the option
"UseFBDev" is used, the driver will not attempt to set/modify the
current video mode.
TODO: Generate a modeline "on the fly", based on monitor configured
specs, or some set of defaults, so that it should not be required to
specify a modeline in xorg.conf.
|
|
One clock must be changed at a time, first setting the pll value,
then waiting for 16ms (one vsync), then setting the divider/shift
values, and again waiting 16ms.
Code was working after split of SMI501_ModeInit(), because some
clocks were already using system boot default, but would most likely
cause a crash when actually changing values (currently only p2_xxx
or v2_xxx is changed, but it would cause problems on some system where
the initial values don't match the ones set by the driver).
TODO: Either don't change m2clk and mclk or ensure other values
work correctly (don't change because the kernel should already
have set those if a value other then the boot default should be
used).
|
|
|
|
This allows using alternate MSOCRegRec structures to set a mode.
This should be useful to restore the initial mode.
|
|
|
|
Also rename SMIRec field hwcursor to HwCursor, as there are few usages,
and this way, match the case usage for other field names.
|
|
Instead of cut&paste of the name of the current function everywhere,
just use cpp's __FUNCTION__ predefined macro.
Create two macros to exit a function, named LEAVE() and RETURN().
Functions returning void should call LEAVE() and then explicitly return
for now. "Logged" function calls are indented, so a review was done to
ensure functions with a ENTER() also have the proper exit macro.
The DEBUG macro was changed to have variadic arguments, and this way
it is no longer required to prefix arguments with VERBLEV, but now it
also is not possible to use another "verbosity value", but it wasn't used
in any of the DEBUG macro calls.
|
|
Leak was due to only releasing return value of xf86GetEntityInfo
if the chipset was PCI_CHIP_SMI501.
Cosmetic change was to log pci burst and pci retry default values
as X_DEFAULT instead of X_PROBED.
|
|
|
