Move the code that sets the correct SATA phy settings into imxahc(4)

by making use of the iomuxc regmap.  While there I realized that the
naming definitions for the first two bits of the register are wrong.
Thus, update the mask to include all lower bits and rename bit 1 to
denote "MPLL enable".  This should be flipped last to turn it on.

ok kettenis@

3 files changed, 35 insertions, 64 deletions

diff --git a/sys/arch/armv7/imx/imxahci.c b/sys/arch/armv7/imx/imxahci.c
index 98cc2681838..fb798b35a78 100644
--- a/sys/arch/armv7/imx/imxahci.c
+++ b/sys/arch/armv7/imx/imxahci.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxahci.c,v 1.10 2018/04/02 16:18:45 patrick Exp $ */
+/* $OpenBSD: imxahci.c,v 1.11 2018/04/02 17:43:08 patrick Exp $ */
 /*
  * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
  *
@@ -29,10 +29,9 @@
 #include <dev/ic/ahcireg.h>
 #include <dev/ic/ahcivar.h>
 
-#include <armv7/imx/imxiomuxcvar.h>
-
 #include <dev/ofw/openfirm.h>
 #include <dev/ofw/ofw_clock.h>
+#include <dev/ofw/ofw_misc.h>
 #include <dev/ofw/fdt.h>
 
 /* registers */
@@ -75,6 +74,20 @@
 #define SATA_GHC_HR		(1 << 0)
 #define SATA_P0PHYCR_TEST_PDDQ	(1 << 20)
 
+/* iomuxc */
+#define IOMUXC_GPR13				0x034
+#define  IOMUXC_GPR13_SATA_PHY_1_TX_EDGE_RATE		(1 << 0)
+#define  IOMUXC_GPR13_SATA_PHY_1_MPLL_CLK_EN		(1 << 1)
+#define  IOMUXC_GPR13_SATA_PHY_2_1104V			(0x11 << 2)
+#define  IOMUXC_GPR13_SATA_PHY_3_333DB			(0x00 << 7)
+#define  IOMUXC_GPR13_SATA_PHY_4_9_16			(0x04 << 11)
+#define  IOMUXC_GPR13_SATA_PHY_5_SS			(0x01 << 14)
+#define  IOMUXC_GPR13_SATA_SPEED_3G			(0x01 << 15)
+#define  IOMUXC_GPR13_SATA_PHY_6				(0x03 << 16)
+#define  IOMUXC_GPR13_SATA_PHY_7_SATA2M			(0x12 << 19)
+#define  IOMUXC_GPR13_SATA_PHY_8_30DB			(0x05 << 24)
+#define  IOMUXC_GPR13_SATA_MASK				0x07FFFFFF
+
 int	imxahci_match(struct device *, void *, void *);
 void	imxahci_attach(struct device *, struct device *, void *);
 int	imxahci_detach(struct device *, int);
@@ -113,6 +126,8 @@ imxahci_attach(struct device *parent, struct device *self, void *aux)
 	struct ahci_softc *sc = &imxsc->sc;
 	struct fdt_attach_args *faa = aux;
 	uint32_t timeout = 0x100000;
+	struct regmap *rm;
+	uint32_t reg;
 
 	if (faa->fa_nreg < 1)
 		return;
@@ -138,7 +153,22 @@ imxahci_attach(struct device *parent, struct device *self, void *aux)
 	delay(100);
 
 	/* power phy up */
-	imxiomuxc_enable_sata();
+	rm = regmap_bycompatible("fsl,imx6q-iomuxc-gpr");
+	if (rm != NULL) {
+		reg = regmap_read_4(rm, IOMUXC_GPR13);
+		reg &= ~IOMUXC_GPR13_SATA_MASK;
+		reg |= IOMUXC_GPR13_SATA_PHY_2_1104V |
+		    IOMUXC_GPR13_SATA_PHY_3_333DB |
+		    IOMUXC_GPR13_SATA_PHY_4_9_16 |
+		    IOMUXC_GPR13_SATA_SPEED_3G |
+		    IOMUXC_GPR13_SATA_PHY_6 |
+		    IOMUXC_GPR13_SATA_PHY_7_SATA2M |
+		    IOMUXC_GPR13_SATA_PHY_8_30DB;
+		regmap_write_4(rm, IOMUXC_GPR13, reg);
+		reg = regmap_read_4(rm, IOMUXC_GPR13);
+		reg |= IOMUXC_GPR13_SATA_PHY_1_MPLL_CLK_EN;
+		regmap_write_4(rm, IOMUXC_GPR13, reg);
+	}
 
 	/* setup */
 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SATA_P0PHYCR,
diff --git a/sys/arch/armv7/imx/imxiomuxc.c b/sys/arch/armv7/imx/imxiomuxc.c
index 3ecfa863ee2..fd1e2fb7306 100644
--- a/sys/arch/armv7/imx/imxiomuxc.c
+++ b/sys/arch/armv7/imx/imxiomuxc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxiomuxc.c,v 1.10 2018/04/02 12:47:22 patrick Exp $ */
+/* $OpenBSD: imxiomuxc.c,v 1.11 2018/04/02 17:43:08 patrick Exp $ */
 /*
  * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
  * Copyright (c) 2016 Mark Kettenis <kettenis@openbsd.org>
@@ -29,29 +29,10 @@
 #include <machine/bus.h>
 #include <machine/fdt.h>
 
-#include <armv7/imx/imxiomuxcvar.h>
-
 #include <dev/ofw/openfirm.h>
 #include <dev/ofw/ofw_pinctrl.h>
 #include <dev/ofw/fdt.h>
 
-/* registers */
-#define IOMUXC_GPR13			0x034
-
-/* bits and bytes */
-#define IOMUXC_GPR13_SATA_PHY_1_FAST_EDGE_RATE			(0x00 << 0)
-#define IOMUXC_GPR13_SATA_PHY_1_SLOW_EDGE_RATE			(0x02 << 0)
-#define IOMUXC_GPR13_SATA_PHY_1_EDGE_RATE_MASK			0x3
-#define IOMUXC_GPR13_SATA_PHY_2_1104V				(0x11 << 2)
-#define IOMUXC_GPR13_SATA_PHY_3_333DB				(0x00 << 7)
-#define IOMUXC_GPR13_SATA_PHY_4_9_16				(0x04 << 11)
-#define IOMUXC_GPR13_SATA_PHY_5_SS				(0x01 << 14)
-#define IOMUXC_GPR13_SATA_SPEED_3G				(0x01 << 15)
-#define IOMUXC_GPR13_SATA_PHY_6					(0x03 << 16)
-#define IOMUXC_GPR13_SATA_PHY_7_SATA2M				(0x12 << 19)
-#define IOMUXC_GPR13_SATA_PHY_8_30DB				(0x05 << 24)
-#define IOMUXC_GPR13_SATA_MASK					0x07FFFFFD
-
 #define IOMUX_CONFIG_SION		(1 << 4)
 
 #define IMX_PINCTRL_NO_PAD_CTL		(1 << 31)
@@ -179,20 +160,3 @@ imxiomuxc_pinctrl(uint32_t phandle, void *cookie)
 	free(pins, M_TEMP, len);
 	return 0;
 }
-
-void
-imxiomuxc_enable_sata(void)
-{
-	struct imxiomuxc_softc *sc = imxiomuxc_sc;
-
-	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR13,
-	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR13) & ~IOMUXC_GPR13_SATA_MASK) |
-		IOMUXC_GPR13_SATA_PHY_1_FAST_EDGE_RATE | IOMUXC_GPR13_SATA_PHY_2_1104V |
-		IOMUXC_GPR13_SATA_PHY_3_333DB | IOMUXC_GPR13_SATA_PHY_4_9_16 |
-		IOMUXC_GPR13_SATA_SPEED_3G | IOMUXC_GPR13_SATA_PHY_6 |
-		IOMUXC_GPR13_SATA_PHY_7_SATA2M | IOMUXC_GPR13_SATA_PHY_8_30DB);
-
-	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR13,
-	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR13) & ~IOMUXC_GPR13_SATA_PHY_1_SLOW_EDGE_RATE) |
-		IOMUXC_GPR13_SATA_PHY_1_SLOW_EDGE_RATE);
-}
diff --git a/sys/arch/armv7/imx/imxiomuxcvar.h b/sys/arch/armv7/imx/imxiomuxcvar.h
deleted file mode 100644
index 6c6bcbeda0e..00000000000
--- a/sys/arch/armv7/imx/imxiomuxcvar.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* $OpenBSD: imxiomuxcvar.h,v 1.4 2018/03/30 20:10:00 patrick Exp $ */
-/*
- * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
- *
- * Permission to use, copy, modify, and distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef IMXIOMUXCVAR_H
-#define IMXIOMUXCVAR_H
-
-void imxiomuxc_enable_sata(void);
-
-#endif /* IMXIOMUXCVAR_H */