diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-07-13 03:40:03 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2022-07-13 03:40:03 +0000 |
commit | 24dff9060bc2ae2bb02aa4c9068624846e60be38 (patch) | |
tree | 8bff4a788883c79773fd598135d491c1d40e95bb | |
parent | 673cebbfd1b33ff69536718394f8b66c3bd48490 (diff) |
drm/i915: Replace the unconditional clflush with drm_clflush_virt_range()
From Ville Syrjala
b33035945b0a6853f8f6f63fb3c3bc9ea869337e in linux 5.15.y/5.15.54
ef7ec41f17cbc0861891ccc0634d06a0c8dcbf09 in mainline linux
-rw-r--r-- | sys/dev/pci/drm/i915/gt/intel_ring_submission.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/dev/pci/drm/i915/gt/intel_ring_submission.c b/sys/dev/pci/drm/i915/gt/intel_ring_submission.c index 09f7b9592fc..70b06ed4f38 100644 --- a/sys/dev/pci/drm/i915/gt/intel_ring_submission.c +++ b/sys/dev/pci/drm/i915/gt/intel_ring_submission.c @@ -292,7 +292,7 @@ static void xcs_sanitize(struct intel_engine_cs *engine) sanitize_hwsp(engine); /* And scrub the dirty cachelines for the HWSP */ - clflush_cache_range(engine->status_page.addr, PAGE_SIZE); + drm_clflush_virt_range(engine->status_page.addr, PAGE_SIZE); intel_engine_reset_pinned_contexts(engine); } |