diff options
author | Kenji Aoyama <aoyama@cvs.openbsd.org> | 2013-08-16 08:47:01 +0000 |
---|---|---|
committer | Kenji Aoyama <aoyama@cvs.openbsd.org> | 2013-08-16 08:47:01 +0000 |
commit | 2a3648c202d647cecf6c94e2dd5e064219387e00 (patch) | |
tree | 7317cd56389a6d01d5057c220d2caf3fc2bebb8a | |
parent | affb71bd300e5e3211c7d2de4a78adcedb1e3717 (diff) |
Check number of planes (1, 4, or 8bpp) by ourselves, because PROM
seems not distinguish between 1bpp and 4bpp framebuffers. Now
hwplanebits should have the correct value after omfbmatch().
This also makes the monochrome X.org server work with a 4bpp
framebuffer correctly, i.e. white and black are not inverted.
ok miod@
-rw-r--r-- | sys/arch/luna88k/dev/lunafb.c | 33 |
1 files changed, 28 insertions, 5 deletions
diff --git a/sys/arch/luna88k/dev/lunafb.c b/sys/arch/luna88k/dev/lunafb.c index c9599222d37..84419506c29 100644 --- a/sys/arch/luna88k/dev/lunafb.c +++ b/sys/arch/luna88k/dev/lunafb.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lunafb.c,v 1.14 2013/05/16 13:59:10 aoyama Exp $ */ +/* $OpenBSD: lunafb.c,v 1.15 2013/08/16 08:47:00 aoyama Exp $ */ /* $NetBSD: lunafb.c,v 1.7.6.1 2002/08/07 01:48:34 lukem Exp $ */ /*- @@ -71,6 +71,7 @@ struct bt458 { #define OMFB_PLANEMASK 0xB1040000 /* planemask register */ #define OMFB_FB_WADDR 0xB1080008 /* common plane */ #define OMFB_FB_RADDR 0xB10C0008 /* plane #0 */ +#define OMFB_FB_PLANESIZE 0x40000 /* size of 1 plane, 2048 / 8 * 1024 */ #define OMFB_ROPFUNC 0xB12C0000 /* ROP function code */ #define OMFB_RAMDAC 0xC1100000 /* Bt454/Bt458 RAMDAC */ #define OMFB_SIZE (0xB1300000 - 0xB1080000 + PAGE_SIZE) @@ -156,7 +157,8 @@ struct cfdriver fb_cd = { NULL, "fb", DV_DULL }; -extern int hwplanebits; /* hardware plane bits; retrieved at boot */ +/* hardware plane bits; retrieved at boot, will be updated in omfbmatch() */ +extern int hwplanebits; int omfb_console; int omfb_cnattach(void); @@ -177,6 +179,26 @@ omfbmatch(parent, cf, aux) if (hwplanebits == 0) return (0); #endif + + /* + * Check how many planes we have. This is for 1, 4, and 8 bpp + * boards, must be checked different way for 24 bpp board... + */ + if (hwplanebits > 0) { + int i; + u_int32_t *max, save; + + for (i = 0; i < 8; i++) { + max = (u_int32_t *)trunc_page(OMFB_FB_RADDR + + OMFB_FB_PLANESIZE * i); + save = *max; + *(volatile uint32_t *)max = 0x5a5a5a5a; + if (*max != 0x5a5a5a5a) + break; + *max = save; + } + hwplanebits = i; /* should be 1, 4, or 8 */ + } return (1); } @@ -198,7 +220,7 @@ omfbattach(parent, self, args) omfb_getdevconfig(OMFB_FB_WADDR, sc->sc_dc); } printf(": %d x %d, %dbpp\n", sc->sc_dc->dc_wid, sc->sc_dc->dc_ht, - sc->sc_dc->dc_depth); + hwplanebits); /* WHITE on BLACK */ memset(&sc->sc_cmap, 255, sizeof(struct hwcmap)); @@ -426,9 +448,10 @@ omfb_getdevconfig(paddr, dc) dc->dc_videobase = paddr; /* WHITE on BLACK */ - if (hwplanebits == 4) { - /* XXX Need Bt454 more initialization */ + + if ((hwplanebits == 1) || (hwplanebits == 4)) { struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; + odac->bt_addr = 0; odac->bt_cmap = 0; odac->bt_cmap = 0; |