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authorMiod Vallat <miod@cvs.openbsd.org>2013-05-08 17:32:08 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2013-05-08 17:32:08 +0000
commit2b2ce0877dff0ffb0f8ebc8c28b18bae5e9836a3 (patch)
treebb2b94ae8c01b55ff308a083057057a312dd502d
parentcb0ca5e84da36da46fadfd17a1c4862288950fa5 (diff)
Backport fix for gcc PR target/31152:
* arm.md (negscc): Match the correct operand for optimized LT0 test. Remove optimization for GT.
-rw-r--r--gnu/gcc/gcc/config/arm/arm.md5
1 files changed, 1 insertions, 4 deletions
diff --git a/gnu/gcc/gcc/config/arm/arm.md b/gnu/gcc/gcc/config/arm/arm.md
index b28e3d01a57..317b0ed3f31 100644
--- a/gnu/gcc/gcc/config/arm/arm.md
+++ b/gnu/gcc/gcc/config/arm/arm.md
@@ -8841,15 +8841,12 @@
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
"*
- if (GET_CODE (operands[3]) == LT && operands[3] == const0_rtx)
+ if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx)
return \"mov\\t%0, %1, asr #31\";
if (GET_CODE (operands[3]) == NE)
return \"subs\\t%0, %1, %2\;mvnne\\t%0, #0\";
- if (GET_CODE (operands[3]) == GT)
- return \"subs\\t%0, %1, %2\;mvnne\\t%0, %0, asr #31\";
-
output_asm_insn (\"cmp\\t%1, %2\", operands);
output_asm_insn (\"mov%D3\\t%0, #0\", operands);
return \"mvn%d3\\t%0, #0\";