Add the possibility to map DMA memory non-cached, based on the i386/amd64

implementation. For the moment only the BUS_DMA_NOCACHE macro is required
to build drm on macppc but it will be used soon.

ok kettenis@

4 files changed, 42 insertions, 19 deletions

diff --git a/sys/arch/macppc/include/bus.h b/sys/arch/macppc/include/bus.h
index 462766c33ef..eb00af8b577 100644
--- a/sys/arch/macppc/include/bus.h
+++ b/sys/arch/macppc/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.20 2012/08/24 10:05:25 jsg Exp $	*/
+/*	$OpenBSD: bus.h,v 1.21 2012/08/30 18:14:26 mpi Exp $	*/
 
 /*
  * Copyright (c) 1997 Per Fogelstrom.  All rights reserved.
@@ -81,6 +81,14 @@ void	bus_space_free(bus_space_tag_t tag, bus_space_handle_t handle,
 #define	BUS_SPACE_MAP_LINEAR		0x02
 #define	BUS_SPACE_MAP_PREFETCHABLE	0x04
 
+/*
+ *	void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
+ *
+ * Get the kernel virtual address for the mapped bus space.
+ * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR.
+ */
+#define bus_space_vaddr(t, h) ((void *)(h))
+
 #define bus_space_read(n,m)						      \
 static __inline CAT3(u_int,m,_t)					      \
 CAT(bus_space_read_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,	      \
@@ -439,18 +447,19 @@ bus_space_copy_4(void *v, bus_space_handle_t h1, bus_space_handle_t h2,
 #define BUS_SPACE_BARRIER_READ  0x01		/* force read barrier */ 
 #define BUS_SPACE_BARRIER_WRITE 0x02		/* force write barrier */
 
-#define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
-#define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
-#define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
-#define	BUS_DMA_COHERENT	0x008	/* hint: map memory DMA coherent */
-#define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
-#define	BUS_DMA_BUS2		0x020
-#define	BUS_DMA_BUS3		0x040
-#define	BUS_DMA_BUS4		0x080
-#define BUS_DMA_READ            0x100	/* mapping is device -> memory only */
-#define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
-#define	BUS_DMA_STREAMING	0x400	/* hint: sequential, unidirectional */
-#define	BUS_DMA_ZERO		0x800	/* zero memory in dmamem_alloc */
+#define	BUS_DMA_WAITOK		0x0000	/* safe to sleep (pseudo-flag) */
+#define	BUS_DMA_NOWAIT		0x0001	/* not safe to sleep */
+#define	BUS_DMA_ALLOCNOW	0x0002	/* perform resource allocation now */
+#define	BUS_DMA_COHERENT	0x0008	/* hint: map memory DMA coherent */
+#define	BUS_DMA_BUS1		0x0010	/* placeholders for bus functions... */
+#define	BUS_DMA_BUS2		0x0020
+#define	BUS_DMA_BUS3		0x0040
+#define	BUS_DMA_BUS4		0x0080
+#define	BUS_DMA_READ		0x0100	/* mapping is device -> memory only */
+#define	BUS_DMA_WRITE		0x0200	/* mapping is memory -> device only */
+#define	BUS_DMA_STREAMING	0x0400	/* hint: sequential, unidirectional */
+#define	BUS_DMA_ZERO		0x0800	/* zero memory in dmamem_alloc */
+#define	BUS_DMA_NOCACHE		0x1000	/* map memory uncached */
 
 
 /* Forwards needed by prototypes below. */
diff --git a/sys/arch/macppc/macppc/dma.c b/sys/arch/macppc/macppc/dma.c
index a4bace9b260..254613c6df7 100644
--- a/sys/arch/macppc/macppc/dma.c
+++ b/sys/arch/macppc/macppc/dma.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: dma.c,v 1.35 2011/06/23 20:44:39 ariane Exp $	*/
+/*	$OpenBSD: dma.c,v 1.36 2012/08/30 18:14:26 mpi Exp $	*/
 /*	$NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $	*/
 
 /*-
@@ -462,7 +462,10 @@ _dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size,
 	vaddr_t va, sva;
 	size_t ssize;
 	bus_addr_t addr;
-	int curseg, error;
+	int curseg, pmapflags = 0, error;
+
+	if (flags & BUS_DMA_NOCACHE)
+		pmapflags |= PMAP_NOCACHE;
 
 	size = round_page(size);
 	va = uvm_km_valloc(kernel_map, size);
@@ -479,7 +482,7 @@ _dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size,
 		    addr += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) {
 			if (size == 0)
 				panic("_bus_dmamem_map: size botch");
-			error = pmap_enter(pmap_kernel(), va, addr,
+			error = pmap_enter(pmap_kernel(), va, addr | pmapflags,
 			    VM_PROT_READ | VM_PROT_WRITE, VM_PROT_READ |
 			    VM_PROT_WRITE | PMAP_WIRED | PMAP_CANFAIL);
 			if (error) {
diff --git a/sys/arch/powerpc/include/pmap.h b/sys/arch/powerpc/include/pmap.h
index 6c48972175e..ab30385ce46 100644
--- a/sys/arch/powerpc/include/pmap.h
+++ b/sys/arch/powerpc/include/pmap.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.h,v 1.47 2010/12/26 15:41:00 miod Exp $	*/
+/*	$OpenBSD: pmap.h,v 1.48 2012/08/30 18:14:26 mpi Exp $	*/
 /*	$NetBSD: pmap.h,v 1.1 1996/09/30 16:34:29 ws Exp $	*/
 
 /*-
@@ -145,6 +145,14 @@ int reserve_dumppages(caddr_t p);
 #define PG_PMAP_REF     PG_PMAP1
 #define PG_PMAP_EXE     PG_PMAP2
 
+/*
+ * MD flags to pmap_enter:
+ */
+
+/* to get just the pa from params to pmap_enter */
+#define PMAP_PA_MASK	~((paddr_t)PAGE_MASK)
+#define PMAP_NOCACHE	0x1		/* map uncached */
+
 #endif	/* _KERNEL */
 #endif	/* _LOCORE */
 #endif	/* _POWERPC_PMAP_H_ */
diff --git a/sys/arch/powerpc/powerpc/pmap.c b/sys/arch/powerpc/powerpc/pmap.c
index 073f298beec..a4115ba8be0 100644
--- a/sys/arch/powerpc/powerpc/pmap.c
+++ b/sys/arch/powerpc/powerpc/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.118 2011/05/30 22:25:22 oga Exp $ */
+/*	$OpenBSD: pmap.c,v 1.119 2012/08/30 18:14:26 mpi Exp $ */
 
 /*
  * Copyright (c) 2001, 2002, 2007 Dale Rahn.
@@ -545,6 +545,7 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
 {
 	struct pte_desc *pted;
 	struct vm_page *pg;
+	boolean_t nocache = (pa & PMAP_NOCACHE) != 0;
 	int s;
 	int need_sync = 0;
 	int cache;
@@ -581,9 +582,11 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
 		}
 	}
 
+	pa &= PMAP_PA_MASK;
+
 	/* Calculate PTE */
 	pg = PHYS_TO_VM_PAGE(pa);
-	if (pg != NULL)
+	if (pg != NULL && !nocache)
 		cache = PMAP_CACHE_WB; /* managed memory is cacheable */
 	else
 		cache = PMAP_CACHE_CI;