diff options
| author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2018-05-06 17:08:09 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2018-05-06 17:08:09 +0000 |
| commit | 427cf8985a24df94a1b8f7694aa71e0522713f6f (patch) | |
| tree | 1ced67bb15cc862ad03cb48f578dc0e1a72803c5 | |
| parent | 7d42f039650525d42ebada90c22ffeb638efcf45 (diff) | |
Change the order in which whe write ouw own MAC address into the relevant two
hardware registers. On Rockchip hardware it seems the address latches into
the filter logic only after writing writing the "low" register.
Fixes the Gigabit Ethernet interface on the Rockchip RK3328 and RK3399.
ok visa@, patrick@
| -rw-r--r-- | sys/dev/ic/dwc_gmac.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/dev/ic/dwc_gmac.c b/sys/dev/ic/dwc_gmac.c index 78fdbf6d301..e9fbf81b12c 100644 --- a/sys/dev/ic/dwc_gmac.c +++ b/sys/dev/ic/dwc_gmac.c @@ -1,4 +1,4 @@ -/* $OpenBSD: dwc_gmac.c,v 1.9 2018/04/07 22:43:12 kettenis Exp $ */ +/* $OpenBSD: dwc_gmac.c,v 1.10 2018/05/06 17:08:08 kettenis Exp $ */ /* $NetBSD: dwc_gmac.c,v 1.34 2015/08/21 20:12:29 jmcneill Exp $ */ /*- @@ -304,13 +304,13 @@ dwc_gmac_reset(struct dwc_gmac_softc *sc) void dwc_gmac_write_hwaddr(struct dwc_gmac_softc *sc, uint8_t *enaddr) { - uint32_t lo, hi; + uint32_t hi, lo; + hi = enaddr[4] | (enaddr[5] << 8); lo = enaddr[0] | (enaddr[1] << 8) | (enaddr[2] << 16) | (enaddr[3] << 24); - hi = enaddr[4] | (enaddr[5] << 8); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_ADDR0LO, lo); bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_ADDR0HI, hi); + bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_ADDR0LO, lo); } int |