Drop support for the HP MMU. It was only found on two hp300 systems (models

320 and 350), which have been unsupported since a bunch of release already,
because this annoying MMU does not have TT registers (or if it does, it is
not documented) and thus went in the way of PMAP_DIRECT for hp300.
In other words: remove a bunch of code which was either #ifdef'ed out or
had no chance to run in real life.

10 files changed, 23 insertions, 539 deletions

diff --git a/sys/arch/hp300/conf/Makefile.hp300 b/sys/arch/hp300/conf/Makefile.hp300
index 41b7e8c4081..c6ded9e94c3 100644
--- a/sys/arch/hp300/conf/Makefile.hp300
+++ b/sys/arch/hp300/conf/Makefile.hp300
@@ -1,4 +1,4 @@
-#	$OpenBSD: Makefile.hp300,v 1.76 2011/07/07 22:28:18 guenther Exp $
+#	$OpenBSD: Makefile.hp300,v 1.77 2011/11/01 21:20:52 miod Exp $
 
 # For instructions on building kernels consult the config(8) and options(4)
 # manual pages.
@@ -47,26 +47,21 @@ DB_STRUCTINFO=	db_structinfo.h
 DB_STRUCTINFO=
 .endif
 
-.if (${IDENT:M-DHP320} != "" || ${IDENT:M-DHP350} != "")
-_OPTIONS+=	-DM68020 -DM68K_MMU_HP
-CPPFLAGS+=	-DCACHE_HAVE_VAC
-.endif
 .if (${IDENT:M-DHP330} != "")
-_OPTIONS+=	-DM68020 -DM68K_MMU_MOTOROLA
+_OPTIONS+=	-DM68020
 .endif
 .if (${IDENT:M-DHP340} != "" || ${IDENT:M-DHP360} != "" || \
      ${IDENT:M-DHP362} != "")
-_OPTIONS+=	-DM68030 -DM68K_MMU_MOTOROLA
+_OPTIONS+=	-DM68030
 .endif
 .if (${IDENT:M-DHP345} != "" || ${IDENT:M-DHP370} != "" || \
      ${IDENT:M-DHP375} != "" || ${IDENT:M-DHP400} != "")
-_OPTIONS+=	-DM68030 -DM68K_MMU_MOTOROLA
+_OPTIONS+=	-DM68030
 CPPFLAGS+=	-DCACHE_HAVE_PAC
 .endif
 .if (${IDENT:M-DHP380} != "" || ${IDENT:M-DHP382} != "" || \
      ${IDENT:M-DHP385} != "" || ${IDENT:M-DHP425} != "" || \
      ${IDENT:M-DHP433} != "")
-_OPTIONS+=	-DM68K_MMU_MOTOROLA
 CPPFLAGS+=	-DM68040 -DFPSP
 .endif
 .if ${_OPTIONS:M-DM68020} != ""
@@ -75,12 +70,6 @@ CPPFLAGS+=	-DM68020
 .if ${_OPTIONS:M-DM68030} != ""
 CPPFLAGS+=	-DM68030
 .endif
-.if ${_OPTIONS:M-DM68K_MMU_HP} != ""
-CPPFLAGS+=	-DM68K_MMU_HP
-.endif
-.if ${_OPTIONS:M-DM68K_MMU_MOTOROLA} != ""
-CPPFLAGS+=	-DM68K_MMU_MOTOROLA
-.endif
 
 .include "${_archdir}/fpsp/Makefile.inc"
 
diff --git a/sys/arch/hp300/hp300/db_memrw.c b/sys/arch/hp300/hp300/db_memrw.c
index 3573e0886db..94946da45a7 100644
--- a/sys/arch/hp300/hp300/db_memrw.c
+++ b/sys/arch/hp300/hp300/db_memrw.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_memrw.c,v 1.10 2008/06/26 05:42:10 ray Exp $	*/
+/*	$OpenBSD: db_memrw.c,v 1.11 2011/11/01 21:20:55 miod Exp $	*/
 /*	$NetBSD: db_memrw.c,v 1.5 1997/06/10 18:48:47 veego Exp $	*/
 
 /*-
@@ -135,17 +135,6 @@ db_write_text(addr, size, data)
 			limit = size;
 		size -= limit;
 
-#ifdef M68K_MMU_HP
-		/*
-		 * Flush the supervisor side of the VAC to
-		 * prevent a cache hit on the old, read-only PTE.
-		 * XXX Is this really necessary, or am I just
-		 * paranoid?
-		 */
-		if (ectype == EC_VIRT)
-			DCIS();
-#endif
-
 		/*
 		 * Make the page writable.  Note the mapping is
 		 * cache-inhibited to save hair.
diff --git a/sys/arch/hp300/hp300/locore.s b/sys/arch/hp300/hp300/locore.s
index 2b9278768c3..7799d306ea7 100644
--- a/sys/arch/hp300/hp300/locore.s
+++ b/sys/arch/hp300/hp300/locore.s
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.s,v 1.66 2011/08/18 19:54:18 miod Exp $	*/
+/*	$OpenBSD: locore.s,v 1.67 2011/11/01 21:20:55 miod Exp $	*/
 /*	$NetBSD: locore.s,v 1.91 1998/11/11 06:41:25 thorpej Exp $	*/
 
 /*
@@ -306,32 +306,12 @@ Lis68020:
 	movl	#1,a1@(MMUCMD)		| a 68020, write HP MMU location
 	movl	a1@(MMUCMD),d0		| read it back
 	btst	#0,d0			| non-zero?
-	jne	Lishpmmu		| yes, we have HP MMU
+	jne	Lunsupp			| yes, we have HP MMU
 	RELOC(mmutype, a0)
 	movl	#MMU_68851,a0@		| no, we have PMMU
 	RELOC(machineid, a0)
 	movl	#HP_330,a0@		| and 330 CPU
 	jra	Lstart1
-Lishpmmu:
-	RELOC(ectype, a0)		| 320 or 350
-	movl	#EC_VIRT,a0@		| both have a virtual address cache
-	movl	#0x80,a1@(MMUCMD)	| set magic cookie
-	movl	a1@(MMUCMD),d0		| read it back
-	btst	#7,d0			| cookie still on?
-	jeq	Lis320			| no, just a 320
-	RELOC(machineid, a0)
-	movl	#HP_350,a0@		| yes, a 350
-	movl	#0,a1@(MMUCMD)		| clear out MMU again
-	RELOC(pmap_aliasmask, a0)
-	movl	#0x7fff, a0@		| 32KB
-	jra	Lstart1
-Lis320:
-	RELOC(machineid, a0)
-	movl	#HP_320,a0@
-	movl	#0,a1@(MMUCMD)		| clear out MMU again
-	RELOC(pmap_aliasmask, a0)
-	movl	#0x3fff, a0@		| 16KB
-	jra	Lstart1
 
 	/*
 	 * End of 68020 section
@@ -463,6 +443,7 @@ eiodone:
 	jra	Lstart2
 1:
 #endif
+Lunsupp:
 	/* Config botch; no hope. */
 	DOREBOOT
 
@@ -532,8 +513,6 @@ Lmmu_enable:
 	movl	a0@,d1			| read value (a KVA)
 	addl	a5,d1			| convert to PA
 	RELOC(mmutype, a0)
-	tstl	a0@			| HP MMU?
-	jeq	Lhpmmu2			| yes, skip
 	cmpl	#MMU_68040,a0@		| 68040?
 	jne	Lmotommu1		| no, skip
 	.long	0x4e7b1807		| movc d1,srp
@@ -544,11 +523,7 @@ Lmotommu1:
 	movl	d1,a0@(4)		| + segtable address
 	pmove	a0@,srp			| load the supervisor root pointer
 	movl	#0x80000002,a0@		| reinit upper half for CRP loads
-	jra	Lstploaddone		| done
-Lhpmmu2:
-	moveq	#PGSHIFT,d2
-	lsrl	d2,d1			| convert to page frame
-	movl	d1,INTIOBASE+MMUBASE+MMUSSTP | load in sysseg table register
+
 Lstploaddone:
 	lea	MAXADDR,a2		| PA of last RAM page
 	ASRELOC(Lhighcode, a1)		| addr of high code
@@ -574,8 +549,6 @@ Lhighcode:
 	movc	d0,vbr
 
 	RELOC(mmutype, a0)
-	tstl	a0@			| HP MMU?
-	jeq	Lhpmmu3			| yes, skip
 	cmpl	#MMU_68040,a0@		| 68040?
 	jne	Lmotommu2		| no, skip
 	movw	#0,INTIOBASE+MMUBASE+MMUCMD+2
@@ -620,10 +593,6 @@ Lmotommu2b:
 	movl	#0x82c0aa00,a2@		| value to load TC with
 	pmove	a2@,tc			| load it
 	jmp	Lenab1
-Lhpmmu3:
-	movl	#0,INTIOBASE+MMUBASE+MMUCMD	| clear external cache
-	movl	#MMU_ENAB,INTIOBASE+MMUBASE+MMUCMD | turn on MMU
-	jmp	Lenab1				| jmp to mapped code
 Lehighcode:
 
 	/*
@@ -836,11 +805,6 @@ Lbe10:
 	andw	#0x0FFF,d0		| clear out frame format
 	cmpw	#12,d0			| address error vector?
 	jeq	Lisaerr			| yes, go to it
-#if defined(M68K_MMU_MOTOROLA)
-#if defined(M68K_MMU_HP)
-	tstl	_C_LABEL(mmutype)	| HP MMU?
-	jeq	Lbehpmmu		| yes, different MMU fault handler
-#endif
 	movl	d1,a0			| fault address
 	movl	sp@,d0			| function code from ssw
 	btst	#8,d0			| data fault?
@@ -858,11 +822,9 @@ Lbe10a:
 	jeq	Lmightnotbemerr		| no -> wp check
 	btst	#7,d1			| is it MMU table berr?
 	jne	Lisberr1		| yes, needs not be fast.
-#endif /* M68K_MMU_MOTOROLA */
 Lismerr:
 	movl	#T_MMUFLT,sp@-		| show that we are an MMU fault
 	jra	_ASM_LABEL(faultstkadj)	| and deal with it
-#if defined(M68K_MMU_MOTOROLA)
 Lmightnotbemerr:
 	btst	#3,d1			| write protect bit set?
 	jeq	Lisberr1		| no: must be bus error
@@ -871,17 +833,6 @@ Lmightnotbemerr:
 	cmpw	#0x40,d0		| was it read cycle?
 	jne	Lismerr			| no, was not WPE, must be MMU fault
 	jra	Lisberr1		| real bus err needs not be fast.
-#endif /* M68K_MMU_MOTOROLA */
-#if defined(M68K_MMU_HP)
-Lbehpmmu:
-	MMUADDR(a0)
-	movl	a0@(MMUSTAT),d0		| read MMU status
-	btst	#3,d0			| MMU fault?
-	jeq	Lisberr1		| no, just a non-MMU bus error
-	andl	#~MMU_FAULT,a0@(MMUSTAT)| yes, clear fault bits
-	movw	d0,sp@			| pass MMU stat in upper half of code
-	jra	Lismerr			| and handle it
-#endif
 Lisaerr:
 	movl	#T_ADDRERR,sp@-		| mark address error
 	jra	_ASM_LABEL(faultstkadj)	| and deal with it
@@ -1492,23 +1443,12 @@ ASENTRY_NOPROFILE(TBIA)
 	rts
 Lmotommu3:
 #endif
-#if defined(M68K_MMU_MOTOROLA)
-	tstl	_C_LABEL(mmutype)	| HP MMU?
-	jeq	Lhpmmu6			| yes, skip
 	pflusha				| flush entire TLB
 	jpl	Lmc68851a		| 68851 implies no d-cache
 	movl	#DC_CLEAR,d0
 	movc	d0,cacr			| invalidate on-chip d-cache
 Lmc68851a:
 	rts
-Lhpmmu6:
-#endif
-#if defined(M68K_MMU_HP)
-	MMUADDR(a0)
-	movl	a0@(MMUTBINVAL),sp@-	| do not ask me, this
-	addql	#4,sp			|   is how HP-UX does it
-#endif
-	rts
 
 /*
  * Invalidate any TLB entry for given VA (TB Invalidate Single)
@@ -1529,9 +1469,6 @@ ENTRY(TBIS)
 	rts
 Lmotommu4:
 #endif
-#if defined(M68K_MMU_MOTOROLA)
-	tstl	_C_LABEL(mmutype)	| HP MMU?
-	jeq	Lhpmmu5			| yes, skip
 	movl	sp@(4),a0		| get addr to flush
 	jpl	Lmc68851b		| is 68851?
 	pflush	#0,#0,a0@		| flush address from both sides
@@ -1541,23 +1478,6 @@ Lmotommu4:
 Lmc68851b:
 	pflushs	#0,#0,a0@		| flush address from both sides
 	rts
-Lhpmmu5:
-#endif
-#if defined(M68K_MMU_HP)
-	movl	sp@(4),d0		| VA to invalidate
-	bclr	#0,d0			| ensure even
-	movl	d0,a0
-	movw	sr,d1			| go critical
-	movw	#PSL_HIGHIPL,sr		|   while in purge space
-	moveq	#FC_PURGE,d0		| change address space
-	movc	d0,dfc			|   for destination
-	moveq	#0,d0			| zero to invalidate?
-	movsl	d0,a0@			| hit it
-	moveq	#FC_USERD,d0		| back to old
-	movc	d0,dfc			|   address space
-	movw	d1,sr			| restore IPL
-#endif
-	rts
 
 /*
  * Invalidate instruction cache
@@ -1590,14 +1510,6 @@ ENTRY(DCIA)
 	rts
 Lmotommu8:
 #endif
-#if defined(M68K_MMU_HP)
-	tstl	_C_LABEL(ectype)	| got external VAC?
-	jle	Lnocache2		| no, all done
-	MMUADDR(a0)
-	andl	#~MMU_CEN,a0@(MMUCMD)	| disable cache in MMU control reg
-	orl	#MMU_CEN,a0@(MMUCMD)	| reenable cache in MMU control reg
-Lnocache2:
-#endif
 	rts
 
 ENTRY(DCIS)
@@ -1608,14 +1520,6 @@ ENTRY(DCIS)
 	rts
 Lmotommu9:
 #endif
-#if defined(M68K_MMU_HP)
-	tstl	_C_LABEL(ectype)	| got external VAC?
-	jle	Lnocache3		| no, all done
-	MMUADDR(a0)
-	movl	a0@(MMUSSTP),d0		| read the supervisor STP
-	movl	d0,a0@(MMUSSTP)		| write it back
-Lnocache3:
-#endif
 	rts
 
 ENTRY(DCIU)
@@ -1626,14 +1530,6 @@ ENTRY(DCIU)
 	rts
 LmotommuA:
 #endif
-#if defined(M68K_MMU_HP)
-	tstl	_C_LABEL(ectype)	| got external VAC?
-	jle	Lnocache4		| no, all done
-	MMUADDR(a0)
-	movl	a0@(MMUUSTP),d0		| read the user STP
-	movl	d0,a0@(MMUUSTP)		| write it back
-Lnocache4:
-#endif
 	rts
 
 #if defined(M68040) || defined(CACHE_HAVE_PAC)
@@ -1720,9 +1616,6 @@ ENTRY_NOPROFILE(getdfc)
  * Load a new user segment table pointer.
  */
 ENTRY(loadustp)
-#if defined(M68K_MMU_MOTOROLA)
-	tstl	_C_LABEL(mmutype)	| HP MMU?
-	jeq	Lhpmmu9			| yes, skip
 	movl	sp@(4),d0		| new USTP
 	moveq	#PGSHIFT,d1
 	lsll	d1,d0			| convert to addr
@@ -1741,21 +1634,6 @@ LmotommuC:
 	movl	#CACHE_CLR,d0
 	movc	d0,cacr			| invalidate cache(s)
 	rts
-Lhpmmu9:
-#endif
-#if defined(M68K_MMU_HP)
-	movl	#CACHE_CLR,d0
-	movc	d0,cacr			| invalidate cache(s)
-	MMUADDR(a0)
-	movl	a0@(MMUTBINVAL),d1	| invalid TLB
-	tstl	_C_LABEL(ectype)	| have external VAC?
-	jle	1f
-	andl	#~MMU_CEN,a0@(MMUCMD)	| toggle cache enable
-	orl	#MMU_CEN,a0@(MMUCMD)	| to clear data cache
-1:
-	movl	sp@(4),a0@(MMUUSTP)	| load a new USTP
-#endif
-	rts
 
 /*
  * Set processor priority level calls.  Most are implemented with
@@ -1912,20 +1790,9 @@ Lbootcode:
 	DOREBOOT
 LmotommuF:
 #endif
-#if defined(M68K_MMU_MOTOROLA)
-	tstl	_C_LABEL(mmutype)	| HP MMU?
-	jeq	LhpmmuB			| yes, skip
 	movl	#0,a0@			| value for pmove to TC (turn off MMU)
 	pmove	a0@,tc			| disable MMU
 	DOREBOOT
-LhpmmuB:
-#endif
-#if defined(M68K_MMU_HP)
-	MMUADDR(a0)
-	movl	#0xFFFF0000,a0@(MMUCMD)	| totally disable MMU
-	movl	d2,MAXADDR+NBPG-4	| restore old high page contents
-	DOREBOOT
-#endif
 Lebootcode:
 
 /*
@@ -1933,13 +1800,13 @@ Lebootcode:
  */
 	.data
 GLOBAL(machineid)
-	.long	HP_320		| default to 320
+	.long	-1		| default to unknown
 
 GLOBAL(mmuid)
 	.long	0		| default to nothing
 
 GLOBAL(mmutype)
-	.long	MMU_HP		| default to HP MMU
+	.long	0		| default to unknown
 
 GLOBAL(cputype)
 	.long	CPU_68020	| default to 68020 CPU
@@ -1950,9 +1817,6 @@ GLOBAL(ectype)
 GLOBAL(fputype)
 	.long	FPU_68882	| default to 68882 FPU
 
-GLOBAL(pmap_aliasmask)
-	.long	0
-
 ASLOCAL(protorp)
 	.long	0,0		| prototype root pointer
 
diff --git a/sys/arch/hp300/hp300/machdep.c b/sys/arch/hp300/hp300/machdep.c
index 52282340dcd..d23ea45a294 100644
--- a/sys/arch/hp300/hp300/machdep.c
+++ b/sys/arch/hp300/hp300/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.134 2011/09/20 09:49:38 miod Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.135 2011/11/01 21:20:55 miod Exp $	*/
 /*	$NetBSD: machdep.c,v 1.121 1999/03/26 23:41:29 mycroft Exp $	*/
 
 /*
@@ -404,9 +404,6 @@ identifycpu()
 	case MMU_68851:
 		strlcat(cpu_model, ", MC68851 MMU", sizeof cpu_model);
 		break;
-	case MMU_HP:
-		strlcat(cpu_model, ", HP MMU", sizeof cpu_model);
-		break;
 	default:
 		printf("%s\nunknown MMU type %d\n", cpu_model, mmutype);
 		panic("startup");
diff --git a/sys/arch/m68k/include/cpu.h b/sys/arch/m68k/include/cpu.h
index 8a1d3bf1b46..9bcf12876dc 100644
--- a/sys/arch/m68k/include/cpu.h
+++ b/sys/arch/m68k/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.23 2010/09/28 20:27:55 miod Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.24 2011/11/01 21:20:55 miod Exp $	*/
 /*	$NetBSD: cpu.h,v 1.3 1997/02/02 06:56:57 thorpej Exp $	*/
 
 /*
@@ -44,24 +44,6 @@
 
 /*
  * Exported definitions common to Motorola m68k-based ports.
- *
- * Note that are some port-specific definitions here, such as
- * HP and Sun MMU types.  These facilitate adding very small
- * amounts of port-specific code to what would otherwise be
- * identical.  The is especially true in the case of the HP
- * and other m68k pmaps.
- *
- * Individual ports are expected to define the following CPP symbols
- * in <machine/cpu.h> to enable conditional code:
- *
- *	M68K_MMU_MOTOROLA	Machine may have a Motorola MMU (incl.
- *				68851, 68030, 68040, 68060)
- *
- *	M68K_MMU_HP		Machine may have an HP MMU.
- *
- * Note also that while m68k-generic code conditionalizes on the
- * M68K_MMU_HP CPP symbol, none of the HP MMU definitions are in this
- * file (since none are used in otherwise sharable code).
  */
 
 #ifdef _KERNEL
@@ -127,9 +109,7 @@ extern	int mmutype;		/* MMU on this host */
 #define	MMU_68060	-3	/* 68060 on-chip MMU */
 #define	MMU_68040	-2	/* 68040 on-chip MMU */
 #define	MMU_68030	-1	/* 68030 on-chip subset of 68851 */
-#define	MMU_HP		0	/* HP proprietary */
 #define	MMU_68851	1	/* Motorola 68851 */
-#define	MMU_SUN		2	/* Sun MMU */
 
 /*
  * 68851 and 68030 MMU
diff --git a/sys/arch/m68k/include/pmap_motorola.h b/sys/arch/m68k/include/pmap_motorola.h
index e40e7f4a03d..e545bdcc1cc 100644
--- a/sys/arch/m68k/include/pmap_motorola.h
+++ b/sys/arch/m68k/include/pmap_motorola.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap_motorola.h,v 1.25 2011/09/27 20:35:44 miod Exp $	*/
+/*	$OpenBSD: pmap_motorola.h,v 1.26 2011/11/01 21:20:55 miod Exp $	*/
 
 /* 
  * Copyright (c) 1987 Carnegie-Mellon University
@@ -36,8 +36,8 @@
  *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
  */
 
-#ifndef	_M68K_M68K_M68K_PMAP_MOTOROLA_H_
-#define	_M68K_M68K_M68K_PMAP_MOTOROLA_H_
+#ifndef	_M68K_M68K_PMAP_MOTOROLA_H_
+#define	_M68K_M68K_PMAP_MOTOROLA_H_
 
 #ifdef	_KERNEL
 
@@ -115,17 +115,6 @@ void	pmap_kenter_cache(vaddr_t, paddr_t, pt_entry_t);
 
 #define PMAP_GROWKERNEL			/* turn on pmap_growkernel interface */
 
-#ifdef M68K_MMU_HP
-vaddr_t	pmap_prefer(vaddr_t, vaddr_t);
-#define	PMAP_PREFER(foff, va)	pmap_prefer((foff), (va))
-
-extern int	pmap_aliasmask;	/* separation at which VA aliasing is ok */
-/* pmap prefer alignment */
-#define PMAP_PREFER_ALIGN()	(pmap_aliasmask ? pmap_aliasmask + 1 : 0)
-/* pmap prefer offset */
-#define PMAP_PREFER_OFFSET(of)	((of) & pmap_aliasmask)
-#endif
-
 #endif	/* _KERNEL */
 
-#endif /* !_M68K_M68K_M68K_PMAP_MOTOROLA_H_ */
+#endif /* !_M68K_M68K_PMAP_MOTOROLA_H_ */
diff --git a/sys/arch/m68k/m68k/genassym.cf b/sys/arch/m68k/m68k/genassym.cf
index 05ce97c1a37..e2af1464032 100644
--- a/sys/arch/m68k/m68k/genassym.cf
+++ b/sys/arch/m68k/m68k/genassym.cf
@@ -1,4 +1,4 @@
-#	$OpenBSD: genassym.cf,v 1.13 2007/10/10 15:53:52 art Exp $
+#	$OpenBSD: genassym.cf,v 1.14 2011/11/01 21:20:55 miod Exp $
 
 #
 # Copyright (c) 1995 Theo de Raadt
@@ -114,7 +114,6 @@ export	EFAULT
 export	ENAMETOOLONG
 
 # MMU types
-export	MMU_HP
 export	MMU_68851
 export	MMU_68030
 export	MMU_68040
diff --git a/sys/arch/m68k/m68k/pmap_motorola.c b/sys/arch/m68k/m68k/pmap_motorola.c
index a85ac76000f..63f70ffd5ec 100644
--- a/sys/arch/m68k/m68k/pmap_motorola.c
+++ b/sys/arch/m68k/m68k/pmap_motorola.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap_motorola.c,v 1.65 2011/09/28 18:36:01 miod Exp $ */
+/*	$OpenBSD: pmap_motorola.c,v 1.66 2011/11/01 21:20:55 miod Exp $ */
 
 /*
  * Copyright (c) 1999 The NetBSD Foundation, Inc.
@@ -728,14 +728,7 @@ pmap_remove_flags(pmap, sva, eva, flags)
 {
 	vaddr_t nssva;
 	pt_entry_t *pte;
-#ifdef M68K_MMU_HP
-	boolean_t firstpage, needcflush;
-#endif
 
-#ifdef M68K_MMU_HP
-	firstpage = TRUE;
-	needcflush = FALSE;
-#endif
 	while (sva < eva) {
 		nssva = m68k_trunc_seg(sva) + NBSEG;
 		if (nssva == 0 || nssva > eva)
@@ -761,27 +754,6 @@ pmap_remove_flags(pmap, sva, eva, flags)
 				if ((flags & PRM_SKIPWIRED) &&
 				    pmap_pte_w(pte))
 					goto skip;
-#ifdef M68K_MMU_HP
-				if (pmap_aliasmask) {
-					/*
-					 * Purge kernel side of VAC to ensure
-					 * we get the correct state of any
-					 * hardware maintained bits.
-					 */
-					if (firstpage) {
-						DCIS();
-					}
-					/*
-					 * Remember if we may need to
-					 * flush the VAC due to a non-CI
-					 * mapping.
-					 */
-					if (!needcflush && !pmap_pte_ci(pte))
-						needcflush = TRUE;
-
-					firstpage = FALSE;
-				}
-#endif
 				pmap_remove_mapping(pmap, sva, pte, flags);
 skip:
 			}
@@ -789,32 +761,6 @@ skip:
 			sva += PAGE_SIZE;
 		}
 	}
-#ifdef M68K_MMU_HP
-	if (pmap_aliasmask) {
-		/*
-		 * Didn't do anything, no need for cache flushes
-		 */
-		if (firstpage)
-			return;
-		/*
-		 * In a couple of cases, we don't need to worry about flushing
-		 * the VAC:
-		 * 	1. if this is a kernel mapping,
-		 *	   we have already done it
-		 *	2. if it is a user mapping not for the current process,
-		 *	   it won't be there
-		 */
-		if (!active_user_pmap(pmap))
-			needcflush = FALSE;
-		if (needcflush) {
-			if (pmap == pmap_kernel()) {
-				DCIS();
-			} else {
-				DCIU();
-			}
-		}
-	}
-#endif
 }
 
 /*
@@ -873,9 +819,6 @@ pmap_protect(pmap, sva, eva, prot)
 	pt_entry_t *pte;
 	boolean_t needtflush;
 	int isro;
-#ifdef M68K_MMU_HP
-	boolean_t firstpage;
-#endif
 
 	PMAP_DPRINTF(PDB_FOLLOW|PDB_PROTECT,
 	    ("pmap_protect(%p, %lx, %lx, %x)\n",
@@ -888,9 +831,6 @@ pmap_protect(pmap, sva, eva, prot)
 
 	isro = pte_prot(prot);
 	needtflush = active_pmap(pmap);
-#ifdef M68K_MMU_HP
-	firstpage = TRUE;
-#endif
 	while (sva < eva) {
 		nssva = m68k_trunc_seg(sva) + NBSEG;
 		if (nssva == 0 || nssva > eva)
@@ -910,18 +850,6 @@ pmap_protect(pmap, sva, eva, prot)
 		pte = pmap_pte(pmap, sva);
 		while (sva < nssva) {
 			if (pmap_pte_v(pte) && pmap_pte_prot_chg(pte, isro)) {
-#ifdef M68K_MMU_HP
-				/*
-				 * Purge kernel side of VAC to ensure we
-				 * get the correct state of any hardware
-				 * maintained bits.
-				 *
-				 * XXX do we need to clear the VAC in
-				 * general to reflect the new protection?
-				 */
-				if (firstpage && pmap_aliasmask)
-					DCIS();
-#endif
 #if defined(M68040) || defined(M68060)
 				/*
 				 * Clear caches if making RO (see section
@@ -937,9 +865,6 @@ pmap_protect(pmap, sva, eva, prot)
 				pmap_pte_set_prot(pte, isro);
 				if (needtflush)
 					TBIS(sva);
-#ifdef M68K_MMU_HP
-				firstpage = FALSE;
-#endif
 			}
 			pte++;
 			sva += PAGE_SIZE;
@@ -1001,9 +926,6 @@ pmap_enter_cache(pmap, va, pa, prot, flags, template)
 	int npte, error;
 	paddr_t opa;
 	boolean_t cacheable = TRUE;
-#ifdef M68K_MMU_HP
-	boolean_t checkpv = TRUE;
-#endif
 	boolean_t wired = (flags & PMAP_WIRED) != 0;
 
 	PMAP_DPRINTF(PDB_FOLLOW|PDB_ENTER,
@@ -1068,9 +990,6 @@ pmap_enter_cache(pmap, va, pa, prot, flags, template)
 		/*
 		 * Retain cache inhibition status
 		 */
-#ifdef M68K_MMU_HP
-		checkpv = FALSE;
-#endif
 		if (pmap_pte_ci(pte))
 			cacheable = FALSE;
 		goto validate;
@@ -1147,49 +1066,6 @@ pmap_enter_cache(pmap, va, pa, prot, flags, template)
 			npv->pv_ptpmap = NULL;
 			npv->pv_flags = 0;
 			pv->pv_next = npv;
-#ifdef M68K_MMU_HP
-			/*
-			 * Since there is another logical mapping for the
-			 * same page we may need to cache-inhibit the
-			 * descriptors on those CPUs with external VACs.
-			 * We don't need to CI if:
-			 *
-			 * - No two mappings belong to the same user pmaps.
-			 *   Since the cache is flushed on context switches
-			 *   there is no problem between user processes.
-			 *
-			 * - Mappings within a single pmap are a certain
-			 *   magic distance apart.  VAs at these appropriate
-			 *   boundaries map to the same cache entries or
-			 *   otherwise don't conflict.
-			 *
-			 * To keep it simple, we only check for these special
-			 * cases if there are only two mappings, otherwise we
-			 * punt and always CI.
-			 *
-			 * Note that there are no aliasing problems with the
-			 * on-chip data-cache when the WA bit is set.
-			 */
-			if (pmap_aliasmask) {
-				if (pv->pv_flags & PV_CI) {
-					PMAP_DPRINTF(PDB_CACHE,
-					    ("enter: pa %lx already CI'ed\n",
-					    pa));
-					checkpv = cacheable = FALSE;
-				} else if (npv->pv_next ||
-					   ((pmap == pv->pv_pmap ||
-					     pmap == pmap_kernel() ||
-					     pv->pv_pmap == pmap_kernel()) &&
-					    ((pv->pv_va & pmap_aliasmask) !=
-					     (va & pmap_aliasmask)))) {
-					PMAP_DPRINTF(PDB_CACHE,
-					    ("enter: pa %lx CI'ing all\n",
-					    pa));
-					cacheable = FALSE;
-					pv->pv_flags |= PV_CI;
-				}
-			}
-#endif
 		}
 
 		/*
@@ -1211,12 +1087,8 @@ pmap_enter_cache(pmap, va, pa, prot, flags, template)
 	 * Assumption: if it is not part of our managed memory
 	 * then it must be device memory which may be volatile.
 	 */
-	else {
-#ifdef M68K_MMU_HP
-		checkpv =
-#endif
+	else
 		cacheable = FALSE;
-	}
 
 	/*
 	 * Increment counters
@@ -1226,14 +1098,6 @@ pmap_enter_cache(pmap, va, pa, prot, flags, template)
 		pmap->pm_stats.wired_count++;
 
 validate:
-#ifdef M68K_MMU_HP
-	/*
-	 * Purge kernel side of VAC to ensure we get correct state
-	 * of HW bits so we don't clobber them.
-	 */
-	if (pmap_aliasmask)
-		DCIS();
-#endif
 	/*
 	 * Build the new PTE.
 	 */
@@ -1246,17 +1110,10 @@ validate:
 	if (mmutype <= MMU_68040 && pmap != pmap_kernel() &&
 	    (curproc->p_md.md_flags & MDP_UNCACHE_WX) &&
 	    (prot & VM_PROT_EXECUTE) && (prot & VM_PROT_WRITE))
-#ifdef M68K_MMU_HP
-		checkpv =
-#endif
 		cacheable = FALSE;
 #endif
 
-#ifdef M68K_MMU_HP
-	if (!checkpv && !cacheable)
-#else
 	if (!cacheable)
-#endif
 		npte |= PG_CI;
 	else
 		npte |= template;
@@ -1277,24 +1134,6 @@ validate:
 	*pte = npte;
 	if (!wired && active_pmap(pmap))
 		TBIS(va);
-#ifdef M68K_MMU_HP
-	/*
-	 * The following is executed if we are entering a second
-	 * (or greater) mapping for a physical page and the mappings
-	 * may create an aliasing problem.  In this case we must
-	 * cache inhibit the descriptors involved and flush any
-	 * external VAC.
-	 */
-	if (checkpv && !cacheable) {
-		pmap_changebit(pg, PG_CI, ~0);
-		DCIA();
-#ifdef PMAP_DEBUG
-		if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) ==
-		    (PDB_CACHE|PDB_PVDUMP))
-			pmap_pvdump(pa);
-#endif
-	}
-#endif
 #ifdef PMAP_DEBUG
 	if ((pmapdebug & PDB_WIRING) && pmap != pmap_kernel())
 		pmap_check_wiring("enter", trunc_page((vaddr_t)pte));
@@ -1385,19 +1224,12 @@ pmap_kremove(va, len)
 	struct pmap *pmap = pmap_kernel();
 	vaddr_t sva, eva, nssva;
 	pt_entry_t *pte;
-#ifdef M68K_MMU_HP
-	boolean_t firstpage, needcflush;
-#endif
 
 	PMAP_DPRINTF(PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT,
 	    ("pmap_kremove(%lx, %lx)\n", va, len));
 
 	sva = va;
 	eva = va + len;
-#ifdef M68K_MMU_HP
-	firstpage = TRUE;
-	needcflush = FALSE;
-#endif
 	while (sva < eva) {
 		nssva = m68k_trunc_seg(sva) + NBSEG;
 		if (nssva == 0 || nssva > eva)
@@ -1436,28 +1268,6 @@ pmap_kremove(va, len)
 				}
 				splx(s);
 #endif
-#ifdef M68K_MMU_HP
-				if (pmap_aliasmask) {
-
-					/*
-					 * Purge kernel side of VAC to ensure
-					 * we get the correct state of any
-					 * hardware maintained bits.
-					 */
-
-					if (firstpage) {
-						DCIS();
-					}
-
-					/*
-					 * Remember if we may need to
-					 * flush the VAC.
-					 */
-
-					needcflush = TRUE;
-					firstpage = FALSE;
-				}
-#endif
 				/*
 				 * Update statistics
 				 */
@@ -1476,36 +1286,6 @@ pmap_kremove(va, len)
 			sva += PAGE_SIZE;
 		}
 	}
-
-#ifdef M68K_MMU_HP
-	if (pmap_aliasmask) {
-		/*
-		 * Didn't do anything, no need for cache flushes
-		 */
-
-		if (firstpage)
-			return;
-
-		/*
-		 * In a couple of cases, we don't need to worry about flushing
-		 * the VAC:
-		 *      1. if this is a kernel mapping,
-		 *         we have already done it
-		 *      2. if it is a user mapping not for the current process,
-		 *         it won't be there
-		 */
-
-		if (!active_user_pmap(pmap))
-			needcflush = FALSE;
-		if (needcflush) {
-			if (pmap == pmap_kernel()) {
-				DCIS();
-			} else {
-				DCIU();
-			}
-		}
-	}
-#endif
 }
 
 /*
@@ -1777,15 +1557,6 @@ pmap_zero_page(struct vm_page *pg)
 	PMAP_DPRINTF(PDB_FOLLOW, ("pmap_zero_page(%lx)\n", phys));
 
 	npte = phys | PG_V;
-#ifdef M68K_MMU_HP
-	if (pmap_aliasmask) {
-		/*
-		 * Cache-inhibit the mapping on VAC machines, as we would
-		 * be wasting the cache load.
-		 */
-		npte |= PG_CI;
-	}
-#endif
 
 #if defined(M68040) || defined(M68060)
 	if (mmutype <= MMU_68040) {
@@ -1836,16 +1607,6 @@ pmap_copy_page(struct vm_page *srcpg, struct vm_page *dstpg)
 
 	npte1 = src | PG_RO | PG_V;
 	npte2 = dst | PG_V;
-#ifdef M68K_MMU_HP
-	if (pmap_aliasmask) {
-		/*
-		 * Cache-inhibit the mapping on VAC machines, as we would
-		 * be wasting the cache load.
-		 */
-		npte1 |= PG_CI;
-		npte2 |= PG_CI;
-	}
-#endif
 
 #if defined(M68040) || defined(M68060)
 	if (mmutype <= MMU_68040) {
@@ -1953,31 +1714,6 @@ pmap_is_modified(pg)
 	return(pmap_testbit(pg, PG_M));
 }
 
-#ifdef M68K_MMU_HP
-/*
- * pmap_prefer:			[ INTERFACE ]
- *
- *	Find the first virtual address >= *vap that does not
- *	cause a virtually-tagged cache alias problem.
- */
-vaddr_t
-pmap_prefer(vaddr_t foff, vaddr_t va)
-{
-	vsize_t d;
-
-#ifdef M68K_MMU_MOTOROLA
-	if (pmap_aliasmask)
-#endif
-	{
-		d = foff - va;
-		d &= pmap_aliasmask;
-		va += d;
-	}
-
-	return va;
-}
-#endif /* M68K_MMU_HP */
-
 /*
  * Miscellaneous support routines follow
  */
@@ -2027,27 +1763,6 @@ pmap_remove_mapping(pmap, va, pte, flags)
 		if (*pte == PG_NV)
 			return;
 	}
-#ifdef M68K_MMU_HP
-	if (pmap_aliasmask && (flags & PRM_CFLUSH)) {
-
-		/*
-		 * Purge kernel side of VAC to ensure we get the correct
-		 * state of any hardware maintained bits.
-		 */
-
-		DCIS();
-
-		/*
-		 * If this is a non-CI user mapping for the current process,
-		 * flush the VAC.  Note that the kernel side was flushed
-		 * above so we don't worry about non-CI kernel mappings.
-		 */
-
-		if (active_user_pmap(pmap) && !pmap_pte_ci(pte)) {
-			DCIU();
-		}
-	}
-#endif
 	pa = pmap_pte_pa(pte);
 #ifdef PMAP_DEBUG
 	opte = *pte;
@@ -2174,25 +1889,6 @@ pmap_remove_mapping(pmap, va, pte, flags)
 		prev->pv_next = cur->pv_next;
 		pmap_free_pv(cur);
 	}
-#ifdef M68K_MMU_HP
-
-	/*
-	 * If only one mapping left we no longer need to cache inhibit
-	 */
-
-	if (pmap_aliasmask &&
-	    pv->pv_pmap && pv->pv_next == NULL && (pv->pv_flags & PV_CI)) {
-		PMAP_DPRINTF(PDB_CACHE,
-		    ("remove: clearing CI for pa %lx\n", pa));
-		pv->pv_flags &= ~PV_CI;
-		pmap_changebit(pg, 0, ~PG_CI);
-#ifdef PMAP_DEBUG
-		if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) ==
-		    (PDB_CACHE|PDB_PVDUMP))
-			pmap_pvdump(pa);
-#endif
-	}
-#endif
 
 	/*
 	 * If this was a PT page we must also remove the
@@ -2312,13 +2008,6 @@ pmap_testbit(pg, bit)
 		splx(s);
 		return(TRUE);
 	}
-#ifdef M68K_MMU_HP
-	/*
-	 * Flush VAC to get correct state of any hardware maintained bits.
-	 */
-	if (pmap_aliasmask && (bit & (PG_U|PG_M)))
-		DCIS();
-#endif
 	/*
 	 * Not found.  Check current mappings, returning immediately if
 	 * found.  Cache a hit to speed future lookups.
@@ -2355,7 +2044,7 @@ pmap_changebit(pg, set, mask)
 #if defined(M68040) || defined(M68060)
 	paddr_t pa;
 #endif
-#if defined(M68K_MMU_HP) || defined(M68040) || defined(M68060)
+#if defined(M68040) || defined(M68060)
 	boolean_t firstpage = TRUE;
 #endif
 
@@ -2386,16 +2075,6 @@ pmap_changebit(pg, set, mask)
 #endif
 			va = pv->pv_va;
 			pte = pmap_pte(pv->pv_pmap, va);
-#ifdef M68K_MMU_HP
-			/*
-			 * Flush VAC to ensure we get correct state of HW bits
-			 * so we don't clobber them.
-			 */
-			if (firstpage && pmap_aliasmask) {
-				firstpage = FALSE;
-				DCIS();
-			}
-#endif
 			npte = (*pte | set) & mask;
 			if (*pte != npte) {
 #if defined(M68040) || defined(M68060)
diff --git a/sys/arch/mac68k/include/cpu.h b/sys/arch/mac68k/include/cpu.h
index b4620750bff..ccb64ea8219 100644
--- a/sys/arch/mac68k/include/cpu.h
+++ b/sys/arch/mac68k/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.49 2010/07/24 12:18:58 miod Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.50 2011/11/01 21:20:55 miod Exp $	*/
 /*	$NetBSD: cpu.h,v 1.45 1997/02/10 22:13:40 scottr Exp $	*/
 
 /*
@@ -69,7 +69,6 @@
  * Get common m68k definitions.
  */
 #include <m68k/cpu.h>
-#define	M68K_MMU_MOTOROLA
 
 #ifdef _KERNEL
 
diff --git a/sys/arch/mvme68k/include/cpu.h b/sys/arch/mvme68k/include/cpu.h
index cb6f653fcfc..f072a20bdd4 100644
--- a/sys/arch/mvme68k/include/cpu.h
+++ b/sys/arch/mvme68k/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.34 2011/03/23 16:54:36 pirofti Exp $ */
+/*	$OpenBSD: cpu.h,v 1.35 2011/11/01 21:20:55 miod Exp $ */
 
 /*
  * Copyright (c) 1995 Theo de Raadt
@@ -71,7 +71,6 @@
 /*
  * Get common m68k CPU definiti÷ns.
  */
-#define M68K_MMU_MOTOROLA
 #include <m68k/cpu.h>
 
 #ifdef _KERNEL