diff options
| author | Damien Bergamini <damien@cvs.openbsd.org> | 2009-08-10 18:04:57 +0000 |
|---|---|---|
| committer | Damien Bergamini <damien@cvs.openbsd.org> | 2009-08-10 18:04:57 +0000 |
| commit | 5e1a00cc72ffc6ea8655aad8c8b88e36a94b3c70 (patch) | |
| tree | ae49548e98fde623d3779da45f79303baec9dfe9 | |
| parent | 7e5c222b2a0bd3fe8e3df66562ad956839c0c6df (diff) | |
clear the beacons owner/valid bits to avoid garbage.
slightly modified version of a diff from Piotr Durlej.
similar to what the vendor driver is doing.
| -rw-r--r-- | sys/dev/usb/if_rumreg.h | 53 |
1 files changed, 30 insertions, 23 deletions
diff --git a/sys/dev/usb/if_rumreg.h b/sys/dev/usb/if_rumreg.h index ee10331e431..fd817a5a508 100644 --- a/sys/dev/usb/if_rumreg.h +++ b/sys/dev/usb/if_rumreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_rumreg.h,v 1.13 2006/11/13 20:06:38 damien Exp $ */ +/* $OpenBSD: if_rumreg.h,v 1.14 2009/08/10 18:04:56 damien Exp $ */ /*- * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> @@ -39,6 +39,9 @@ #define RT2573_CWMAX_CSR 0x0408 #define RT2573_MCU_CODE_BASE 0x0800 #define RT2573_HW_BEACON_BASE0 0x2400 +#define RT2573_HW_BEACON_BASE1 0x2500 +#define RT2573_HW_BEACON_BASE2 0x2600 +#define RT2573_HW_BEACON_BASE3 0x2700 #define RT2573_MAC_CSR0 0x3000 #define RT2573_MAC_CSR1 0x3004 #define RT2573_MAC_CSR2 0x3008 @@ -236,28 +239,32 @@ struct rum_rx_desc { * Default values for MAC registers; values taken from the reference driver. */ #define RT2573_DEF_MAC \ - { RT2573_TXRX_CSR0, 0x025fb032 }, \ - { RT2573_TXRX_CSR1, 0x9eaa9eaf }, \ - { RT2573_TXRX_CSR2, 0x8a8b8c8d }, \ - { RT2573_TXRX_CSR3, 0x00858687 }, \ - { RT2573_TXRX_CSR7, 0x2e31353b }, \ - { RT2573_TXRX_CSR8, 0x2a2a2a2c }, \ - { RT2573_TXRX_CSR15, 0x0000000f }, \ - { RT2573_MAC_CSR6, 0x00000fff }, \ - { RT2573_MAC_CSR8, 0x016c030a }, \ - { RT2573_MAC_CSR10, 0x00000718 }, \ - { RT2573_MAC_CSR12, 0x00000004 }, \ - { RT2573_MAC_CSR13, 0x00007f00 }, \ - { RT2573_SEC_CSR0, 0x00000000 }, \ - { RT2573_SEC_CSR1, 0x00000000 }, \ - { RT2573_SEC_CSR5, 0x00000000 }, \ - { RT2573_PHY_CSR1, 0x000023b0 }, \ - { RT2573_PHY_CSR5, 0x00040a06 }, \ - { RT2573_PHY_CSR6, 0x00080606 }, \ - { RT2573_PHY_CSR7, 0x00000408 }, \ - { RT2573_AIFSN_CSR, 0x00002273 }, \ - { RT2573_CWMIN_CSR, 0x00002344 }, \ - { RT2573_CWMAX_CSR, 0x000034aa } + { RT2573_TXRX_CSR0, 0x025fb032 }, \ + { RT2573_TXRX_CSR1, 0x9eaa9eaf }, \ + { RT2573_TXRX_CSR2, 0x8a8b8c8d }, \ + { RT2573_TXRX_CSR3, 0x00858687 }, \ + { RT2573_TXRX_CSR7, 0x2e31353b }, \ + { RT2573_TXRX_CSR8, 0x2a2a2a2c }, \ + { RT2573_TXRX_CSR15, 0x0000000f }, \ + { RT2573_MAC_CSR6, 0x00000fff }, \ + { RT2573_MAC_CSR8, 0x016c030a }, \ + { RT2573_MAC_CSR10, 0x00000718 }, \ + { RT2573_MAC_CSR12, 0x00000004 }, \ + { RT2573_MAC_CSR13, 0x00007f00 }, \ + { RT2573_SEC_CSR0, 0x00000000 }, \ + { RT2573_SEC_CSR1, 0x00000000 }, \ + { RT2573_SEC_CSR5, 0x00000000 }, \ + { RT2573_PHY_CSR1, 0x000023b0 }, \ + { RT2573_PHY_CSR5, 0x00040a06 }, \ + { RT2573_PHY_CSR6, 0x00080606 }, \ + { RT2573_PHY_CSR7, 0x00000408 }, \ + { RT2573_AIFSN_CSR, 0x00002273 }, \ + { RT2573_CWMIN_CSR, 0x00002344 }, \ + { RT2573_CWMAX_CSR, 0x000034aa }, \ + { RT2573_HW_BEACON_BASE0, 0x00000000 }, \ + { RT2573_HW_BEACON_BASE1, 0x00000000 }, \ + { RT2573_HW_BEACON_BASE2, 0x00000000 }, \ + { RT2573_HW_BEACON_BASE3, 0x00000000 } /* * Default values for BBP registers; values taken from the reference driver. |