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authorMiod Vallat <miod@cvs.openbsd.org>2005-01-04 21:32:41 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2005-01-04 21:32:41 +0000
commit74876c9d85a4831fd6811eb6ad05fb8bef911fb6 (patch)
treeef1479c6fd26d0ae0ba4d0edf7ee7377b9d1d69c
parent6f6d863e8ac98528725397ab85774b7646c26312 (diff)
Kill old, unused, Mach defines, and provide a correct SET_PC_REGS
implementation - due to the awkwardness of the m88k architecture, PC_REGS can NOT be an lvalue.
-rw-r--r--sys/arch/m88k/include/db_machdep.h98
1 files changed, 34 insertions, 64 deletions
diff --git a/sys/arch/m88k/include/db_machdep.h b/sys/arch/m88k/include/db_machdep.h
index ee29385ed97..fa4520db642 100644
--- a/sys/arch/m88k/include/db_machdep.h
+++ b/sys/arch/m88k/include/db_machdep.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_machdep.h,v 1.2 2004/09/30 21:48:56 miod Exp $ */
+/* $OpenBSD: db_machdep.h,v 1.3 2005/01/04 21:32:40 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1991 Carnegie Mellon University
@@ -26,10 +26,6 @@
* rights to redistribute these changes.
*/
-/*
- * Machine-dependent defined for the new kernel debugger
- */
-
#ifndef _M88K_DB_MACHDEP_H_
#define _M88K_DB_MACHDEP_H_
@@ -45,28 +41,36 @@
#include <uvm/uvm_param.h>
-/*
- * The low two bits of sxip, snip, sfip have valid bits
- * in them that need to masked to get the correct addresses
- */
-#define PC_REGS(regs) \
- CPU_IS88110 ? ((regs)->exip & ~3) : \
- (((regs)->sxip & 2) ? (regs)->sxip & ~3 : \
- ((regs)->snip & 2 ? (regs)->snip & ~3 : (regs)->sfip & ~3))
+#define PC_REGS(regs) \
+ (CPU_IS88110 ? ((regs)->exip & XIP_ADDR) : \
+ ((regs)->sxip & XIP_V ? (regs)->sxip & XIP_ADDR : \
+ ((regs)->snip & NIP_V ? (regs)->snip & NIP_ADDR : \
+ (regs)->sfip & FIP_ADDR)))
+
+#define SET_PC_REGS(regs, value) \
+do { \
+ if (CPU_IS88110) \
+ (regs)->exip = ((regs)->exip & ~XIP_ADDR) | old_pc; \
+ else if ((regs)->sxip & XIP_V) \
+ (regs)->sxip = ((regs)->sxip & ~XIP_ADDR) | old_pc; \
+ else if ((regs)->snip & NIP_V) \
+ (regs)->snip = ((regs)->snip & ~NIP_ADDR) | old_pc; \
+ else \
+ (regs)->sfip = ((regs)->sfip & ~FIP_ADDR) | old_pc; \
+} while (0)
/* inst_return(ins) - is the instruction a function call return.
* Not mutually exclusive with inst_branch. Should be a jmp r1. */
-#define inst_return(I) (((I)&0xfffffbffU) == 0xf400c001U ? TRUE : FALSE)
+#define inst_return(I) \
+ (((I) & 0xfffffbff) == 0xf400c001 ? TRUE : FALSE)
/*
* inst_call - function call predicate: is the instruction a function call.
* Could be either bsr or jsr
*/
-#define inst_call(I) ({ unsigned i = (I); \
- ((((i) & 0xf8000000U) == 0xc8000000U || /*bsr*/ \
- ((i) & 0xfffffbe0U) == 0xf400c800U) /*jsr*/ \
- ? TRUE : FALSE) \
-;})
+#define inst_call(I) \
+ (((I) & 0xf8000000) == 0xc8000000 /*bsr*/ || \
+ ((I) & 0xfffffbe0) == 0xf400c800 /*jsr*/ ? TRUE : FALSE)
#ifdef DDB
@@ -82,7 +86,7 @@
#define BKPT_SET(inst) (BKPT_INST)
/* Entry trap for the debugger - used for inline assembly breaks*/
-#define ENTRY_ASM "tb0 0, r0, 132"
+#define ENTRY_ASM "tb0 0, r0, 132"
typedef vaddr_t db_addr_t;
typedef long db_expr_t;
@@ -90,28 +94,23 @@ typedef struct reg db_regs_t;
extern db_regs_t ddb_regs; /* register state */
#define DDB_REGS (&ddb_regs)
-extern int db_noisy;
-
-unsigned inst_load(unsigned);
-unsigned inst_store(unsigned);
-boolean_t inst_branch(unsigned);
-db_addr_t next_instr_address(db_addr_t, unsigned);
-db_addr_t branch_taken(u_int, db_addr_t, db_expr_t (*)(db_regs_t *, int),
- db_regs_t *);
-int ddb_break_trap(int type, db_regs_t *eframe);
-int ddb_entry_trap(int level, db_regs_t *eframe);
+unsigned inst_load(unsigned);
+unsigned inst_store(unsigned);
+boolean_t inst_branch(unsigned);
+db_addr_t next_instr_address(db_addr_t, unsigned);
+db_addr_t branch_taken(u_int, db_addr_t, db_expr_t (*)(db_regs_t *, int),
+ db_regs_t *);
+int ddb_break_trap(int, db_regs_t *);
+int ddb_entry_trap(int, db_regs_t *);
/* breakpoint/watchpoint foo */
#define IS_BREAKPOINT_TRAP(type,code) ((type)==T_KDB_BREAK)
-#if defined(T_WATCHPOINT)
+#if 0
#define IS_WATCHPOINT_TRAP(type,code) ((type)==T_KDB_WATCH)
#else
#define IS_WATCHPOINT_TRAP(type,code) 0
#endif /* T_WATCHPOINT */
-/* we don't want coff support */
-#define DB_NO_COFF 1
-
#ifdef INTERNAL_SSTEP
db_expr_t getreg_val(db_regs_t *, int);
void db_set_single_step(db_regs_t *);
@@ -121,43 +120,14 @@ void db_clear_single_step(db_regs_t *);
#define SOFTWARE_SSTEP 1 /* we need this for mc88100 */
#endif
-/*
- * Debugger can get to any address space
- */
-
#define DB_ACCESS_LEVEL DB_ACCESS_ANY
-#define DB_VALID_KERN_ADDR(addr) (!badaddr((void *)(addr), 1))
-#define DB_VALID_ADDRESS(addr,user) \
- (user ? db_check_user_addr(addr) : DB_VALID_KERN_ADDR(addr))
-
/* instruction type checking - others are implemented in db_sstep.c */
#define inst_trap_return(ins) ((ins) == 0xf400fc00U)
-/* don't need to load symbols */
-#define DB_SYMBOLS_PRELOADED 1
-
/* machine specific commands have been added to ddb */
-#define DB_MACHINE_COMMANDS 1
-
-/*
- * This routine should return true for instructions that result in unconditonal
- * transfers of the flow of control. (Unconditional Jumps, subroutine calls,
- * subroutine returns, etc).
- *
- * Trap and return from trap should not be listed here.
- */
-#define inst_unconditional_flow_transfer(I) ({ unsigned i = (I); \
- ((((i) & 0xf0000000U) == 0xc0000000U || /* br, bsr */ \
- ((i) & 0xfffff3e0U) == 0xf400c000U) /* jmp, jsr */ \
- ? TRUE: FALSE) \
-;})
-
-/* Return true if the instruction has a delay slot. */
-#define db_branch_is_delayed(I) inst_delayed(I)
-
-#define db_printf_enter db_printing
+#define DB_MACHINE_COMMANDS
int m88k_print_instruction(unsigned iadr, long inst);