Remove remaining Solbourne code.

ok deraadt@

7 files changed, 7 insertions, 311 deletions

diff --git a/sys/arch/sparc/dev/if_le.c b/sys/arch/sparc/dev/if_le.c
index e883e9df40f..aa3dd3c2e66 100644
--- a/sys/arch/sparc/dev/if_le.c
+++ b/sys/arch/sparc/dev/if_le.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_le.c,v 1.37 2015/09/11 13:02:28 stsp Exp $	*/
+/*	$OpenBSD: if_le.c,v 1.38 2015/12/10 19:48:04 mmcc Exp $	*/
 /*	$NetBSD: if_le.c,v 1.50 1997/09/09 20:54:48 pk Exp $	*/
 
 /*-
@@ -77,12 +77,6 @@
 #include <sparc/dev/if_lereg.h>
 #include <sparc/dev/if_levar.h>
 
-#ifdef solbourne
-#include <sparc/sparc/asm.h>
-#include <machine/idt.h>
-#include <machine/kap.h>
-#endif
-
 int	lematch(struct device *, void *, void *);
 void	leattach(struct device *, struct device *, void *);
 
@@ -152,10 +146,6 @@ void	lehwinit(struct lance_softc *);
 #if defined(SUN4M)
 void	lenocarrier(struct lance_softc *);
 #endif
-#if defined(solbourne)
-void	kap_copytobuf(struct lance_softc *, void *, int, int);
-void	kap_copyfrombuf(struct lance_softc *, void *, int, int);
-#endif
 
 void
 lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)
@@ -400,11 +390,6 @@ lematch(struct device *parent, void *vcf, void *aux)
 
 	if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
 		return (0);
-#if defined(solbourne)
-	if (CPU_ISKAP) {
-		return (ca->ca_bustype == BUS_OBIO);
-	}
-#endif
 #if defined(SUN4C) || defined(SUN4D) || defined(SUN4E) || defined(SUN4M)
 	if (ca->ca_bustype == BUS_SBUS) {
 		if (!sbus_testdma((struct sbus_softc *)parent, ca))
@@ -481,26 +466,6 @@ leattach(struct device *parent, struct device *self, void *aux)
 	{
 		u_long laddr;
 
-#if defined(solbourne)
-		if (CPU_ISKAP && ca->ca_bustype == BUS_OBIO) {
-			/*
-			 * Use the fixed buffer allocated in pmap_bootstrap().
-			 * for now, until I get the iCU translation to work...
-			 */
-			extern vaddr_t lance_va;
-
-			laddr = PTW1_TO_PHYS(lance_va);
-			sc->sc_mem = (void *)PHYS_TO_PTW2(laddr);
-
-			/* disable ICU translations for ethernet */
-			sta(ICU_TER, ASI_PHYS_IO,
-			    lda(ICU_TER, ASI_PHYS_IO) & ~TER_ETHERNET);
-
-			/* stash the high 15 bits of the physical address */
-			sta(SE_BASE + 0x18, ASI_PHYS_IO,
-			    laddr & 0xfffe0000);
-		} /* else */
-#endif	/* solbourne */
 #if defined(SUN4) || defined(SUN4C) || defined(SUN4D) || defined(SUN4E) || defined(SUN4M)
 #if defined(SUN4C) || defined(SUN4D) || defined(SUN4E) || defined(SUN4M)
 		if (sbuschild && CPU_ISSUN4DOR4M)
@@ -515,18 +480,8 @@ leattach(struct device *parent, struct device *self, void *aux)
 		if ((laddr & 0xffffff) >= (laddr & 0xffffff) + MEMSIZE)
 			panic("if_le: Lance buffer crosses 16MB boundary");
 #endif
-#if defined(solbourne)
-		if (CPU_ISKAP && ca->ca_bustype == BUS_OBIO)
-			sc->sc_addr = laddr & 0x01ffff;
-		else
-#endif
 			sc->sc_addr = laddr & 0xffffff;
 		sc->sc_memsize = MEMSIZE;
-#if defined(solbourne)
-		if (CPU_ISKAP && ca->ca_bustype == BUS_OBIO)
-			sc->sc_conf3 = LE_C3_BSWP;
-		else
-#endif
 			sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
 #if defined(SUN4C) || defined(SUN4D) || defined(SUN4E) || defined(SUN4M)
 		if (dmachild) {
@@ -599,17 +554,6 @@ leattach(struct device *parent, struct device *self, void *aux)
 
 	am7990_config(&lesc->sc_am7990);
 
-#if defined(solbourne)
-	if (CPU_ISKAP && ca->ca_bustype == BUS_OBIO) {
-		sc->sc_copytodesc = kap_copytobuf;
-		sc->sc_copyfromdesc = kap_copyfrombuf;
-
-		sc->sc_initaddr = 1 << 23 | (sc->sc_initaddr & 0x01ffff);
-		sc->sc_rmdaddr = 1 << 23 | (sc->sc_rmdaddr & 0x01ffff);
-		sc->sc_tmdaddr = 1 << 23 | (sc->sc_tmdaddr & 0x01ffff);
-	}
-#endif
-
 	lesc->sc_ih.ih_fun = am7990_intr;
 #if defined(SUN4M) /*XXX*/
 	if (CPU_ISSUN4M && lesc->sc_dma)
@@ -621,16 +565,3 @@ leattach(struct device *parent, struct device *self, void *aux)
 	/* now initialize DMA */
 	lehwreset(sc);
 }
-
-#if defined(solbourne)
-void
-kap_copytobuf(struct lance_softc *sc, void *to, int boff, int len)
-{
-	return (lance_copytobuf_contig(sc, to, boff & ~(1 << 23), len));
-}
-void
-kap_copyfrombuf(struct lance_softc *sc, void *from, int boff, int len)
-{
-	return (lance_copyfrombuf_contig(sc, from, boff & ~(1 << 23), len));
-}
-#endif
diff --git a/sys/arch/sparc/dev/if_lereg.h b/sys/arch/sparc/dev/if_lereg.h
index 020d4d025f1..5eed18aa432 100644
--- a/sys/arch/sparc/dev/if_lereg.h
+++ b/sys/arch/sparc/dev/if_lereg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_lereg.h,v 1.6 2005/04/19 21:30:19 miod Exp $	*/
+/*	$OpenBSD: if_lereg.h,v 1.7 2015/12/10 19:48:04 mmcc Exp $	*/
 /*	$NetBSD: if_lereg.h,v 1.5 1995/12/10 10:15:07 mycroft Exp $ */
 
 /*-
@@ -43,8 +43,5 @@
  */
 struct lereg1 {
 	volatile u_int16_t	ler1_rdp;	/* data port */
-#ifdef solbourne
-	volatile u_char		ler1_pad[6];
-#endif
 	volatile u_int16_t	ler1_rap;	/* register select port */
 };
diff --git a/sys/arch/sparc/dev/zs.c b/sys/arch/sparc/dev/zs.c
index 36258b8870e..599d31ca4f6 100644
--- a/sys/arch/sparc/dev/zs.c
+++ b/sys/arch/sparc/dev/zs.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: zs.c,v 1.57 2015/03/18 19:49:14 miod Exp $	*/
+/*	$OpenBSD: zs.c,v 1.58 2015/12/10 19:48:04 mmcc Exp $	*/
 /*	$NetBSD: zs.c,v 1.50 1997/10/18 00:00:40 gwr Exp $	*/
 
 /*-
@@ -68,10 +68,6 @@
 #include <sparc/sparc/auxioreg.h>
 #include <sparc/dev/cons.h>
 
-#ifdef solbourne
-#include <machine/prom.h>
-#endif
-
 #include <uvm/uvm_extern.h>
 
 #include "zskbd.h"
@@ -100,18 +96,10 @@ int zs_major = 12;
 
 /* The layout of this is hardware-dependent (padding, order). */
 struct zschan {
-#if !defined(solbourne)
 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
 	u_char		zc_xxx0;
 	volatile u_char	zc_data;	/* data */
 	u_char		zc_xxx1;
-#endif
-#if defined(solbourne)
-	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
-	u_char		zc_xxx0[7];
-	volatile u_char	zc_data;	/* data */
-	u_char		zc_xxx1[7];
-#endif
 };
 struct zsdevice {
 	/* Yes, they are backwards. */
@@ -221,11 +209,6 @@ zs_match(parent, vcf, aux)
 	if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
 		return (0);
 
-#ifdef solbourne
-	if (CPU_ISKAP)
-		return (ca->ca_bustype == BUS_OBIO);
-#endif
-
 	if ((ca->ca_bustype == BUS_MAIN && (CPU_ISSUN4C || CPU_ISSUN4E)) ||
 	    (ca->ca_bustype == BUS_OBIO && CPU_ISSUN4M))
 		return (getpropint(ra->ra_node, "slave", -2) == cf->cf_unit);
diff --git a/sys/arch/sparc/sparc/cache.c b/sys/arch/sparc/sparc/cache.c
index 57f9a8e8db9..b49ed5b2d5b 100644
--- a/sys/arch/sparc/sparc/cache.c
+++ b/sys/arch/sparc/sparc/cache.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cache.c,v 1.20 2010/07/10 19:32:24 miod Exp $	*/
+/*	$OpenBSD: cache.c,v 1.21 2015/12/10 19:48:04 mmcc Exp $	*/
 /*	$NetBSD: cache.c,v 1.34 1997/09/26 22:17:23 pk Exp $	*/
 
 /*
@@ -70,11 +70,6 @@
 #include <sparc/sparc/cache.h>
 #include <sparc/sparc/cpuvar.h>
 
-#if defined(solbourne)
-#include <machine/idt.h>
-#include <machine/kap.h>
-#endif
-
 struct cachestats cachestats;
 
 int cache_alias_dist;		/* Cache anti-aliasing constants */
@@ -894,59 +889,3 @@ srmmu_pcache_flush_line(va, pa)
 	sta(va, ASI_IDCACHELFP, 0);
 }
 #endif /* SUN4M */
-
-#if defined(solbourne)
-void
-kap_cache_enable()
-{
-	kap_cache_flush(NULL, 0);
-	sta(0, ASI_ICACHE_INVAL, 0);
-
-	sta(ICU_CONF, ASI_PHYS_IO,
-	    lda(ICU_CONF, ASI_PHYS_IO) & ~CONF_ICACHE_DISABLE);
-	CACHEINFO.c_enabled = 1;
-
-	printf("cache enabled\n");
-}
-
-void
-kap_vcache_flush_context()
-{
-	kap_cache_flush(0, 0);
-	sta(0, ASI_DCACHE_INVAL, 0);
-	sta(0, ASI_ICACHE_INVAL, 0);
-}
-
-void
-kap_vcache_flush_page(va)
-	int va;
-{
-	kap_cache_flush((caddr_t)va, PAGE_SIZE);
-}
-
-void
-kap_cache_flush(base, len)
-	caddr_t base;
-	u_int len;
-{
-	u_int line;
-	u_int32_t mmcr;
-
-	/*
-	 * Due to the small size of the data cache and the fact that we
-	 * would be flushing 4 bytes by 4 bytes, it is faster to flush
-	 * the whole cache instead.
-	 */
-
-	mmcr = lda(0, ASI_MMCR) & ~(MMCR_DSET0 | MMCR_DSET1);
-	/* flush bank 0 */
-	sta(0, ASI_MMCR, mmcr | MMCR_DSET0);
-	for (line = 0; line < DCACHE_LINE(DCACHE_LINES); line += DCACHE_INCR)
-		(void)lda(line, ASI_DCACHE_FLUSH);
-	/* flush bank 1 */
-	sta(0, ASI_MMCR, mmcr | MMCR_DSET1);
-	for (line = 0; line < DCACHE_LINE(DCACHE_LINES); line += DCACHE_INCR)
-		(void)lda(line, ASI_DCACHE_FLUSH);
-}
-
-#endif	/* solbourne */
diff --git a/sys/arch/sparc/sparc/consinit.c b/sys/arch/sparc/sparc/consinit.c
index dd4c821a1d9..eb1b5e818d2 100644
--- a/sys/arch/sparc/sparc/consinit.c
+++ b/sys/arch/sparc/sparc/consinit.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: consinit.c,v 1.1 2015/02/28 17:54:54 miod Exp $	*/
+/*	$OpenBSD: consinit.c,v 1.2 2015/12/10 19:48:04 mmcc Exp $	*/
 /*	$NetBSD: zs.c,v 1.50 1997/10/18 00:00:40 gwr Exp $	*/
 
 /*-
@@ -54,10 +54,6 @@
 
 #include <sparc/dev/cons.h>
 
-#ifdef solbourne
-#include <machine/prom.h>
-#endif
-
 #include "zskbd.h"
 #include "zs.h"
 
@@ -72,8 +68,6 @@ extern int zs_hwflags[NZS][2];
 
 /*****************************************************************/
 
-#if !defined(solbourne)
-
 cons_decl(prom);
 
 /*
@@ -178,8 +172,6 @@ promcnputc(dev, c)
 	splx(s);
 }
 
-#endif	/* !solbourne */
-
 /*****************************************************************/
 
 char *prom_inSrc_name[] = {
@@ -203,7 +195,6 @@ consinit()
 	int channel, zs_unit;
 	int inSource, outSink;
 
-#if !defined(solbourne)
 	if (promvec->pv_romvec_vers > 2) {
 		/* We need to probe the PROM device tree */
 		int node,fd;
@@ -312,30 +303,6 @@ setup_output:
 		outSink  = *promvec->pv_stdout;
 	}
 setup_console:
-#endif	/* !solbourne */
-#ifdef solbourne
-	if (CPU_ISKAP) {
-		const char *dev;
-
-		inSource = PROMDEV_TTYA;	/* default */
-		dev = prom_getenv(ENV_INPUTDEVICE);
-		if (dev != NULL) {
-			if (strcmp(dev, "ttyb") == 0)
-				inSource = PROMDEV_TTYB;
-			if (strcmp(dev, "keyboard") == 0)
-				inSource = PROMDEV_KBD;
-		}
-
-		outSink = PROMDEV_TTYA;	/* default */
-		dev = prom_getenv(ENV_OUTPUTDEVICE);
-		if (dev != NULL) {
-			if (strcmp(dev, "ttyb") == 0)
-				outSink = PROMDEV_TTYB;
-			if (strcmp(dev, "screen") == 0)
-				outSink = PROMDEV_SCREEN;
-		}
-	}
-#endif
 
 	if (inSource != outSink) {
 		printf("cninit: mismatched PROM output selector\n");
diff --git a/sys/arch/sparc/sparc/cpu.c b/sys/arch/sparc/sparc/cpu.c
index 2cd298c6bd1..db8f1783a28 100644
--- a/sys/arch/sparc/sparc/cpu.c
+++ b/sys/arch/sparc/sparc/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.50 2014/04/30 04:20:31 miod Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.51 2015/12/10 19:48:04 mmcc Exp $	*/
 /*	$NetBSD: cpu.c,v 1.56 1997/09/15 20:52:36 pk Exp $ */
 
 /*
@@ -73,12 +73,6 @@
 #include <sparc/sparc/cpuvar.h>
 #include <sparc/sparc/memreg.h>
 
-#ifdef solbourne
-#include <machine/idt.h>
-#include <machine/kap.h>
-#include <machine/prom.h>
-#endif
-
 /* The following are used externally (sysctl_hw). */
 char	machine[] = MACHINE;		/* from <machine/param.h> */
 char	*cpu_class = "sun4";
@@ -629,112 +623,6 @@ getcacheinfo_sun4c(sc, node)
 }
 #endif /* SUN4C || SUN4E */
 
-#if defined(solbourne)
-struct module_info module_kap = {
-	CPUTYP_UNKNOWN,
-	VAC_WRITEBACK,
-	cpumatch_kap,
-	getcacheinfo_kap,
-	NULL,
-	0,				/* mmu_enable */
-	kap_cache_enable,
-	0,				/* ncontext is irrelevant here */
-	0,
-	0,
-	kap_cache_flush,
-	kap_vcache_flush_page,
-	noop_vcache_flush_segment,	/* unused */
-	noop_vcache_flush_region,	/* unused */
-	kap_vcache_flush_context,
-	noop_pcache_flush_line,
-	noop_pure_vcache_flush,
-	noop_cache_flush_all,
-	0
-};
-
-void
-cpumatch_kap(sc, mp, node)
-	struct cpu_softc *sc;
-	struct module_info *mp;
-	int	node;
-{
-	extern int timerblurb;
-
-	sc->mmu_npmeg = sc->mmu_ncontext = 0;	/* do not matter for idt */
-
-	/*
-	 * Check for the clock speed in the board diagnostic register.
-	 * While there, knowing that there are only two possible values,
-	 * fill the delay constant.
-	 */
-	if ((lda(GLU_DIAG, ASI_PHYS_IO) >> 24) & GD_36MHZ) {
-		sc->hz = 36000000;
-		timerblurb = 14;	/* about 14.40 */
-	} else {
-		sc->hz = 33000000;
-		timerblurb = 13;	/* about 13.20 */
-	}
-
-	if (node != 0) {
-		sysmodel = getpropint(node, "cpu", 0);
-		switch (sysmodel) {
-		case SYS_S4000:
-			break;
-		case SYS_S4100:
-			/* XXX do something about the L2 cache */
-			break;
-		default:
-			panic("cpumatch_kap: unrecognized sysmodel %x",
-			    sysmodel);
-		}
-	}
-}
-
-void
-getcacheinfo_kap(sc, node)
-	struct cpu_softc *sc;
-	int node;
-{
-	struct cacheinfo *ci = &sc->cacheinfo;
-
-	/*
-	 * The KAP processor has 3KB icache and 2KB dcache.
-	 * It is divided in 3 (icache) or 2 (dcache) banks
-	 * of 256 lines, each line being 4 bytes.
-	 * Both caches are virtually addressed.
-	 */
-
-	ci->ic_linesize = 12;
-	ci->ic_l2linesize = 3;	/* XXX */
-	ci->ic_nlines = DCACHE_LINES;
-	ci->ic_associativity = 1;
-	ci->ic_totalsize =
-	    ci->ic_nlines * ci->ic_linesize * ci->ic_associativity;
-	
-	ci->dc_enabled = 1;
-	ci->dc_linesize = 8;
-	ci->dc_l2linesize = 3;
-	ci->dc_nlines = DCACHE_LINES;
-	ci->dc_associativity = 1;
-	ci->dc_totalsize =
-	    ci->dc_nlines * ci->dc_linesize * ci->dc_associativity;
-
-	ci->c_totalsize = ci->ic_totalsize + ci->dc_totalsize;
-	/* ci->c_enabled */
-	ci->c_hwflush = 0;
-	ci->c_linesize = 8;	/* min */
-	ci->c_l2linesize = 3;	/* min */
-	ci->c_nlines = DCACHE_LINES;
-	ci->c_physical = 0;
-	ci->c_associativity = 1;
-	ci->c_split = 1;
-
-	/* no L2 cache (except on 4100 but we don't handle it yet) */
-	
-	ci->c_vactype = VAC_WRITEBACK;
-}
-#endif
-
 void
 sun4_hotfix(sc)
 	struct cpu_softc *sc;
@@ -1228,10 +1116,6 @@ struct cpu_conf {
 	{ CPU_SUN4M, 4, 4, ANY, ANY, "TI_4_4", &module_viking },
 #endif
 
-#if defined(solbourne)
-	{ CPU_KAP, 5, 0, ANY, ANY, "KAP", &module_kap },
-#endif
-
 	{ ANY, ANY, ANY, ANY, ANY, "Unknown", &module_unknown }
 };
 
diff --git a/sys/arch/sparc/sparc/intr.c b/sys/arch/sparc/sparc/intr.c
index d7b8b1018da..a9bb657124c 100644
--- a/sys/arch/sparc/sparc/intr.c
+++ b/sys/arch/sparc/sparc/intr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.c,v 1.42 2015/11/02 16:55:31 mpi Exp $ */
+/*	$OpenBSD: intr.c,v 1.43 2015/12/10 19:48:04 mmcc Exp $ */
 /*	$NetBSD: intr.c,v 1.20 1997/07/29 09:42:03 fair Exp $ */
 
 /*
@@ -523,11 +523,6 @@ softintr_schedule(void *arg)
 			intreg_set_44c(sih->sih_hw);
 			break;
 #endif
-#if defined(solbourne)
-		case CPU_KAP:
-			ienab_bis(sih->sih_hw);
-			break;
-#endif
 		}
 	}
 	splx(s);